1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Copyright(c) 2022 Intel Corporation */
3 #include "adf_accel_devices.h"
4 #include "adf_gen2_dc.h"
5 #include "icp_qat_fw_comp.h"
6 
qat_comp_build_deflate_ctx(void * ctx)7 static void qat_comp_build_deflate_ctx(void *ctx)
8 {
9 	struct icp_qat_fw_comp_req *req_tmpl = (struct icp_qat_fw_comp_req *)ctx;
10 	struct icp_qat_fw_comn_req_hdr *header = &req_tmpl->comn_hdr;
11 	struct icp_qat_fw_comp_req_hdr_cd_pars *cd_pars = &req_tmpl->cd_pars;
12 	struct icp_qat_fw_comp_req_params *req_pars = &req_tmpl->comp_pars;
13 	struct icp_qat_fw_comp_cd_hdr *comp_cd_ctrl = &req_tmpl->comp_cd_ctrl;
14 
15 	memset(req_tmpl, 0, sizeof(*req_tmpl));
16 	header->hdr_flags =
17 		ICP_QAT_FW_COMN_HDR_FLAGS_BUILD(ICP_QAT_FW_COMN_REQ_FLAG_SET);
18 	header->service_type = ICP_QAT_FW_COMN_REQ_CPM_FW_COMP;
19 	header->service_cmd_id = ICP_QAT_FW_COMP_CMD_STATIC;
20 	header->comn_req_flags =
21 		ICP_QAT_FW_COMN_FLAGS_BUILD(QAT_COMN_CD_FLD_TYPE_16BYTE_DATA,
22 					    QAT_COMN_PTR_TYPE_SGL);
23 	header->serv_specif_flags =
24 		ICP_QAT_FW_COMP_FLAGS_BUILD(ICP_QAT_FW_COMP_STATELESS_SESSION,
25 					    ICP_QAT_FW_COMP_NOT_AUTO_SELECT_BEST,
26 					    ICP_QAT_FW_COMP_NOT_ENH_AUTO_SELECT_BEST,
27 					    ICP_QAT_FW_COMP_NOT_DISABLE_TYPE0_ENH_AUTO_SELECT_BEST,
28 					    ICP_QAT_FW_COMP_ENABLE_SECURE_RAM_USED_AS_INTMD_BUF);
29 	cd_pars->u.sl.comp_slice_cfg_word[0] =
30 		ICP_QAT_HW_COMPRESSION_CONFIG_BUILD(ICP_QAT_HW_COMPRESSION_DIR_COMPRESS,
31 						    ICP_QAT_HW_COMPRESSION_DELAYED_MATCH_DISABLED,
32 						    ICP_QAT_HW_COMPRESSION_ALGO_DEFLATE,
33 						    ICP_QAT_HW_COMPRESSION_DEPTH_1,
34 						    ICP_QAT_HW_COMPRESSION_FILE_TYPE_0);
35 	req_pars->crc.legacy.initial_adler = COMP_CPR_INITIAL_ADLER;
36 	req_pars->crc.legacy.initial_crc32 = COMP_CPR_INITIAL_CRC;
37 	req_pars->req_par_flags =
38 		ICP_QAT_FW_COMP_REQ_PARAM_FLAGS_BUILD(ICP_QAT_FW_COMP_SOP,
39 						      ICP_QAT_FW_COMP_EOP,
40 						      ICP_QAT_FW_COMP_BFINAL,
41 						      ICP_QAT_FW_COMP_CNV,
42 						      ICP_QAT_FW_COMP_CNV_RECOVERY,
43 						      ICP_QAT_FW_COMP_NO_CNV_DFX,
44 						      ICP_QAT_FW_COMP_CRC_MODE_LEGACY,
45 						      ICP_QAT_FW_COMP_NO_XXHASH_ACC,
46 						      ICP_QAT_FW_COMP_CNV_ERROR_NONE,
47 						      ICP_QAT_FW_COMP_NO_APPEND_CRC,
48 						      ICP_QAT_FW_COMP_NO_DROP_DATA);
49 	ICP_QAT_FW_COMN_NEXT_ID_SET(comp_cd_ctrl, ICP_QAT_FW_SLICE_DRAM_WR);
50 	ICP_QAT_FW_COMN_CURR_ID_SET(comp_cd_ctrl, ICP_QAT_FW_SLICE_COMP);
51 
52 	/* Fill second half of the template for decompression */
53 	memcpy(req_tmpl + 1, req_tmpl, sizeof(*req_tmpl));
54 	req_tmpl++;
55 	header = &req_tmpl->comn_hdr;
56 	header->service_cmd_id = ICP_QAT_FW_COMP_CMD_DECOMPRESS;
57 	cd_pars = &req_tmpl->cd_pars;
58 	cd_pars->u.sl.comp_slice_cfg_word[0] =
59 		ICP_QAT_HW_COMPRESSION_CONFIG_BUILD(ICP_QAT_HW_COMPRESSION_DIR_DECOMPRESS,
60 						    ICP_QAT_HW_COMPRESSION_DELAYED_MATCH_DISABLED,
61 						    ICP_QAT_HW_COMPRESSION_ALGO_DEFLATE,
62 						    ICP_QAT_HW_COMPRESSION_DEPTH_1,
63 						    ICP_QAT_HW_COMPRESSION_FILE_TYPE_0);
64 }
65 
adf_gen2_init_dc_ops(struct adf_dc_ops * dc_ops)66 void adf_gen2_init_dc_ops(struct adf_dc_ops *dc_ops)
67 {
68 	dc_ops->build_deflate_ctx = qat_comp_build_deflate_ctx;
69 }
70 EXPORT_SYMBOL_GPL(adf_gen2_init_dc_ops);
71