1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2012 - 2013 CompuLab, Ltd. <www.compulab.co.il>
4 *
5 * Authors: Nikita Kiryanov <nikita@compulab.co.il>
6 *
7 * Parsing code based on linux/drivers/video/pxafb.c
8 */
9
10 #include <common.h>
11 #include <asm/gpio.h>
12 #include <asm/io.h>
13 #include <stdio_dev.h>
14 #include <asm/arch/dss.h>
15 #include <lcd.h>
16 #include <scf0403_lcd.h>
17 #include <asm/arch-omap3/dss.h>
18
19 enum display_type {
20 NONE,
21 DVI,
22 DVI_CUSTOM,
23 DATA_IMAGE, /* #define CONFIG_SCF0403_LCD to use */
24 };
25
26 #define CMAP_ADDR 0x80100000
27
28 /*
29 * The frame buffer is allocated before we have the chance to parse user input.
30 * To make sure enough memory is allocated for all resolutions, we define
31 * vl_{col | row} to the maximal resolution supported by OMAP3.
32 */
33 vidinfo_t panel_info = {
34 .vl_col = 1400,
35 .vl_row = 1050,
36 .vl_bpix = LCD_BPP,
37 .cmap = (ushort *)CMAP_ADDR,
38 };
39
40 static struct panel_config panel_cfg;
41 static enum display_type lcd_def;
42
43 /*
44 * A note on DVI presets;
45 * U-Boot can convert 8 bit BMP data to 16 bit BMP data, and OMAP DSS can
46 * convert 16 bit data into 24 bit data. Thus, GFXFORMAT_RGB16 allows us to
47 * support two BMP types with one setting.
48 */
49 static const struct panel_config preset_dvi_640X480 = {
50 .lcd_size = PANEL_LCD_SIZE(640, 480),
51 .timing_h = DSS_HBP(48) | DSS_HFP(16) | DSS_HSW(96),
52 .timing_v = DSS_VBP(33) | DSS_VFP(10) | DSS_VSW(2),
53 .pol_freq = DSS_IHS | DSS_IVS | DSS_IPC,
54 .divisor = 12 | (1 << 16),
55 .data_lines = LCD_INTERFACE_24_BIT,
56 .panel_type = ACTIVE_DISPLAY,
57 .load_mode = 2,
58 .gfx_format = GFXFORMAT_RGB16,
59 };
60
61 static const struct panel_config preset_dvi_800X600 = {
62 .lcd_size = PANEL_LCD_SIZE(800, 600),
63 .timing_h = DSS_HBP(88) | DSS_HFP(40) | DSS_HSW(128),
64 .timing_v = DSS_VBP(23) | DSS_VFP(1) | DSS_VSW(4),
65 .pol_freq = DSS_IHS | DSS_IVS | DSS_IPC,
66 .divisor = 8 | (1 << 16),
67 .data_lines = LCD_INTERFACE_24_BIT,
68 .panel_type = ACTIVE_DISPLAY,
69 .load_mode = 2,
70 .gfx_format = GFXFORMAT_RGB16,
71 };
72
73 static const struct panel_config preset_dvi_1024X768 = {
74 .lcd_size = PANEL_LCD_SIZE(1024, 768),
75 .timing_h = DSS_HBP(160) | DSS_HFP(24) | DSS_HSW(136),
76 .timing_v = DSS_VBP(29) | DSS_VFP(3) | DSS_VSW(6),
77 .pol_freq = DSS_IHS | DSS_IVS | DSS_IPC,
78 .divisor = 5 | (1 << 16),
79 .data_lines = LCD_INTERFACE_24_BIT,
80 .panel_type = ACTIVE_DISPLAY,
81 .load_mode = 2,
82 .gfx_format = GFXFORMAT_RGB16,
83 };
84
85 static const struct panel_config preset_dvi_1152X864 = {
86 .lcd_size = PANEL_LCD_SIZE(1152, 864),
87 .timing_h = DSS_HBP(256) | DSS_HFP(64) | DSS_HSW(128),
88 .timing_v = DSS_VBP(32) | DSS_VFP(1) | DSS_VSW(3),
89 .pol_freq = DSS_IHS | DSS_IVS | DSS_IPC,
90 .divisor = 4 | (1 << 16),
91 .data_lines = LCD_INTERFACE_24_BIT,
92 .panel_type = ACTIVE_DISPLAY,
93 .load_mode = 2,
94 .gfx_format = GFXFORMAT_RGB16,
95 };
96
97 static const struct panel_config preset_dvi_1280X960 = {
98 .lcd_size = PANEL_LCD_SIZE(1280, 960),
99 .timing_h = DSS_HBP(312) | DSS_HFP(96) | DSS_HSW(112),
100 .timing_v = DSS_VBP(36) | DSS_VFP(1) | DSS_VSW(3),
101 .pol_freq = DSS_IHS | DSS_IVS | DSS_IPC,
102 .divisor = 3 | (1 << 16),
103 .data_lines = LCD_INTERFACE_24_BIT,
104 .panel_type = ACTIVE_DISPLAY,
105 .load_mode = 2,
106 .gfx_format = GFXFORMAT_RGB16,
107 };
108
109 static const struct panel_config preset_dvi_1280X1024 = {
110 .lcd_size = PANEL_LCD_SIZE(1280, 1024),
111 .timing_h = DSS_HBP(248) | DSS_HFP(48) | DSS_HSW(112),
112 .timing_v = DSS_VBP(38) | DSS_VFP(1) | DSS_VSW(3),
113 .pol_freq = DSS_IHS | DSS_IVS | DSS_IPC,
114 .divisor = 3 | (1 << 16),
115 .data_lines = LCD_INTERFACE_24_BIT,
116 .panel_type = ACTIVE_DISPLAY,
117 .load_mode = 2,
118 .gfx_format = GFXFORMAT_RGB16,
119 };
120
121 static const struct panel_config preset_dataimage_480X800 = {
122 .lcd_size = PANEL_LCD_SIZE(480, 800),
123 .timing_h = DSS_HBP(2) | DSS_HFP(2) | DSS_HSW(2),
124 .timing_v = DSS_VBP(17) | DSS_VFP(20) | DSS_VSW(3),
125 .pol_freq = DSS_IVS | DSS_IHS | DSS_IPC | DSS_ONOFF,
126 .divisor = 10 | (1 << 10),
127 .data_lines = LCD_INTERFACE_18_BIT,
128 .panel_type = ACTIVE_DISPLAY,
129 .load_mode = 2,
130 .gfx_format = GFXFORMAT_RGB16,
131 };
132
133 /*
134 * set_resolution_params()
135 *
136 * Due to usage of multiple display related APIs resolution data is located in
137 * more than one place. This function updates them all.
138 */
set_resolution_params(int x,int y)139 static void set_resolution_params(int x, int y)
140 {
141 panel_cfg.lcd_size = PANEL_LCD_SIZE(x, y);
142 panel_info.vl_col = x;
143 panel_info.vl_row = y;
144 lcd_line_length = (panel_info.vl_col * NBITS(panel_info.vl_bpix)) / 8;
145 }
146
set_preset(const struct panel_config preset,int x_res,int y_res)147 static void set_preset(const struct panel_config preset, int x_res, int y_res)
148 {
149 panel_cfg = preset;
150 set_resolution_params(x_res, y_res);
151 }
152
set_dvi_preset(const struct panel_config preset,int x_res,int y_res)153 static enum display_type set_dvi_preset(const struct panel_config preset,
154 int x_res, int y_res)
155 {
156 set_preset(preset, x_res, y_res);
157 return DVI;
158 }
159
set_dataimage_preset(const struct panel_config preset,int x_res,int y_res)160 static enum display_type set_dataimage_preset(const struct panel_config preset,
161 int x_res, int y_res)
162 {
163 set_preset(preset, x_res, y_res);
164 return DATA_IMAGE;
165 }
166
167 /*
168 * parse_mode() - parse the mode parameter of custom lcd settings
169 *
170 * @mode: <res_x>x<res_y>
171 *
172 * Returns -1 on error, 0 on success.
173 */
parse_mode(const char * mode)174 static int parse_mode(const char *mode)
175 {
176 unsigned int modelen = strlen(mode);
177 int res_specified = 0;
178 unsigned int xres = 0, yres = 0;
179 int yres_specified = 0;
180 int i;
181
182 for (i = modelen - 1; i >= 0; i--) {
183 switch (mode[i]) {
184 case 'x':
185 if (!yres_specified) {
186 yres = simple_strtoul(&mode[i + 1], NULL, 0);
187 yres_specified = 1;
188 } else {
189 goto done_parsing;
190 }
191
192 break;
193 case '0' ... '9':
194 break;
195 default:
196 goto done_parsing;
197 }
198 }
199
200 if (i < 0 && yres_specified) {
201 xres = simple_strtoul(mode, NULL, 0);
202 res_specified = 1;
203 }
204
205 done_parsing:
206 if (res_specified) {
207 set_resolution_params(xres, yres);
208 } else {
209 printf("LCD: invalid mode: %s\n", mode);
210 return -1;
211 }
212
213 return 0;
214 }
215
216 #define PIXEL_CLK_NUMERATOR (26 * 432 / 39)
217 /*
218 * parse_pixclock() - Parse the pixclock parameter of custom lcd settings
219 *
220 * @pixclock: the desired pixel clock
221 *
222 * Returns -1 on error, 0 on success.
223 *
224 * Handling the pixel_clock:
225 *
226 * Pixel clock is defined in the OMAP35x TRM as follows:
227 * pixel_clock =
228 * (SYS_CLK * 2 * PRCM.CM_CLKSEL2_PLL[18:8]) /
229 * (DSS.DISPC_DIVISOR[23:16] * DSS.DISPC_DIVISOR[6:0] *
230 * PRCM.CM_CLKSEL_DSS[4:0] * (PRCM.CM_CLKSEL2_PLL[6:0] + 1))
231 *
232 * In practice, this means that in order to set the
233 * divisor for the desired pixel clock one needs to
234 * solve the following equation:
235 *
236 * 26 * 432 / (39 * <pixel_clock>) = DSS.DISPC_DIVISOR[6:0]
237 *
238 * NOTE: the explicit equation above is reduced. Do not
239 * try to infer anything from these numbers.
240 */
parse_pixclock(char * pixclock)241 static int parse_pixclock(char *pixclock)
242 {
243 int divisor, pixclock_val;
244 char *pixclk_start = pixclock;
245
246 pixclock_val = simple_strtoul(pixclock, &pixclock, 10);
247 divisor = DIV_ROUND_UP(PIXEL_CLK_NUMERATOR, pixclock_val);
248 /* 0 and 1 are illegal values for PCD */
249 if (divisor <= 1)
250 divisor = 2;
251
252 panel_cfg.divisor = divisor | (1 << 16);
253 if (pixclock[0] != '\0') {
254 printf("LCD: invalid value for pixclock:%s\n", pixclk_start);
255 return -1;
256 }
257
258 return 0;
259 }
260
261 /*
262 * parse_setting() - parse a single setting of custom lcd parameters
263 *
264 * @setting: The custom lcd setting <name>:<value>
265 *
266 * Returns -1 on failure, 0 on success.
267 */
parse_setting(char * setting)268 static int parse_setting(char *setting)
269 {
270 int num_val;
271 char *setting_start = setting;
272
273 if (!strncmp(setting, "mode:", 5)) {
274 return parse_mode(setting + 5);
275 } else if (!strncmp(setting, "pixclock:", 9)) {
276 return parse_pixclock(setting + 9);
277 } else if (!strncmp(setting, "left:", 5)) {
278 num_val = simple_strtoul(setting + 5, &setting, 0);
279 panel_cfg.timing_h |= DSS_HBP(num_val);
280 } else if (!strncmp(setting, "right:", 6)) {
281 num_val = simple_strtoul(setting + 6, &setting, 0);
282 panel_cfg.timing_h |= DSS_HFP(num_val);
283 } else if (!strncmp(setting, "upper:", 6)) {
284 num_val = simple_strtoul(setting + 6, &setting, 0);
285 panel_cfg.timing_v |= DSS_VBP(num_val);
286 } else if (!strncmp(setting, "lower:", 6)) {
287 num_val = simple_strtoul(setting + 6, &setting, 0);
288 panel_cfg.timing_v |= DSS_VFP(num_val);
289 } else if (!strncmp(setting, "hsynclen:", 9)) {
290 num_val = simple_strtoul(setting + 9, &setting, 0);
291 panel_cfg.timing_h |= DSS_HSW(num_val);
292 } else if (!strncmp(setting, "vsynclen:", 9)) {
293 num_val = simple_strtoul(setting + 9, &setting, 0);
294 panel_cfg.timing_v |= DSS_VSW(num_val);
295 } else if (!strncmp(setting, "hsync:", 6)) {
296 if (simple_strtoul(setting + 6, &setting, 0) == 0)
297 panel_cfg.pol_freq |= DSS_IHS;
298 else
299 panel_cfg.pol_freq &= ~DSS_IHS;
300 } else if (!strncmp(setting, "vsync:", 6)) {
301 if (simple_strtoul(setting + 6, &setting, 0) == 0)
302 panel_cfg.pol_freq |= DSS_IVS;
303 else
304 panel_cfg.pol_freq &= ~DSS_IVS;
305 } else if (!strncmp(setting, "outputen:", 9)) {
306 if (simple_strtoul(setting + 9, &setting, 0) == 0)
307 panel_cfg.pol_freq |= DSS_IEO;
308 else
309 panel_cfg.pol_freq &= ~DSS_IEO;
310 } else if (!strncmp(setting, "pixclockpol:", 12)) {
311 if (simple_strtoul(setting + 12, &setting, 0) == 0)
312 panel_cfg.pol_freq |= DSS_IPC;
313 else
314 panel_cfg.pol_freq &= ~DSS_IPC;
315 } else if (!strncmp(setting, "active", 6)) {
316 panel_cfg.panel_type = ACTIVE_DISPLAY;
317 return 0; /* Avoid sanity check below */
318 } else if (!strncmp(setting, "passive", 7)) {
319 panel_cfg.panel_type = PASSIVE_DISPLAY;
320 return 0; /* Avoid sanity check below */
321 } else if (!strncmp(setting, "display:", 8)) {
322 if (!strncmp(setting + 8, "dvi", 3)) {
323 lcd_def = DVI_CUSTOM;
324 return 0; /* Avoid sanity check below */
325 }
326 } else {
327 printf("LCD: unknown option %s\n", setting_start);
328 return -1;
329 }
330
331 if (setting[0] != '\0') {
332 printf("LCD: invalid value for %s\n", setting_start);
333 return -1;
334 }
335
336 return 0;
337 }
338
339 /*
340 * env_parse_customlcd() - parse custom lcd params from an environment variable.
341 *
342 * @custom_lcd_params: The environment variable containing the lcd params.
343 *
344 * Returns -1 on failure, 0 on success.
345 */
parse_customlcd(char * custom_lcd_params)346 static int parse_customlcd(char *custom_lcd_params)
347 {
348 char params_cpy[160];
349 char *setting;
350
351 strncpy(params_cpy, custom_lcd_params, 160);
352 setting = strtok(params_cpy, ",");
353 while (setting) {
354 if (parse_setting(setting) < 0)
355 return -1;
356
357 setting = strtok(NULL, ",");
358 }
359
360 /* Currently we don't support changing this via custom lcd params */
361 panel_cfg.data_lines = LCD_INTERFACE_24_BIT;
362 panel_cfg.gfx_format = GFXFORMAT_RGB16; /* See dvi predefines note */
363
364 return 0;
365 }
366
367 /*
368 * env_parse_displaytype() - parse display type.
369 *
370 * Parses the environment variable "displaytype", which contains the
371 * name of the display type or preset, in which case it applies its
372 * configurations.
373 *
374 * Returns the type of display that was specified.
375 */
env_parse_displaytype(char * displaytype)376 static enum display_type env_parse_displaytype(char *displaytype)
377 {
378 if (!strncmp(displaytype, "dvi640x480", 10))
379 return set_dvi_preset(preset_dvi_640X480, 640, 480);
380 else if (!strncmp(displaytype, "dvi800x600", 10))
381 return set_dvi_preset(preset_dvi_800X600, 800, 600);
382 else if (!strncmp(displaytype, "dvi1024x768", 11))
383 return set_dvi_preset(preset_dvi_1024X768, 1024, 768);
384 else if (!strncmp(displaytype, "dvi1152x864", 11))
385 return set_dvi_preset(preset_dvi_1152X864, 1152, 864);
386 else if (!strncmp(displaytype, "dvi1280x960", 11))
387 return set_dvi_preset(preset_dvi_1280X960, 1280, 960);
388 else if (!strncmp(displaytype, "dvi1280x1024", 12))
389 return set_dvi_preset(preset_dvi_1280X1024, 1280, 1024);
390 else if (!strncmp(displaytype, "dataimage480x800", 16))
391 return set_dataimage_preset(preset_dataimage_480X800, 480, 800);
392
393 return NONE;
394 }
395
lcd_ctrl_init(void * lcdbase)396 void lcd_ctrl_init(void *lcdbase)
397 {
398 struct prcm *prcm = (struct prcm *)PRCM_BASE;
399 char *custom_lcd;
400 char *displaytype = env_get("displaytype");
401
402 if (displaytype == NULL)
403 return;
404
405 lcd_def = env_parse_displaytype(displaytype);
406 /* If we did not recognize the preset, check if it's an env variable */
407 if (lcd_def == NONE) {
408 custom_lcd = env_get(displaytype);
409 if (custom_lcd == NULL || parse_customlcd(custom_lcd) < 0)
410 return;
411 }
412
413 panel_cfg.frame_buffer = lcdbase;
414 omap3_dss_panel_config(&panel_cfg);
415 /*
416 * Pixel clock is defined with many divisions and only few
417 * multiplications of the system clock. Since DSS FCLK divisor is set
418 * to 16 by default, we need to set it to a smaller value, like 3
419 * (chosen via trial and error).
420 */
421 clrsetbits_le32(&prcm->clksel_dss, 0xF, 3);
422 }
423
424 #ifdef CONFIG_SCF0403_LCD
scf0403_enable(void)425 static void scf0403_enable(void)
426 {
427 gpio_direction_output(58, 1);
428 scf0403_init(157);
429 }
430 #else
scf0403_enable(void)431 static inline void scf0403_enable(void) {}
432 #endif
433
lcd_enable(void)434 void lcd_enable(void)
435 {
436 switch (lcd_def) {
437 case NONE:
438 return;
439 case DVI:
440 case DVI_CUSTOM:
441 gpio_direction_output(54, 0); /* Turn on DVI */
442 break;
443 case DATA_IMAGE:
444 scf0403_enable();
445 break;
446 }
447
448 omap3_dss_enable();
449 }
450
lcd_setcolreg(ushort regno,ushort red,ushort green,ushort blue)451 void lcd_setcolreg(ushort regno, ushort red, ushort green, ushort blue) {}
452