xref: /openbmc/linux/drivers/net/phy/phylink.c (revision 6d0bbeaf)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * phylink models the MAC to optional PHY connection, supporting
4  * technologies such as SFP cages where the PHY is hot-pluggable.
5  *
6  * Copyright (C) 2015 Russell King
7  */
8 #include <linux/acpi.h>
9 #include <linux/ethtool.h>
10 #include <linux/export.h>
11 #include <linux/gpio/consumer.h>
12 #include <linux/netdevice.h>
13 #include <linux/of.h>
14 #include <linux/of_mdio.h>
15 #include <linux/phy.h>
16 #include <linux/phy_fixed.h>
17 #include <linux/phylink.h>
18 #include <linux/rtnetlink.h>
19 #include <linux/spinlock.h>
20 #include <linux/timer.h>
21 #include <linux/workqueue.h>
22 
23 #include "sfp.h"
24 #include "swphy.h"
25 
26 #define SUPPORTED_INTERFACES \
27 	(SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \
28 	 SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane)
29 #define ADVERTISED_INTERFACES \
30 	(ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \
31 	 ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane)
32 
33 enum {
34 	PHYLINK_DISABLE_STOPPED,
35 	PHYLINK_DISABLE_LINK,
36 	PHYLINK_DISABLE_MAC_WOL,
37 
38 	PCS_STATE_DOWN = 0,
39 	PCS_STATE_STARTING,
40 	PCS_STATE_STARTED,
41 };
42 
43 /**
44  * struct phylink - internal data type for phylink
45  */
46 struct phylink {
47 	/* private: */
48 	struct net_device *netdev;
49 	const struct phylink_mac_ops *mac_ops;
50 	struct phylink_config *config;
51 	struct phylink_pcs *pcs;
52 	struct device *dev;
53 	unsigned int old_link_state:1;
54 
55 	unsigned long phylink_disable_state; /* bitmask of disables */
56 	struct phy_device *phydev;
57 	phy_interface_t link_interface;	/* PHY_INTERFACE_xxx */
58 	u8 cfg_link_an_mode;		/* MLO_AN_xxx */
59 	u8 cur_link_an_mode;
60 	u8 link_port;			/* The current non-phy ethtool port */
61 	__ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
62 
63 	/* The link configuration settings */
64 	struct phylink_link_state link_config;
65 
66 	/* The current settings */
67 	phy_interface_t cur_interface;
68 
69 	struct gpio_desc *link_gpio;
70 	unsigned int link_irq;
71 	struct timer_list link_poll;
72 	void (*get_fixed_state)(struct net_device *dev,
73 				struct phylink_link_state *s);
74 
75 	struct mutex state_mutex;
76 	struct phylink_link_state phy_state;
77 	struct work_struct resolve;
78 	unsigned int pcs_neg_mode;
79 	unsigned int pcs_state;
80 
81 	bool mac_link_dropped;
82 	bool using_mac_select_pcs;
83 
84 	struct sfp_bus *sfp_bus;
85 	bool sfp_may_have_phy;
86 	DECLARE_PHY_INTERFACE_MASK(sfp_interfaces);
87 	__ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support);
88 	u8 sfp_port;
89 };
90 
91 #define phylink_printk(level, pl, fmt, ...) \
92 	do { \
93 		if ((pl)->config->type == PHYLINK_NETDEV) \
94 			netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \
95 		else if ((pl)->config->type == PHYLINK_DEV) \
96 			dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \
97 	} while (0)
98 
99 #define phylink_err(pl, fmt, ...) \
100 	phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__)
101 #define phylink_warn(pl, fmt, ...) \
102 	phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__)
103 #define phylink_info(pl, fmt, ...) \
104 	phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__)
105 #if defined(CONFIG_DYNAMIC_DEBUG)
106 #define phylink_dbg(pl, fmt, ...) \
107 do {									\
108 	if ((pl)->config->type == PHYLINK_NETDEV)			\
109 		netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__);		\
110 	else if ((pl)->config->type == PHYLINK_DEV)			\
111 		dev_dbg((pl)->dev, fmt, ##__VA_ARGS__);			\
112 } while (0)
113 #elif defined(DEBUG)
114 #define phylink_dbg(pl, fmt, ...)					\
115 	phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__)
116 #else
117 #define phylink_dbg(pl, fmt, ...)					\
118 ({									\
119 	if (0)								\
120 		phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__);	\
121 })
122 #endif
123 
124 /**
125  * phylink_set_port_modes() - set the port type modes in the ethtool mask
126  * @mask: ethtool link mode mask
127  *
128  * Sets all the port type modes in the ethtool mask.  MAC drivers should
129  * use this in their 'validate' callback.
130  */
phylink_set_port_modes(unsigned long * mask)131 void phylink_set_port_modes(unsigned long *mask)
132 {
133 	phylink_set(mask, TP);
134 	phylink_set(mask, AUI);
135 	phylink_set(mask, MII);
136 	phylink_set(mask, FIBRE);
137 	phylink_set(mask, BNC);
138 	phylink_set(mask, Backplane);
139 }
140 EXPORT_SYMBOL_GPL(phylink_set_port_modes);
141 
phylink_is_empty_linkmode(const unsigned long * linkmode)142 static int phylink_is_empty_linkmode(const unsigned long *linkmode)
143 {
144 	__ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, };
145 
146 	phylink_set_port_modes(tmp);
147 	phylink_set(tmp, Autoneg);
148 	phylink_set(tmp, Pause);
149 	phylink_set(tmp, Asym_Pause);
150 
151 	return linkmode_subset(linkmode, tmp);
152 }
153 
phylink_an_mode_str(unsigned int mode)154 static const char *phylink_an_mode_str(unsigned int mode)
155 {
156 	static const char *modestr[] = {
157 		[MLO_AN_PHY] = "phy",
158 		[MLO_AN_FIXED] = "fixed",
159 		[MLO_AN_INBAND] = "inband",
160 	};
161 
162 	return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown";
163 }
164 
phylink_interface_signal_rate(phy_interface_t interface)165 static unsigned int phylink_interface_signal_rate(phy_interface_t interface)
166 {
167 	switch (interface) {
168 	case PHY_INTERFACE_MODE_SGMII:
169 	case PHY_INTERFACE_MODE_1000BASEX: /* 1.25Mbd */
170 		return 1250;
171 	case PHY_INTERFACE_MODE_2500BASEX: /* 3.125Mbd */
172 		return 3125;
173 	case PHY_INTERFACE_MODE_5GBASER: /* 5.15625Mbd */
174 		return 5156;
175 	case PHY_INTERFACE_MODE_10GBASER: /* 10.3125Mbd */
176 		return 10313;
177 	default:
178 		return 0;
179 	}
180 }
181 
182 /**
183  * phylink_interface_max_speed() - get the maximum speed of a phy interface
184  * @interface: phy interface mode defined by &typedef phy_interface_t
185  *
186  * Determine the maximum speed of a phy interface. This is intended to help
187  * determine the correct speed to pass to the MAC when the phy is performing
188  * rate matching.
189  *
190  * Return: The maximum speed of @interface
191  */
phylink_interface_max_speed(phy_interface_t interface)192 static int phylink_interface_max_speed(phy_interface_t interface)
193 {
194 	switch (interface) {
195 	case PHY_INTERFACE_MODE_100BASEX:
196 	case PHY_INTERFACE_MODE_REVRMII:
197 	case PHY_INTERFACE_MODE_RMII:
198 	case PHY_INTERFACE_MODE_SMII:
199 	case PHY_INTERFACE_MODE_REVMII:
200 	case PHY_INTERFACE_MODE_MII:
201 		return SPEED_100;
202 
203 	case PHY_INTERFACE_MODE_TBI:
204 	case PHY_INTERFACE_MODE_MOCA:
205 	case PHY_INTERFACE_MODE_RTBI:
206 	case PHY_INTERFACE_MODE_1000BASEX:
207 	case PHY_INTERFACE_MODE_1000BASEKX:
208 	case PHY_INTERFACE_MODE_TRGMII:
209 	case PHY_INTERFACE_MODE_RGMII_TXID:
210 	case PHY_INTERFACE_MODE_RGMII_RXID:
211 	case PHY_INTERFACE_MODE_RGMII_ID:
212 	case PHY_INTERFACE_MODE_RGMII:
213 	case PHY_INTERFACE_MODE_PSGMII:
214 	case PHY_INTERFACE_MODE_QSGMII:
215 	case PHY_INTERFACE_MODE_QUSGMII:
216 	case PHY_INTERFACE_MODE_SGMII:
217 	case PHY_INTERFACE_MODE_GMII:
218 		return SPEED_1000;
219 
220 	case PHY_INTERFACE_MODE_2500BASEX:
221 		return SPEED_2500;
222 
223 	case PHY_INTERFACE_MODE_5GBASER:
224 		return SPEED_5000;
225 
226 	case PHY_INTERFACE_MODE_XGMII:
227 	case PHY_INTERFACE_MODE_RXAUI:
228 	case PHY_INTERFACE_MODE_XAUI:
229 	case PHY_INTERFACE_MODE_10GBASER:
230 	case PHY_INTERFACE_MODE_10GKR:
231 	case PHY_INTERFACE_MODE_USXGMII:
232 		return SPEED_10000;
233 
234 	case PHY_INTERFACE_MODE_25GBASER:
235 		return SPEED_25000;
236 
237 	case PHY_INTERFACE_MODE_XLGMII:
238 		return SPEED_40000;
239 
240 	case PHY_INTERFACE_MODE_INTERNAL:
241 	case PHY_INTERFACE_MODE_NA:
242 	case PHY_INTERFACE_MODE_MAX:
243 		/* No idea! Garbage in, unknown out */
244 		return SPEED_UNKNOWN;
245 	}
246 
247 	/* If we get here, someone forgot to add an interface mode above */
248 	WARN_ON_ONCE(1);
249 	return SPEED_UNKNOWN;
250 }
251 
252 /**
253  * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes
254  * @linkmodes: ethtool linkmode mask (must be already initialised)
255  * @caps: bitmask of MAC capabilities
256  *
257  * Set all possible pause, speed and duplex linkmodes in @linkmodes that are
258  * supported by the @caps. @linkmodes must have been initialised previously.
259  */
phylink_caps_to_linkmodes(unsigned long * linkmodes,unsigned long caps)260 void phylink_caps_to_linkmodes(unsigned long *linkmodes, unsigned long caps)
261 {
262 	if (caps & MAC_SYM_PAUSE)
263 		__set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes);
264 
265 	if (caps & MAC_ASYM_PAUSE)
266 		__set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes);
267 
268 	if (caps & MAC_10HD) {
269 		__set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes);
270 		__set_bit(ETHTOOL_LINK_MODE_10baseT1S_Half_BIT, linkmodes);
271 		__set_bit(ETHTOOL_LINK_MODE_10baseT1S_P2MP_Half_BIT, linkmodes);
272 	}
273 
274 	if (caps & MAC_10FD) {
275 		__set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes);
276 		__set_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT, linkmodes);
277 		__set_bit(ETHTOOL_LINK_MODE_10baseT1S_Full_BIT, linkmodes);
278 	}
279 
280 	if (caps & MAC_100HD) {
281 		__set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes);
282 		__set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT, linkmodes);
283 	}
284 
285 	if (caps & MAC_100FD) {
286 		__set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, linkmodes);
287 		__set_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, linkmodes);
288 		__set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT, linkmodes);
289 	}
290 
291 	if (caps & MAC_1000HD)
292 		__set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, linkmodes);
293 
294 	if (caps & MAC_1000FD) {
295 		__set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, linkmodes);
296 		__set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, linkmodes);
297 		__set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, linkmodes);
298 		__set_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, linkmodes);
299 	}
300 
301 	if (caps & MAC_2500FD) {
302 		__set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, linkmodes);
303 		__set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, linkmodes);
304 	}
305 
306 	if (caps & MAC_5000FD)
307 		__set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, linkmodes);
308 
309 	if (caps & MAC_10000FD) {
310 		__set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, linkmodes);
311 		__set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, linkmodes);
312 		__set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, linkmodes);
313 		__set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, linkmodes);
314 		__set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, linkmodes);
315 		__set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, linkmodes);
316 		__set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, linkmodes);
317 		__set_bit(ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, linkmodes);
318 		__set_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT, linkmodes);
319 	}
320 
321 	if (caps & MAC_25000FD) {
322 		__set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes);
323 		__set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes);
324 		__set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes);
325 	}
326 
327 	if (caps & MAC_40000FD) {
328 		__set_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, linkmodes);
329 		__set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, linkmodes);
330 		__set_bit(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, linkmodes);
331 		__set_bit(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, linkmodes);
332 	}
333 
334 	if (caps & MAC_50000FD) {
335 		__set_bit(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, linkmodes);
336 		__set_bit(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, linkmodes);
337 		__set_bit(ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, linkmodes);
338 		__set_bit(ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, linkmodes);
339 		__set_bit(ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, linkmodes);
340 		__set_bit(ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, linkmodes);
341 		__set_bit(ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT,
342 			  linkmodes);
343 		__set_bit(ETHTOOL_LINK_MODE_50000baseDR_Full_BIT, linkmodes);
344 	}
345 
346 	if (caps & MAC_56000FD) {
347 		__set_bit(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, linkmodes);
348 		__set_bit(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, linkmodes);
349 		__set_bit(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, linkmodes);
350 		__set_bit(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, linkmodes);
351 	}
352 
353 	if (caps & MAC_100000FD) {
354 		__set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, linkmodes);
355 		__set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, linkmodes);
356 		__set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, linkmodes);
357 		__set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
358 			  linkmodes);
359 		__set_bit(ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, linkmodes);
360 		__set_bit(ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, linkmodes);
361 		__set_bit(ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, linkmodes);
362 		__set_bit(ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT,
363 			  linkmodes);
364 		__set_bit(ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT, linkmodes);
365 		__set_bit(ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, linkmodes);
366 		__set_bit(ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, linkmodes);
367 		__set_bit(ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT,
368 			  linkmodes);
369 		__set_bit(ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, linkmodes);
370 		__set_bit(ETHTOOL_LINK_MODE_100000baseDR_Full_BIT, linkmodes);
371 	}
372 
373 	if (caps & MAC_200000FD) {
374 		__set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, linkmodes);
375 		__set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, linkmodes);
376 		__set_bit(ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT,
377 			  linkmodes);
378 		__set_bit(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT, linkmodes);
379 		__set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, linkmodes);
380 		__set_bit(ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, linkmodes);
381 		__set_bit(ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, linkmodes);
382 		__set_bit(ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT,
383 			  linkmodes);
384 		__set_bit(ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT, linkmodes);
385 		__set_bit(ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, linkmodes);
386 	}
387 
388 	if (caps & MAC_400000FD) {
389 		__set_bit(ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, linkmodes);
390 		__set_bit(ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, linkmodes);
391 		__set_bit(ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT,
392 			  linkmodes);
393 		__set_bit(ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT, linkmodes);
394 		__set_bit(ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, linkmodes);
395 		__set_bit(ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, linkmodes);
396 		__set_bit(ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, linkmodes);
397 		__set_bit(ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT,
398 			  linkmodes);
399 		__set_bit(ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT, linkmodes);
400 		__set_bit(ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, linkmodes);
401 	}
402 }
403 EXPORT_SYMBOL_GPL(phylink_caps_to_linkmodes);
404 
405 static struct {
406 	unsigned long mask;
407 	int speed;
408 	unsigned int duplex;
409 } phylink_caps_params[] = {
410 	{ MAC_400000FD, SPEED_400000, DUPLEX_FULL },
411 	{ MAC_200000FD, SPEED_200000, DUPLEX_FULL },
412 	{ MAC_100000FD, SPEED_100000, DUPLEX_FULL },
413 	{ MAC_56000FD,  SPEED_56000,  DUPLEX_FULL },
414 	{ MAC_50000FD,  SPEED_50000,  DUPLEX_FULL },
415 	{ MAC_40000FD,  SPEED_40000,  DUPLEX_FULL },
416 	{ MAC_25000FD,  SPEED_25000,  DUPLEX_FULL },
417 	{ MAC_20000FD,  SPEED_20000,  DUPLEX_FULL },
418 	{ MAC_10000FD,  SPEED_10000,  DUPLEX_FULL },
419 	{ MAC_5000FD,   SPEED_5000,   DUPLEX_FULL },
420 	{ MAC_2500FD,   SPEED_2500,   DUPLEX_FULL },
421 	{ MAC_1000FD,   SPEED_1000,   DUPLEX_FULL },
422 	{ MAC_1000HD,   SPEED_1000,   DUPLEX_HALF },
423 	{ MAC_100FD,    SPEED_100,    DUPLEX_FULL },
424 	{ MAC_100HD,    SPEED_100,    DUPLEX_HALF },
425 	{ MAC_10FD,     SPEED_10,     DUPLEX_FULL },
426 	{ MAC_10HD,     SPEED_10,     DUPLEX_HALF },
427 };
428 
429 /**
430  * phylink_limit_mac_speed - limit the phylink_config to a maximum speed
431  * @config: pointer to a &struct phylink_config
432  * @max_speed: maximum speed
433  *
434  * Mask off MAC capabilities for speeds higher than the @max_speed parameter.
435  * Any further motifications of config.mac_capabilities will override this.
436  */
phylink_limit_mac_speed(struct phylink_config * config,u32 max_speed)437 void phylink_limit_mac_speed(struct phylink_config *config, u32 max_speed)
438 {
439 	int i;
440 
441 	for (i = 0; i < ARRAY_SIZE(phylink_caps_params) &&
442 		    phylink_caps_params[i].speed > max_speed; i++)
443 		config->mac_capabilities &= ~phylink_caps_params[i].mask;
444 }
445 EXPORT_SYMBOL_GPL(phylink_limit_mac_speed);
446 
447 /**
448  * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex
449  * @speed: the speed to search for
450  * @duplex: the duplex to search for
451  *
452  * Find the mac capability for a given speed and duplex.
453  *
454  * Return: A mask with the mac capability patching @speed and @duplex, or 0 if
455  *         there were no matches.
456  */
phylink_cap_from_speed_duplex(int speed,unsigned int duplex)457 static unsigned long phylink_cap_from_speed_duplex(int speed,
458 						   unsigned int duplex)
459 {
460 	int i;
461 
462 	for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) {
463 		if (speed == phylink_caps_params[i].speed &&
464 		    duplex == phylink_caps_params[i].duplex)
465 			return phylink_caps_params[i].mask;
466 	}
467 
468 	return 0;
469 }
470 
471 /**
472  * phylink_get_capabilities() - get capabilities for a given MAC
473  * @interface: phy interface mode defined by &typedef phy_interface_t
474  * @mac_capabilities: bitmask of MAC capabilities
475  * @rate_matching: type of rate matching being performed
476  *
477  * Get the MAC capabilities that are supported by the @interface mode and
478  * @mac_capabilities.
479  */
phylink_get_capabilities(phy_interface_t interface,unsigned long mac_capabilities,int rate_matching)480 unsigned long phylink_get_capabilities(phy_interface_t interface,
481 				       unsigned long mac_capabilities,
482 				       int rate_matching)
483 {
484 	int max_speed = phylink_interface_max_speed(interface);
485 	unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE;
486 	unsigned long matched_caps = 0;
487 
488 	switch (interface) {
489 	case PHY_INTERFACE_MODE_USXGMII:
490 		caps |= MAC_10000FD | MAC_5000FD | MAC_2500FD;
491 		fallthrough;
492 
493 	case PHY_INTERFACE_MODE_RGMII_TXID:
494 	case PHY_INTERFACE_MODE_RGMII_RXID:
495 	case PHY_INTERFACE_MODE_RGMII_ID:
496 	case PHY_INTERFACE_MODE_RGMII:
497 	case PHY_INTERFACE_MODE_PSGMII:
498 	case PHY_INTERFACE_MODE_QSGMII:
499 	case PHY_INTERFACE_MODE_QUSGMII:
500 	case PHY_INTERFACE_MODE_SGMII:
501 	case PHY_INTERFACE_MODE_GMII:
502 		caps |= MAC_1000HD | MAC_1000FD;
503 		fallthrough;
504 
505 	case PHY_INTERFACE_MODE_REVRMII:
506 	case PHY_INTERFACE_MODE_RMII:
507 	case PHY_INTERFACE_MODE_SMII:
508 	case PHY_INTERFACE_MODE_REVMII:
509 	case PHY_INTERFACE_MODE_MII:
510 		caps |= MAC_10HD | MAC_10FD;
511 		fallthrough;
512 
513 	case PHY_INTERFACE_MODE_100BASEX:
514 		caps |= MAC_100HD | MAC_100FD;
515 		break;
516 
517 	case PHY_INTERFACE_MODE_TBI:
518 	case PHY_INTERFACE_MODE_MOCA:
519 	case PHY_INTERFACE_MODE_RTBI:
520 	case PHY_INTERFACE_MODE_1000BASEX:
521 		caps |= MAC_1000HD;
522 		fallthrough;
523 	case PHY_INTERFACE_MODE_1000BASEKX:
524 	case PHY_INTERFACE_MODE_TRGMII:
525 		caps |= MAC_1000FD;
526 		break;
527 
528 	case PHY_INTERFACE_MODE_2500BASEX:
529 		caps |= MAC_2500FD;
530 		break;
531 
532 	case PHY_INTERFACE_MODE_5GBASER:
533 		caps |= MAC_5000FD;
534 		break;
535 
536 	case PHY_INTERFACE_MODE_XGMII:
537 	case PHY_INTERFACE_MODE_RXAUI:
538 	case PHY_INTERFACE_MODE_XAUI:
539 	case PHY_INTERFACE_MODE_10GBASER:
540 	case PHY_INTERFACE_MODE_10GKR:
541 		caps |= MAC_10000FD;
542 		break;
543 
544 	case PHY_INTERFACE_MODE_25GBASER:
545 		caps |= MAC_25000FD;
546 		break;
547 
548 	case PHY_INTERFACE_MODE_XLGMII:
549 		caps |= MAC_40000FD;
550 		break;
551 
552 	case PHY_INTERFACE_MODE_INTERNAL:
553 		caps |= ~0;
554 		break;
555 
556 	case PHY_INTERFACE_MODE_NA:
557 	case PHY_INTERFACE_MODE_MAX:
558 		break;
559 	}
560 
561 	switch (rate_matching) {
562 	case RATE_MATCH_OPEN_LOOP:
563 		/* TODO */
564 		fallthrough;
565 	case RATE_MATCH_NONE:
566 		matched_caps = 0;
567 		break;
568 	case RATE_MATCH_PAUSE: {
569 		/* The MAC must support asymmetric pause towards the local
570 		 * device for this. We could allow just symmetric pause, but
571 		 * then we might have to renegotiate if the link partner
572 		 * doesn't support pause. This is because there's no way to
573 		 * accept pause frames without transmitting them if we only
574 		 * support symmetric pause.
575 		 */
576 		if (!(mac_capabilities & MAC_SYM_PAUSE) ||
577 		    !(mac_capabilities & MAC_ASYM_PAUSE))
578 			break;
579 
580 		/* We can't adapt if the MAC doesn't support the interface's
581 		 * max speed at full duplex.
582 		 */
583 		if (mac_capabilities &
584 		    phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL)) {
585 			/* Although a duplex-matching phy might exist, we
586 			 * conservatively remove these modes because the MAC
587 			 * will not be aware of the half-duplex nature of the
588 			 * link.
589 			 */
590 			matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD));
591 			matched_caps &= ~(MAC_1000HD | MAC_100HD | MAC_10HD);
592 		}
593 		break;
594 	}
595 	case RATE_MATCH_CRS:
596 		/* The MAC must support half duplex at the interface's max
597 		 * speed.
598 		 */
599 		if (mac_capabilities &
600 		    phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) {
601 			matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD));
602 			matched_caps &= mac_capabilities;
603 		}
604 		break;
605 	}
606 
607 	return (caps & mac_capabilities) | matched_caps;
608 }
609 EXPORT_SYMBOL_GPL(phylink_get_capabilities);
610 
611 /**
612  * phylink_validate_mask_caps() - Restrict link modes based on caps
613  * @supported: ethtool bitmask for supported link modes.
614  * @state: pointer to a &struct phylink_link_state.
615  * @mac_capabilities: bitmask of MAC capabilities
616  *
617  * Calculate the supported link modes based on @mac_capabilities, and restrict
618  * @supported and @state based on that. Use this function if your capabiliies
619  * aren't constant, such as if they vary depending on the interface.
620  */
phylink_validate_mask_caps(unsigned long * supported,struct phylink_link_state * state,unsigned long mac_capabilities)621 void phylink_validate_mask_caps(unsigned long *supported,
622 				struct phylink_link_state *state,
623 				unsigned long mac_capabilities)
624 {
625 	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
626 	unsigned long caps;
627 
628 	phylink_set_port_modes(mask);
629 	phylink_set(mask, Autoneg);
630 	caps = phylink_get_capabilities(state->interface, mac_capabilities,
631 					state->rate_matching);
632 	phylink_caps_to_linkmodes(mask, caps);
633 
634 	linkmode_and(supported, supported, mask);
635 	linkmode_and(state->advertising, state->advertising, mask);
636 }
637 EXPORT_SYMBOL_GPL(phylink_validate_mask_caps);
638 
639 /**
640  * phylink_generic_validate() - generic validate() callback implementation
641  * @config: a pointer to a &struct phylink_config.
642  * @supported: ethtool bitmask for supported link modes.
643  * @state: a pointer to a &struct phylink_link_state.
644  *
645  * Generic implementation of the validate() callback that MAC drivers can
646  * use when they pass the range of supported interfaces and MAC capabilities.
647  */
phylink_generic_validate(struct phylink_config * config,unsigned long * supported,struct phylink_link_state * state)648 void phylink_generic_validate(struct phylink_config *config,
649 			      unsigned long *supported,
650 			      struct phylink_link_state *state)
651 {
652 	phylink_validate_mask_caps(supported, state, config->mac_capabilities);
653 }
654 EXPORT_SYMBOL_GPL(phylink_generic_validate);
655 
phylink_validate_mac_and_pcs(struct phylink * pl,unsigned long * supported,struct phylink_link_state * state)656 static int phylink_validate_mac_and_pcs(struct phylink *pl,
657 					unsigned long *supported,
658 					struct phylink_link_state *state)
659 {
660 	struct phylink_pcs *pcs;
661 	int ret;
662 
663 	/* Get the PCS for this interface mode */
664 	if (pl->using_mac_select_pcs) {
665 		pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface);
666 		if (IS_ERR(pcs))
667 			return PTR_ERR(pcs);
668 	} else {
669 		pcs = pl->pcs;
670 	}
671 
672 	if (pcs) {
673 		/* The PCS, if present, must be setup before phylink_create()
674 		 * has been called. If the ops is not initialised, print an
675 		 * error and backtrace rather than oopsing the kernel.
676 		 */
677 		if (!pcs->ops) {
678 			phylink_err(pl, "interface %s: uninitialised PCS\n",
679 				    phy_modes(state->interface));
680 			dump_stack();
681 			return -EINVAL;
682 		}
683 
684 		/* Validate the link parameters with the PCS */
685 		if (pcs->ops->pcs_validate) {
686 			ret = pcs->ops->pcs_validate(pcs, supported, state);
687 			if (ret < 0 || phylink_is_empty_linkmode(supported))
688 				return -EINVAL;
689 
690 			/* Ensure the advertising mask is a subset of the
691 			 * supported mask.
692 			 */
693 			linkmode_and(state->advertising, state->advertising,
694 				     supported);
695 		}
696 	}
697 
698 	/* Then validate the link parameters with the MAC */
699 	if (pl->mac_ops->validate)
700 		pl->mac_ops->validate(pl->config, supported, state);
701 	else
702 		phylink_generic_validate(pl->config, supported, state);
703 
704 	return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
705 }
706 
phylink_validate_mask(struct phylink * pl,unsigned long * supported,struct phylink_link_state * state,const unsigned long * interfaces)707 static int phylink_validate_mask(struct phylink *pl, unsigned long *supported,
708 				 struct phylink_link_state *state,
709 				 const unsigned long *interfaces)
710 {
711 	__ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, };
712 	__ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, };
713 	__ETHTOOL_DECLARE_LINK_MODE_MASK(s);
714 	struct phylink_link_state t;
715 	int intf;
716 
717 	for (intf = 0; intf < PHY_INTERFACE_MODE_MAX; intf++) {
718 		if (test_bit(intf, interfaces)) {
719 			linkmode_copy(s, supported);
720 
721 			t = *state;
722 			t.interface = intf;
723 			if (!phylink_validate_mac_and_pcs(pl, s, &t)) {
724 				linkmode_or(all_s, all_s, s);
725 				linkmode_or(all_adv, all_adv, t.advertising);
726 			}
727 		}
728 	}
729 
730 	linkmode_copy(supported, all_s);
731 	linkmode_copy(state->advertising, all_adv);
732 
733 	return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
734 }
735 
phylink_validate(struct phylink * pl,unsigned long * supported,struct phylink_link_state * state)736 static int phylink_validate(struct phylink *pl, unsigned long *supported,
737 			    struct phylink_link_state *state)
738 {
739 	const unsigned long *interfaces = pl->config->supported_interfaces;
740 
741 	if (state->interface == PHY_INTERFACE_MODE_NA)
742 		return phylink_validate_mask(pl, supported, state, interfaces);
743 
744 	if (!test_bit(state->interface, interfaces))
745 		return -EINVAL;
746 
747 	return phylink_validate_mac_and_pcs(pl, supported, state);
748 }
749 
phylink_parse_fixedlink(struct phylink * pl,const struct fwnode_handle * fwnode)750 static int phylink_parse_fixedlink(struct phylink *pl,
751 				   const struct fwnode_handle *fwnode)
752 {
753 	struct fwnode_handle *fixed_node;
754 	bool pause, asym_pause, autoneg;
755 	const struct phy_setting *s;
756 	struct gpio_desc *desc;
757 	u32 speed;
758 	int ret;
759 
760 	fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link");
761 	if (fixed_node) {
762 		ret = fwnode_property_read_u32(fixed_node, "speed", &speed);
763 
764 		pl->link_config.speed = speed;
765 		pl->link_config.duplex = DUPLEX_HALF;
766 
767 		if (fwnode_property_read_bool(fixed_node, "full-duplex"))
768 			pl->link_config.duplex = DUPLEX_FULL;
769 
770 		/* We treat the "pause" and "asym-pause" terminology as
771 		 * defining the link partner's ability.
772 		 */
773 		if (fwnode_property_read_bool(fixed_node, "pause"))
774 			__set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
775 				  pl->link_config.lp_advertising);
776 		if (fwnode_property_read_bool(fixed_node, "asym-pause"))
777 			__set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
778 				  pl->link_config.lp_advertising);
779 
780 		if (ret == 0) {
781 			desc = fwnode_gpiod_get_index(fixed_node, "link", 0,
782 						      GPIOD_IN, "?");
783 
784 			if (!IS_ERR(desc))
785 				pl->link_gpio = desc;
786 			else if (desc == ERR_PTR(-EPROBE_DEFER))
787 				ret = -EPROBE_DEFER;
788 		}
789 		fwnode_handle_put(fixed_node);
790 
791 		if (ret)
792 			return ret;
793 	} else {
794 		u32 prop[5];
795 
796 		ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
797 						     NULL, 0);
798 		if (ret != ARRAY_SIZE(prop)) {
799 			phylink_err(pl, "broken fixed-link?\n");
800 			return -EINVAL;
801 		}
802 
803 		ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
804 						     prop, ARRAY_SIZE(prop));
805 		if (!ret) {
806 			pl->link_config.duplex = prop[1] ?
807 						DUPLEX_FULL : DUPLEX_HALF;
808 			pl->link_config.speed = prop[2];
809 			if (prop[3])
810 				__set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
811 					  pl->link_config.lp_advertising);
812 			if (prop[4])
813 				__set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
814 					  pl->link_config.lp_advertising);
815 		}
816 	}
817 
818 	if (pl->link_config.speed > SPEED_1000 &&
819 	    pl->link_config.duplex != DUPLEX_FULL)
820 		phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n",
821 			     pl->link_config.speed);
822 
823 	bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
824 	linkmode_copy(pl->link_config.advertising, pl->supported);
825 	phylink_validate(pl, pl->supported, &pl->link_config);
826 
827 	pause = phylink_test(pl->supported, Pause);
828 	asym_pause = phylink_test(pl->supported, Asym_Pause);
829 	autoneg = phylink_test(pl->supported, Autoneg);
830 	s = phy_lookup_setting(pl->link_config.speed, pl->link_config.duplex,
831 			       pl->supported, true);
832 	linkmode_zero(pl->supported);
833 	phylink_set(pl->supported, MII);
834 
835 	if (pause)
836 		phylink_set(pl->supported, Pause);
837 
838 	if (asym_pause)
839 		phylink_set(pl->supported, Asym_Pause);
840 
841 	if (autoneg)
842 		phylink_set(pl->supported, Autoneg);
843 
844 	if (s) {
845 		__set_bit(s->bit, pl->supported);
846 		__set_bit(s->bit, pl->link_config.lp_advertising);
847 	} else {
848 		phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n",
849 			     pl->link_config.duplex == DUPLEX_FULL ? "full" : "half",
850 			     pl->link_config.speed);
851 	}
852 
853 	linkmode_and(pl->link_config.advertising, pl->link_config.advertising,
854 		     pl->supported);
855 
856 	pl->link_config.link = 1;
857 	pl->link_config.an_complete = 1;
858 
859 	return 0;
860 }
861 
phylink_parse_mode(struct phylink * pl,const struct fwnode_handle * fwnode)862 static int phylink_parse_mode(struct phylink *pl,
863 			      const struct fwnode_handle *fwnode)
864 {
865 	struct fwnode_handle *dn;
866 	const char *managed;
867 
868 	dn = fwnode_get_named_child_node(fwnode, "fixed-link");
869 	if (dn || fwnode_property_present(fwnode, "fixed-link"))
870 		pl->cfg_link_an_mode = MLO_AN_FIXED;
871 	fwnode_handle_put(dn);
872 
873 	if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 &&
874 	     strcmp(managed, "in-band-status") == 0) ||
875 	    pl->config->ovr_an_inband) {
876 		if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
877 			phylink_err(pl,
878 				    "can't use both fixed-link and in-band-status\n");
879 			return -EINVAL;
880 		}
881 
882 		linkmode_zero(pl->supported);
883 		phylink_set(pl->supported, MII);
884 		phylink_set(pl->supported, Autoneg);
885 		phylink_set(pl->supported, Asym_Pause);
886 		phylink_set(pl->supported, Pause);
887 		pl->cfg_link_an_mode = MLO_AN_INBAND;
888 
889 		switch (pl->link_config.interface) {
890 		case PHY_INTERFACE_MODE_SGMII:
891 		case PHY_INTERFACE_MODE_PSGMII:
892 		case PHY_INTERFACE_MODE_QSGMII:
893 		case PHY_INTERFACE_MODE_QUSGMII:
894 		case PHY_INTERFACE_MODE_RGMII:
895 		case PHY_INTERFACE_MODE_RGMII_ID:
896 		case PHY_INTERFACE_MODE_RGMII_RXID:
897 		case PHY_INTERFACE_MODE_RGMII_TXID:
898 		case PHY_INTERFACE_MODE_RTBI:
899 			phylink_set(pl->supported, 10baseT_Half);
900 			phylink_set(pl->supported, 10baseT_Full);
901 			phylink_set(pl->supported, 100baseT_Half);
902 			phylink_set(pl->supported, 100baseT_Full);
903 			phylink_set(pl->supported, 1000baseT_Half);
904 			phylink_set(pl->supported, 1000baseT_Full);
905 			break;
906 
907 		case PHY_INTERFACE_MODE_1000BASEX:
908 			phylink_set(pl->supported, 1000baseX_Full);
909 			break;
910 
911 		case PHY_INTERFACE_MODE_2500BASEX:
912 			phylink_set(pl->supported, 2500baseX_Full);
913 			break;
914 
915 		case PHY_INTERFACE_MODE_5GBASER:
916 			phylink_set(pl->supported, 5000baseT_Full);
917 			break;
918 
919 		case PHY_INTERFACE_MODE_25GBASER:
920 			phylink_set(pl->supported, 25000baseCR_Full);
921 			phylink_set(pl->supported, 25000baseKR_Full);
922 			phylink_set(pl->supported, 25000baseSR_Full);
923 			fallthrough;
924 		case PHY_INTERFACE_MODE_USXGMII:
925 		case PHY_INTERFACE_MODE_10GKR:
926 		case PHY_INTERFACE_MODE_10GBASER:
927 			phylink_set(pl->supported, 10baseT_Half);
928 			phylink_set(pl->supported, 10baseT_Full);
929 			phylink_set(pl->supported, 100baseT_Half);
930 			phylink_set(pl->supported, 100baseT_Full);
931 			phylink_set(pl->supported, 1000baseT_Half);
932 			phylink_set(pl->supported, 1000baseT_Full);
933 			phylink_set(pl->supported, 1000baseX_Full);
934 			phylink_set(pl->supported, 1000baseKX_Full);
935 			phylink_set(pl->supported, 2500baseT_Full);
936 			phylink_set(pl->supported, 2500baseX_Full);
937 			phylink_set(pl->supported, 5000baseT_Full);
938 			phylink_set(pl->supported, 10000baseT_Full);
939 			phylink_set(pl->supported, 10000baseKR_Full);
940 			phylink_set(pl->supported, 10000baseKX4_Full);
941 			phylink_set(pl->supported, 10000baseCR_Full);
942 			phylink_set(pl->supported, 10000baseSR_Full);
943 			phylink_set(pl->supported, 10000baseLR_Full);
944 			phylink_set(pl->supported, 10000baseLRM_Full);
945 			phylink_set(pl->supported, 10000baseER_Full);
946 			break;
947 
948 		case PHY_INTERFACE_MODE_XLGMII:
949 			phylink_set(pl->supported, 25000baseCR_Full);
950 			phylink_set(pl->supported, 25000baseKR_Full);
951 			phylink_set(pl->supported, 25000baseSR_Full);
952 			phylink_set(pl->supported, 40000baseKR4_Full);
953 			phylink_set(pl->supported, 40000baseCR4_Full);
954 			phylink_set(pl->supported, 40000baseSR4_Full);
955 			phylink_set(pl->supported, 40000baseLR4_Full);
956 			phylink_set(pl->supported, 50000baseCR2_Full);
957 			phylink_set(pl->supported, 50000baseKR2_Full);
958 			phylink_set(pl->supported, 50000baseSR2_Full);
959 			phylink_set(pl->supported, 50000baseKR_Full);
960 			phylink_set(pl->supported, 50000baseSR_Full);
961 			phylink_set(pl->supported, 50000baseCR_Full);
962 			phylink_set(pl->supported, 50000baseLR_ER_FR_Full);
963 			phylink_set(pl->supported, 50000baseDR_Full);
964 			phylink_set(pl->supported, 100000baseKR4_Full);
965 			phylink_set(pl->supported, 100000baseSR4_Full);
966 			phylink_set(pl->supported, 100000baseCR4_Full);
967 			phylink_set(pl->supported, 100000baseLR4_ER4_Full);
968 			phylink_set(pl->supported, 100000baseKR2_Full);
969 			phylink_set(pl->supported, 100000baseSR2_Full);
970 			phylink_set(pl->supported, 100000baseCR2_Full);
971 			phylink_set(pl->supported, 100000baseLR2_ER2_FR2_Full);
972 			phylink_set(pl->supported, 100000baseDR2_Full);
973 			break;
974 
975 		default:
976 			phylink_err(pl,
977 				    "incorrect link mode %s for in-band status\n",
978 				    phy_modes(pl->link_config.interface));
979 			return -EINVAL;
980 		}
981 
982 		linkmode_copy(pl->link_config.advertising, pl->supported);
983 
984 		if (phylink_validate(pl, pl->supported, &pl->link_config)) {
985 			phylink_err(pl,
986 				    "failed to validate link configuration for in-band status\n");
987 			return -EINVAL;
988 		}
989 	}
990 
991 	return 0;
992 }
993 
phylink_apply_manual_flow(struct phylink * pl,struct phylink_link_state * state)994 static void phylink_apply_manual_flow(struct phylink *pl,
995 				      struct phylink_link_state *state)
996 {
997 	/* If autoneg is disabled, pause AN is also disabled */
998 	if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
999 			       state->advertising))
1000 		state->pause &= ~MLO_PAUSE_AN;
1001 
1002 	/* Manual configuration of pause modes */
1003 	if (!(pl->link_config.pause & MLO_PAUSE_AN))
1004 		state->pause = pl->link_config.pause;
1005 }
1006 
phylink_resolve_an_pause(struct phylink_link_state * state)1007 static void phylink_resolve_an_pause(struct phylink_link_state *state)
1008 {
1009 	bool tx_pause, rx_pause;
1010 
1011 	if (state->duplex == DUPLEX_FULL) {
1012 		linkmode_resolve_pause(state->advertising,
1013 				       state->lp_advertising,
1014 				       &tx_pause, &rx_pause);
1015 		if (tx_pause)
1016 			state->pause |= MLO_PAUSE_TX;
1017 		if (rx_pause)
1018 			state->pause |= MLO_PAUSE_RX;
1019 	}
1020 }
1021 
phylink_pcs_pre_config(struct phylink_pcs * pcs,phy_interface_t interface)1022 static void phylink_pcs_pre_config(struct phylink_pcs *pcs,
1023 				   phy_interface_t interface)
1024 {
1025 	if (pcs && pcs->ops->pcs_pre_config)
1026 		pcs->ops->pcs_pre_config(pcs, interface);
1027 }
1028 
phylink_pcs_post_config(struct phylink_pcs * pcs,phy_interface_t interface)1029 static int phylink_pcs_post_config(struct phylink_pcs *pcs,
1030 				   phy_interface_t interface)
1031 {
1032 	int err = 0;
1033 
1034 	if (pcs && pcs->ops->pcs_post_config)
1035 		err = pcs->ops->pcs_post_config(pcs, interface);
1036 
1037 	return err;
1038 }
1039 
phylink_pcs_disable(struct phylink_pcs * pcs)1040 static void phylink_pcs_disable(struct phylink_pcs *pcs)
1041 {
1042 	if (pcs && pcs->ops->pcs_disable)
1043 		pcs->ops->pcs_disable(pcs);
1044 }
1045 
phylink_pcs_enable(struct phylink_pcs * pcs)1046 static int phylink_pcs_enable(struct phylink_pcs *pcs)
1047 {
1048 	int err = 0;
1049 
1050 	if (pcs && pcs->ops->pcs_enable)
1051 		err = pcs->ops->pcs_enable(pcs);
1052 
1053 	return err;
1054 }
1055 
phylink_pcs_config(struct phylink_pcs * pcs,unsigned int neg_mode,const struct phylink_link_state * state,bool permit_pause_to_mac)1056 static int phylink_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode,
1057 			      const struct phylink_link_state *state,
1058 			      bool permit_pause_to_mac)
1059 {
1060 	if (!pcs)
1061 		return 0;
1062 
1063 	return pcs->ops->pcs_config(pcs, neg_mode, state->interface,
1064 				    state->advertising, permit_pause_to_mac);
1065 }
1066 
phylink_pcs_link_up(struct phylink_pcs * pcs,unsigned int neg_mode,phy_interface_t interface,int speed,int duplex)1067 static void phylink_pcs_link_up(struct phylink_pcs *pcs, unsigned int neg_mode,
1068 				phy_interface_t interface, int speed,
1069 				int duplex)
1070 {
1071 	if (pcs && pcs->ops->pcs_link_up)
1072 		pcs->ops->pcs_link_up(pcs, neg_mode, interface, speed, duplex);
1073 }
1074 
phylink_pcs_poll_stop(struct phylink * pl)1075 static void phylink_pcs_poll_stop(struct phylink *pl)
1076 {
1077 	if (pl->cfg_link_an_mode == MLO_AN_INBAND)
1078 		del_timer(&pl->link_poll);
1079 }
1080 
phylink_pcs_poll_start(struct phylink * pl)1081 static void phylink_pcs_poll_start(struct phylink *pl)
1082 {
1083 	if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND)
1084 		mod_timer(&pl->link_poll, jiffies + HZ);
1085 }
1086 
phylink_mac_config(struct phylink * pl,const struct phylink_link_state * state)1087 static void phylink_mac_config(struct phylink *pl,
1088 			       const struct phylink_link_state *state)
1089 {
1090 	struct phylink_link_state st = *state;
1091 
1092 	/* Stop drivers incorrectly using these */
1093 	linkmode_zero(st.lp_advertising);
1094 	st.speed = SPEED_UNKNOWN;
1095 	st.duplex = DUPLEX_UNKNOWN;
1096 	st.an_complete = false;
1097 	st.link = false;
1098 
1099 	phylink_dbg(pl,
1100 		    "%s: mode=%s/%s/%s adv=%*pb pause=%02x\n",
1101 		    __func__, phylink_an_mode_str(pl->cur_link_an_mode),
1102 		    phy_modes(st.interface),
1103 		    phy_rate_matching_to_str(st.rate_matching),
1104 		    __ETHTOOL_LINK_MODE_MASK_NBITS, st.advertising,
1105 		    st.pause);
1106 
1107 	pl->mac_ops->mac_config(pl->config, pl->cur_link_an_mode, &st);
1108 }
1109 
phylink_pcs_an_restart(struct phylink * pl)1110 static void phylink_pcs_an_restart(struct phylink *pl)
1111 {
1112 	if (pl->pcs && linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
1113 					 pl->link_config.advertising) &&
1114 	    phy_interface_mode_is_8023z(pl->link_config.interface) &&
1115 	    phylink_autoneg_inband(pl->cur_link_an_mode))
1116 		pl->pcs->ops->pcs_an_restart(pl->pcs);
1117 }
1118 
phylink_major_config(struct phylink * pl,bool restart,const struct phylink_link_state * state)1119 static void phylink_major_config(struct phylink *pl, bool restart,
1120 				  const struct phylink_link_state *state)
1121 {
1122 	struct phylink_pcs *pcs = NULL;
1123 	bool pcs_changed = false;
1124 	unsigned int rate_kbd;
1125 	unsigned int neg_mode;
1126 	int err;
1127 
1128 	phylink_dbg(pl, "major config %s\n", phy_modes(state->interface));
1129 
1130 	pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode,
1131 						state->interface,
1132 						state->advertising);
1133 
1134 	if (pl->using_mac_select_pcs) {
1135 		pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface);
1136 		if (IS_ERR(pcs)) {
1137 			phylink_err(pl,
1138 				    "mac_select_pcs unexpectedly failed: %pe\n",
1139 				    pcs);
1140 			return;
1141 		}
1142 
1143 		pcs_changed = pcs && pl->pcs != pcs;
1144 	}
1145 
1146 	phylink_pcs_poll_stop(pl);
1147 
1148 	if (pl->mac_ops->mac_prepare) {
1149 		err = pl->mac_ops->mac_prepare(pl->config, pl->cur_link_an_mode,
1150 					       state->interface);
1151 		if (err < 0) {
1152 			phylink_err(pl, "mac_prepare failed: %pe\n",
1153 				    ERR_PTR(err));
1154 			return;
1155 		}
1156 	}
1157 
1158 	/* If we have a new PCS, switch to the new PCS after preparing the MAC
1159 	 * for the change.
1160 	 */
1161 	if (pcs_changed) {
1162 		phylink_pcs_disable(pl->pcs);
1163 
1164 		if (pl->pcs)
1165 			pl->pcs->phylink = NULL;
1166 
1167 		pcs->phylink = pl;
1168 
1169 		pl->pcs = pcs;
1170 	}
1171 
1172 	if (pl->pcs)
1173 		phylink_pcs_pre_config(pl->pcs, state->interface);
1174 
1175 	phylink_mac_config(pl, state);
1176 
1177 	if (pl->pcs)
1178 		phylink_pcs_post_config(pl->pcs, state->interface);
1179 
1180 	if (pl->pcs_state == PCS_STATE_STARTING || pcs_changed)
1181 		phylink_pcs_enable(pl->pcs);
1182 
1183 	neg_mode = pl->cur_link_an_mode;
1184 	if (pl->pcs && pl->pcs->neg_mode)
1185 		neg_mode = pl->pcs_neg_mode;
1186 
1187 	err = phylink_pcs_config(pl->pcs, neg_mode, state,
1188 				 !!(pl->link_config.pause & MLO_PAUSE_AN));
1189 	if (err < 0)
1190 		phylink_err(pl, "pcs_config failed: %pe\n",
1191 			    ERR_PTR(err));
1192 	else if (err > 0)
1193 		restart = true;
1194 
1195 	if (restart)
1196 		phylink_pcs_an_restart(pl);
1197 
1198 	if (pl->mac_ops->mac_finish) {
1199 		err = pl->mac_ops->mac_finish(pl->config, pl->cur_link_an_mode,
1200 					      state->interface);
1201 		if (err < 0)
1202 			phylink_err(pl, "mac_finish failed: %pe\n",
1203 				    ERR_PTR(err));
1204 	}
1205 
1206 	if (pl->sfp_bus) {
1207 		rate_kbd = phylink_interface_signal_rate(state->interface);
1208 		if (rate_kbd)
1209 			sfp_upstream_set_signal_rate(pl->sfp_bus, rate_kbd);
1210 	}
1211 
1212 	phylink_pcs_poll_start(pl);
1213 }
1214 
1215 /*
1216  * Reconfigure for a change of inband advertisement.
1217  * If we have a separate PCS, we only need to call its pcs_config() method,
1218  * and then restart AN if it indicates something changed. Otherwise, we do
1219  * the full MAC reconfiguration.
1220  */
phylink_change_inband_advert(struct phylink * pl)1221 static int phylink_change_inband_advert(struct phylink *pl)
1222 {
1223 	unsigned int neg_mode;
1224 	int ret;
1225 
1226 	if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state))
1227 		return 0;
1228 
1229 	phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__,
1230 		    phylink_an_mode_str(pl->cur_link_an_mode),
1231 		    phy_modes(pl->link_config.interface),
1232 		    __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising,
1233 		    pl->link_config.pause);
1234 
1235 	/* Recompute the PCS neg mode */
1236 	pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode,
1237 					pl->link_config.interface,
1238 					pl->link_config.advertising);
1239 
1240 	neg_mode = pl->cur_link_an_mode;
1241 	if (pl->pcs->neg_mode)
1242 		neg_mode = pl->pcs_neg_mode;
1243 
1244 	/* Modern PCS-based method; update the advert at the PCS, and
1245 	 * restart negotiation if the pcs_config() helper indicates that
1246 	 * the programmed advertisement has changed.
1247 	 */
1248 	ret = phylink_pcs_config(pl->pcs, neg_mode, &pl->link_config,
1249 				 !!(pl->link_config.pause & MLO_PAUSE_AN));
1250 	if (ret < 0)
1251 		return ret;
1252 
1253 	if (ret > 0)
1254 		phylink_pcs_an_restart(pl);
1255 
1256 	return 0;
1257 }
1258 
phylink_mac_pcs_get_state(struct phylink * pl,struct phylink_link_state * state)1259 static void phylink_mac_pcs_get_state(struct phylink *pl,
1260 				      struct phylink_link_state *state)
1261 {
1262 	linkmode_copy(state->advertising, pl->link_config.advertising);
1263 	linkmode_zero(state->lp_advertising);
1264 	state->interface = pl->link_config.interface;
1265 	state->rate_matching = pl->link_config.rate_matching;
1266 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
1267 			      state->advertising)) {
1268 		state->speed = SPEED_UNKNOWN;
1269 		state->duplex = DUPLEX_UNKNOWN;
1270 		state->pause = MLO_PAUSE_NONE;
1271 	} else {
1272 		state->speed =  pl->link_config.speed;
1273 		state->duplex = pl->link_config.duplex;
1274 		state->pause = pl->link_config.pause;
1275 	}
1276 	state->an_complete = 0;
1277 	state->link = 1;
1278 
1279 	if (pl->pcs)
1280 		pl->pcs->ops->pcs_get_state(pl->pcs, state);
1281 	else
1282 		state->link = 0;
1283 }
1284 
1285 /* The fixed state is... fixed except for the link state,
1286  * which may be determined by a GPIO or a callback.
1287  */
phylink_get_fixed_state(struct phylink * pl,struct phylink_link_state * state)1288 static void phylink_get_fixed_state(struct phylink *pl,
1289 				    struct phylink_link_state *state)
1290 {
1291 	*state = pl->link_config;
1292 	if (pl->config->get_fixed_state)
1293 		pl->config->get_fixed_state(pl->config, state);
1294 	else if (pl->link_gpio)
1295 		state->link = !!gpiod_get_value_cansleep(pl->link_gpio);
1296 
1297 	state->pause = MLO_PAUSE_NONE;
1298 	phylink_resolve_an_pause(state);
1299 }
1300 
phylink_mac_initial_config(struct phylink * pl,bool force_restart)1301 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart)
1302 {
1303 	struct phylink_link_state link_state;
1304 
1305 	switch (pl->cur_link_an_mode) {
1306 	case MLO_AN_PHY:
1307 		link_state = pl->phy_state;
1308 		break;
1309 
1310 	case MLO_AN_FIXED:
1311 		phylink_get_fixed_state(pl, &link_state);
1312 		break;
1313 
1314 	case MLO_AN_INBAND:
1315 		link_state = pl->link_config;
1316 		if (link_state.interface == PHY_INTERFACE_MODE_SGMII)
1317 			link_state.pause = MLO_PAUSE_NONE;
1318 		break;
1319 
1320 	default: /* can't happen */
1321 		return;
1322 	}
1323 
1324 	link_state.link = false;
1325 
1326 	phylink_apply_manual_flow(pl, &link_state);
1327 	phylink_major_config(pl, force_restart, &link_state);
1328 }
1329 
phylink_pause_to_str(int pause)1330 static const char *phylink_pause_to_str(int pause)
1331 {
1332 	switch (pause & MLO_PAUSE_TXRX_MASK) {
1333 	case MLO_PAUSE_TX | MLO_PAUSE_RX:
1334 		return "rx/tx";
1335 	case MLO_PAUSE_TX:
1336 		return "tx";
1337 	case MLO_PAUSE_RX:
1338 		return "rx";
1339 	default:
1340 		return "off";
1341 	}
1342 }
1343 
phylink_link_up(struct phylink * pl,struct phylink_link_state link_state)1344 static void phylink_link_up(struct phylink *pl,
1345 			    struct phylink_link_state link_state)
1346 {
1347 	struct net_device *ndev = pl->netdev;
1348 	unsigned int neg_mode;
1349 	int speed, duplex;
1350 	bool rx_pause;
1351 
1352 	speed = link_state.speed;
1353 	duplex = link_state.duplex;
1354 	rx_pause = !!(link_state.pause & MLO_PAUSE_RX);
1355 
1356 	switch (link_state.rate_matching) {
1357 	case RATE_MATCH_PAUSE:
1358 		/* The PHY is doing rate matchion from the media rate (in
1359 		 * the link_state) to the interface speed, and will send
1360 		 * pause frames to the MAC to limit its transmission speed.
1361 		 */
1362 		speed = phylink_interface_max_speed(link_state.interface);
1363 		duplex = DUPLEX_FULL;
1364 		rx_pause = true;
1365 		break;
1366 
1367 	case RATE_MATCH_CRS:
1368 		/* The PHY is doing rate matchion from the media rate (in
1369 		 * the link_state) to the interface speed, and will cause
1370 		 * collisions to the MAC to limit its transmission speed.
1371 		 */
1372 		speed = phylink_interface_max_speed(link_state.interface);
1373 		duplex = DUPLEX_HALF;
1374 		break;
1375 	}
1376 
1377 	pl->cur_interface = link_state.interface;
1378 
1379 	neg_mode = pl->cur_link_an_mode;
1380 	if (pl->pcs && pl->pcs->neg_mode)
1381 		neg_mode = pl->pcs_neg_mode;
1382 
1383 	phylink_pcs_link_up(pl->pcs, neg_mode, pl->cur_interface, speed,
1384 			    duplex);
1385 
1386 	pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->cur_link_an_mode,
1387 				 pl->cur_interface, speed, duplex,
1388 				 !!(link_state.pause & MLO_PAUSE_TX), rx_pause);
1389 
1390 	if (ndev)
1391 		netif_carrier_on(ndev);
1392 
1393 	phylink_info(pl,
1394 		     "Link is Up - %s/%s - flow control %s\n",
1395 		     phy_speed_to_str(link_state.speed),
1396 		     phy_duplex_to_str(link_state.duplex),
1397 		     phylink_pause_to_str(link_state.pause));
1398 }
1399 
phylink_link_down(struct phylink * pl)1400 static void phylink_link_down(struct phylink *pl)
1401 {
1402 	struct net_device *ndev = pl->netdev;
1403 
1404 	if (ndev)
1405 		netif_carrier_off(ndev);
1406 	pl->mac_ops->mac_link_down(pl->config, pl->cur_link_an_mode,
1407 				   pl->cur_interface);
1408 	phylink_info(pl, "Link is Down\n");
1409 }
1410 
phylink_resolve(struct work_struct * w)1411 static void phylink_resolve(struct work_struct *w)
1412 {
1413 	struct phylink *pl = container_of(w, struct phylink, resolve);
1414 	struct phylink_link_state link_state;
1415 	struct net_device *ndev = pl->netdev;
1416 	bool mac_config = false;
1417 	bool retrigger = false;
1418 	bool cur_link_state;
1419 
1420 	mutex_lock(&pl->state_mutex);
1421 	if (pl->netdev)
1422 		cur_link_state = netif_carrier_ok(ndev);
1423 	else
1424 		cur_link_state = pl->old_link_state;
1425 
1426 	if (pl->phylink_disable_state) {
1427 		pl->mac_link_dropped = false;
1428 		link_state.link = false;
1429 	} else if (pl->mac_link_dropped) {
1430 		link_state.link = false;
1431 		retrigger = true;
1432 	} else {
1433 		switch (pl->cur_link_an_mode) {
1434 		case MLO_AN_PHY:
1435 			link_state = pl->phy_state;
1436 			phylink_apply_manual_flow(pl, &link_state);
1437 			mac_config = link_state.link;
1438 			break;
1439 
1440 		case MLO_AN_FIXED:
1441 			phylink_get_fixed_state(pl, &link_state);
1442 			mac_config = link_state.link;
1443 			break;
1444 
1445 		case MLO_AN_INBAND:
1446 			phylink_mac_pcs_get_state(pl, &link_state);
1447 
1448 			/* The PCS may have a latching link-fail indicator.
1449 			 * If the link was up, bring the link down and
1450 			 * re-trigger the resolve. Otherwise, re-read the
1451 			 * PCS state to get the current status of the link.
1452 			 */
1453 			if (!link_state.link) {
1454 				if (cur_link_state)
1455 					retrigger = true;
1456 				else
1457 					phylink_mac_pcs_get_state(pl,
1458 								  &link_state);
1459 			}
1460 
1461 			/* If we have a phy, the "up" state is the union of
1462 			 * both the PHY and the MAC
1463 			 */
1464 			if (pl->phydev)
1465 				link_state.link &= pl->phy_state.link;
1466 
1467 			/* Only update if the PHY link is up */
1468 			if (pl->phydev && pl->phy_state.link) {
1469 				/* If the interface has changed, force a
1470 				 * link down event if the link isn't already
1471 				 * down, and re-resolve.
1472 				 */
1473 				if (link_state.interface !=
1474 				    pl->phy_state.interface) {
1475 					retrigger = true;
1476 					link_state.link = false;
1477 				}
1478 				link_state.interface = pl->phy_state.interface;
1479 
1480 				/* If we are doing rate matching, then the
1481 				 * link speed/duplex comes from the PHY
1482 				 */
1483 				if (pl->phy_state.rate_matching) {
1484 					link_state.rate_matching =
1485 						pl->phy_state.rate_matching;
1486 					link_state.speed = pl->phy_state.speed;
1487 					link_state.duplex =
1488 						pl->phy_state.duplex;
1489 				}
1490 
1491 				/* If we have a PHY, we need to update with
1492 				 * the PHY flow control bits.
1493 				 */
1494 				link_state.pause = pl->phy_state.pause;
1495 				mac_config = true;
1496 			}
1497 			phylink_apply_manual_flow(pl, &link_state);
1498 			break;
1499 		}
1500 	}
1501 
1502 	if (mac_config) {
1503 		if (link_state.interface != pl->link_config.interface) {
1504 			/* The interface has changed, force the link down and
1505 			 * then reconfigure.
1506 			 */
1507 			if (cur_link_state) {
1508 				phylink_link_down(pl);
1509 				cur_link_state = false;
1510 			}
1511 			phylink_major_config(pl, false, &link_state);
1512 			pl->link_config.interface = link_state.interface;
1513 		}
1514 	}
1515 
1516 	if (link_state.link != cur_link_state) {
1517 		pl->old_link_state = link_state.link;
1518 		if (!link_state.link)
1519 			phylink_link_down(pl);
1520 		else
1521 			phylink_link_up(pl, link_state);
1522 	}
1523 	if (!link_state.link && retrigger) {
1524 		pl->mac_link_dropped = false;
1525 		queue_work(system_power_efficient_wq, &pl->resolve);
1526 	}
1527 	mutex_unlock(&pl->state_mutex);
1528 }
1529 
phylink_run_resolve(struct phylink * pl)1530 static void phylink_run_resolve(struct phylink *pl)
1531 {
1532 	if (!pl->phylink_disable_state)
1533 		queue_work(system_power_efficient_wq, &pl->resolve);
1534 }
1535 
phylink_run_resolve_and_disable(struct phylink * pl,int bit)1536 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit)
1537 {
1538 	unsigned long state = pl->phylink_disable_state;
1539 
1540 	set_bit(bit, &pl->phylink_disable_state);
1541 	if (state == 0) {
1542 		queue_work(system_power_efficient_wq, &pl->resolve);
1543 		flush_work(&pl->resolve);
1544 	}
1545 }
1546 
phylink_enable_and_run_resolve(struct phylink * pl,int bit)1547 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit)
1548 {
1549 	clear_bit(bit, &pl->phylink_disable_state);
1550 	phylink_run_resolve(pl);
1551 }
1552 
phylink_fixed_poll(struct timer_list * t)1553 static void phylink_fixed_poll(struct timer_list *t)
1554 {
1555 	struct phylink *pl = container_of(t, struct phylink, link_poll);
1556 
1557 	mod_timer(t, jiffies + HZ);
1558 
1559 	phylink_run_resolve(pl);
1560 }
1561 
1562 static const struct sfp_upstream_ops sfp_phylink_ops;
1563 
phylink_register_sfp(struct phylink * pl,const struct fwnode_handle * fwnode)1564 static int phylink_register_sfp(struct phylink *pl,
1565 				const struct fwnode_handle *fwnode)
1566 {
1567 	struct sfp_bus *bus;
1568 	int ret;
1569 
1570 	if (!fwnode)
1571 		return 0;
1572 
1573 	bus = sfp_bus_find_fwnode(fwnode);
1574 	if (IS_ERR(bus)) {
1575 		phylink_err(pl, "unable to attach SFP bus: %pe\n", bus);
1576 		return PTR_ERR(bus);
1577 	}
1578 
1579 	pl->sfp_bus = bus;
1580 
1581 	ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops);
1582 	sfp_bus_put(bus);
1583 
1584 	return ret;
1585 }
1586 
1587 /**
1588  * phylink_create() - create a phylink instance
1589  * @config: a pointer to the target &struct phylink_config
1590  * @fwnode: a pointer to a &struct fwnode_handle describing the network
1591  *	interface
1592  * @iface: the desired link mode defined by &typedef phy_interface_t
1593  * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC.
1594  *
1595  * Create a new phylink instance, and parse the link parameters found in @np.
1596  * This will parse in-band modes, fixed-link or SFP configuration.
1597  *
1598  * Note: the rtnl lock must not be held when calling this function.
1599  *
1600  * Returns a pointer to a &struct phylink, or an error-pointer value. Users
1601  * must use IS_ERR() to check for errors from this function.
1602  */
phylink_create(struct phylink_config * config,const struct fwnode_handle * fwnode,phy_interface_t iface,const struct phylink_mac_ops * mac_ops)1603 struct phylink *phylink_create(struct phylink_config *config,
1604 			       const struct fwnode_handle *fwnode,
1605 			       phy_interface_t iface,
1606 			       const struct phylink_mac_ops *mac_ops)
1607 {
1608 	bool using_mac_select_pcs = false;
1609 	struct phylink *pl;
1610 	int ret;
1611 
1612 	/* Validate the supplied configuration */
1613 	if (phy_interface_empty(config->supported_interfaces)) {
1614 		dev_err(config->dev,
1615 			"phylink: error: empty supported_interfaces\n");
1616 		return ERR_PTR(-EINVAL);
1617 	}
1618 
1619 	if (mac_ops->mac_select_pcs &&
1620 	    mac_ops->mac_select_pcs(config, PHY_INTERFACE_MODE_NA) !=
1621 	      ERR_PTR(-EOPNOTSUPP))
1622 		using_mac_select_pcs = true;
1623 
1624 	pl = kzalloc(sizeof(*pl), GFP_KERNEL);
1625 	if (!pl)
1626 		return ERR_PTR(-ENOMEM);
1627 
1628 	mutex_init(&pl->state_mutex);
1629 	INIT_WORK(&pl->resolve, phylink_resolve);
1630 
1631 	pl->config = config;
1632 	if (config->type == PHYLINK_NETDEV) {
1633 		pl->netdev = to_net_dev(config->dev);
1634 		netif_carrier_off(pl->netdev);
1635 	} else if (config->type == PHYLINK_DEV) {
1636 		pl->dev = config->dev;
1637 	} else {
1638 		kfree(pl);
1639 		return ERR_PTR(-EINVAL);
1640 	}
1641 
1642 	pl->using_mac_select_pcs = using_mac_select_pcs;
1643 	pl->phy_state.interface = iface;
1644 	pl->link_interface = iface;
1645 	if (iface == PHY_INTERFACE_MODE_MOCA)
1646 		pl->link_port = PORT_BNC;
1647 	else
1648 		pl->link_port = PORT_MII;
1649 	pl->link_config.interface = iface;
1650 	pl->link_config.pause = MLO_PAUSE_AN;
1651 	pl->link_config.speed = SPEED_UNKNOWN;
1652 	pl->link_config.duplex = DUPLEX_UNKNOWN;
1653 	pl->pcs_state = PCS_STATE_DOWN;
1654 	pl->mac_ops = mac_ops;
1655 	__set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state);
1656 	timer_setup(&pl->link_poll, phylink_fixed_poll, 0);
1657 
1658 	bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
1659 	linkmode_copy(pl->link_config.advertising, pl->supported);
1660 	phylink_validate(pl, pl->supported, &pl->link_config);
1661 
1662 	ret = phylink_parse_mode(pl, fwnode);
1663 	if (ret < 0) {
1664 		kfree(pl);
1665 		return ERR_PTR(ret);
1666 	}
1667 
1668 	if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
1669 		ret = phylink_parse_fixedlink(pl, fwnode);
1670 		if (ret < 0) {
1671 			kfree(pl);
1672 			return ERR_PTR(ret);
1673 		}
1674 	}
1675 
1676 	pl->cur_link_an_mode = pl->cfg_link_an_mode;
1677 
1678 	ret = phylink_register_sfp(pl, fwnode);
1679 	if (ret < 0) {
1680 		kfree(pl);
1681 		return ERR_PTR(ret);
1682 	}
1683 
1684 	return pl;
1685 }
1686 EXPORT_SYMBOL_GPL(phylink_create);
1687 
1688 /**
1689  * phylink_destroy() - cleanup and destroy the phylink instance
1690  * @pl: a pointer to a &struct phylink returned from phylink_create()
1691  *
1692  * Destroy a phylink instance. Any PHY that has been attached must have been
1693  * cleaned up via phylink_disconnect_phy() prior to calling this function.
1694  *
1695  * Note: the rtnl lock must not be held when calling this function.
1696  */
phylink_destroy(struct phylink * pl)1697 void phylink_destroy(struct phylink *pl)
1698 {
1699 	sfp_bus_del_upstream(pl->sfp_bus);
1700 	if (pl->link_gpio)
1701 		gpiod_put(pl->link_gpio);
1702 
1703 	cancel_work_sync(&pl->resolve);
1704 	kfree(pl);
1705 }
1706 EXPORT_SYMBOL_GPL(phylink_destroy);
1707 
1708 /**
1709  * phylink_expects_phy() - Determine if phylink expects a phy to be attached
1710  * @pl: a pointer to a &struct phylink returned from phylink_create()
1711  *
1712  * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X,
1713  * no PHY is needed.
1714  *
1715  * Returns true if phylink will be expecting a PHY.
1716  */
phylink_expects_phy(struct phylink * pl)1717 bool phylink_expects_phy(struct phylink *pl)
1718 {
1719 	if (pl->cfg_link_an_mode == MLO_AN_FIXED ||
1720 	    (pl->cfg_link_an_mode == MLO_AN_INBAND &&
1721 	     phy_interface_mode_is_8023z(pl->link_config.interface)))
1722 		return false;
1723 	return true;
1724 }
1725 EXPORT_SYMBOL_GPL(phylink_expects_phy);
1726 
phylink_phy_change(struct phy_device * phydev,bool up)1727 static void phylink_phy_change(struct phy_device *phydev, bool up)
1728 {
1729 	struct phylink *pl = phydev->phylink;
1730 	bool tx_pause, rx_pause;
1731 
1732 	phy_get_pause(phydev, &tx_pause, &rx_pause);
1733 
1734 	mutex_lock(&pl->state_mutex);
1735 	pl->phy_state.speed = phydev->speed;
1736 	pl->phy_state.duplex = phydev->duplex;
1737 	pl->phy_state.rate_matching = phydev->rate_matching;
1738 	pl->phy_state.pause = MLO_PAUSE_NONE;
1739 	if (tx_pause)
1740 		pl->phy_state.pause |= MLO_PAUSE_TX;
1741 	if (rx_pause)
1742 		pl->phy_state.pause |= MLO_PAUSE_RX;
1743 	pl->phy_state.interface = phydev->interface;
1744 	pl->phy_state.link = up;
1745 	mutex_unlock(&pl->state_mutex);
1746 
1747 	phylink_run_resolve(pl);
1748 
1749 	phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s\n", up ? "up" : "down",
1750 		    phy_modes(phydev->interface),
1751 		    phy_speed_to_str(phydev->speed),
1752 		    phy_duplex_to_str(phydev->duplex),
1753 		    phy_rate_matching_to_str(phydev->rate_matching),
1754 		    phylink_pause_to_str(pl->phy_state.pause));
1755 }
1756 
phylink_bringup_phy(struct phylink * pl,struct phy_device * phy,phy_interface_t interface)1757 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy,
1758 			       phy_interface_t interface)
1759 {
1760 	struct phylink_link_state config;
1761 	__ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
1762 	char *irq_str;
1763 	int ret;
1764 
1765 	/*
1766 	 * This is the new way of dealing with flow control for PHYs,
1767 	 * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
1768 	 * phy drivers should not set SUPPORTED_[Asym_]Pause") except
1769 	 * using our validate call to the MAC, we rely upon the MAC
1770 	 * clearing the bits from both supported and advertising fields.
1771 	 */
1772 	phy_support_asym_pause(phy);
1773 
1774 	memset(&config, 0, sizeof(config));
1775 	linkmode_copy(supported, phy->supported);
1776 	linkmode_copy(config.advertising, phy->advertising);
1777 
1778 	/* Check whether we would use rate matching for the proposed interface
1779 	 * mode.
1780 	 */
1781 	config.rate_matching = phy_get_rate_matching(phy, interface);
1782 
1783 	/* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R,
1784 	 * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching.
1785 	 * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching
1786 	 * their Serdes is either unnecessary or not reasonable.
1787 	 *
1788 	 * For these which switch interface modes, we really need to know which
1789 	 * interface modes the PHY supports to properly work out which ethtool
1790 	 * linkmodes can be supported. For now, as a work-around, we validate
1791 	 * against all interface modes, which may lead to more ethtool link
1792 	 * modes being advertised than are actually supported.
1793 	 */
1794 	if (phy->is_c45 && config.rate_matching == RATE_MATCH_NONE &&
1795 	    interface != PHY_INTERFACE_MODE_RXAUI &&
1796 	    interface != PHY_INTERFACE_MODE_XAUI &&
1797 	    interface != PHY_INTERFACE_MODE_USXGMII)
1798 		config.interface = PHY_INTERFACE_MODE_NA;
1799 	else
1800 		config.interface = interface;
1801 
1802 	ret = phylink_validate(pl, supported, &config);
1803 	if (ret) {
1804 		phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n",
1805 			     phy_modes(config.interface),
1806 			     __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported,
1807 			     __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising,
1808 			     ERR_PTR(ret));
1809 		return ret;
1810 	}
1811 
1812 	phy->phylink = pl;
1813 	phy->phy_link_change = phylink_phy_change;
1814 
1815 	irq_str = phy_attached_info_irq(phy);
1816 	phylink_info(pl,
1817 		     "PHY [%s] driver [%s] (irq=%s)\n",
1818 		     dev_name(&phy->mdio.dev), phy->drv->name, irq_str);
1819 	kfree(irq_str);
1820 
1821 	mutex_lock(&phy->lock);
1822 	mutex_lock(&pl->state_mutex);
1823 	pl->phydev = phy;
1824 	pl->phy_state.interface = interface;
1825 	pl->phy_state.pause = MLO_PAUSE_NONE;
1826 	pl->phy_state.speed = SPEED_UNKNOWN;
1827 	pl->phy_state.duplex = DUPLEX_UNKNOWN;
1828 	pl->phy_state.rate_matching = RATE_MATCH_NONE;
1829 	linkmode_copy(pl->supported, supported);
1830 	linkmode_copy(pl->link_config.advertising, config.advertising);
1831 
1832 	/* Restrict the phy advertisement according to the MAC support. */
1833 	linkmode_copy(phy->advertising, config.advertising);
1834 	mutex_unlock(&pl->state_mutex);
1835 	mutex_unlock(&phy->lock);
1836 
1837 	phylink_dbg(pl,
1838 		    "phy: %s setting supported %*pb advertising %*pb\n",
1839 		    phy_modes(interface),
1840 		    __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported,
1841 		    __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising);
1842 
1843 	if (phy_interrupt_is_valid(phy))
1844 		phy_request_interrupt(phy);
1845 
1846 	if (pl->config->mac_managed_pm)
1847 		phy->mac_managed_pm = true;
1848 
1849 	return 0;
1850 }
1851 
phylink_attach_phy(struct phylink * pl,struct phy_device * phy,phy_interface_t interface)1852 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy,
1853 			      phy_interface_t interface)
1854 {
1855 	if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED ||
1856 		    (pl->cfg_link_an_mode == MLO_AN_INBAND &&
1857 		     phy_interface_mode_is_8023z(interface) && !pl->sfp_bus)))
1858 		return -EINVAL;
1859 
1860 	if (pl->phydev)
1861 		return -EBUSY;
1862 
1863 	return phy_attach_direct(pl->netdev, phy, 0, interface);
1864 }
1865 
1866 /**
1867  * phylink_connect_phy() - connect a PHY to the phylink instance
1868  * @pl: a pointer to a &struct phylink returned from phylink_create()
1869  * @phy: a pointer to a &struct phy_device.
1870  *
1871  * Connect @phy to the phylink instance specified by @pl by calling
1872  * phy_attach_direct(). Configure the @phy according to the MAC driver's
1873  * capabilities, start the PHYLIB state machine and enable any interrupts
1874  * that the PHY supports.
1875  *
1876  * This updates the phylink's ethtool supported and advertising link mode
1877  * masks.
1878  *
1879  * Returns 0 on success or a negative errno.
1880  */
phylink_connect_phy(struct phylink * pl,struct phy_device * phy)1881 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy)
1882 {
1883 	int ret;
1884 
1885 	/* Use PHY device/driver interface */
1886 	if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
1887 		pl->link_interface = phy->interface;
1888 		pl->link_config.interface = pl->link_interface;
1889 	}
1890 
1891 	ret = phylink_attach_phy(pl, phy, pl->link_interface);
1892 	if (ret < 0)
1893 		return ret;
1894 
1895 	ret = phylink_bringup_phy(pl, phy, pl->link_config.interface);
1896 	if (ret)
1897 		phy_detach(phy);
1898 
1899 	return ret;
1900 }
1901 EXPORT_SYMBOL_GPL(phylink_connect_phy);
1902 
1903 /**
1904  * phylink_of_phy_connect() - connect the PHY specified in the DT mode.
1905  * @pl: a pointer to a &struct phylink returned from phylink_create()
1906  * @dn: a pointer to a &struct device_node.
1907  * @flags: PHY-specific flags to communicate to the PHY device driver
1908  *
1909  * Connect the phy specified in the device node @dn to the phylink instance
1910  * specified by @pl. Actions specified in phylink_connect_phy() will be
1911  * performed.
1912  *
1913  * Returns 0 on success or a negative errno.
1914  */
phylink_of_phy_connect(struct phylink * pl,struct device_node * dn,u32 flags)1915 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn,
1916 			   u32 flags)
1917 {
1918 	return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags);
1919 }
1920 EXPORT_SYMBOL_GPL(phylink_of_phy_connect);
1921 
1922 /**
1923  * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode.
1924  * @pl: a pointer to a &struct phylink returned from phylink_create()
1925  * @fwnode: a pointer to a &struct fwnode_handle.
1926  * @flags: PHY-specific flags to communicate to the PHY device driver
1927  *
1928  * Connect the phy specified @fwnode to the phylink instance specified
1929  * by @pl.
1930  *
1931  * Returns 0 on success or a negative errno.
1932  */
phylink_fwnode_phy_connect(struct phylink * pl,const struct fwnode_handle * fwnode,u32 flags)1933 int phylink_fwnode_phy_connect(struct phylink *pl,
1934 			       const struct fwnode_handle *fwnode,
1935 			       u32 flags)
1936 {
1937 	struct fwnode_handle *phy_fwnode;
1938 	struct phy_device *phy_dev;
1939 	int ret;
1940 
1941 	/* Fixed links and 802.3z are handled without needing a PHY */
1942 	if (pl->cfg_link_an_mode == MLO_AN_FIXED ||
1943 	    (pl->cfg_link_an_mode == MLO_AN_INBAND &&
1944 	     phy_interface_mode_is_8023z(pl->link_interface)))
1945 		return 0;
1946 
1947 	phy_fwnode = fwnode_get_phy_node(fwnode);
1948 	if (IS_ERR(phy_fwnode)) {
1949 		if (pl->cfg_link_an_mode == MLO_AN_PHY)
1950 			return -ENODEV;
1951 		return 0;
1952 	}
1953 
1954 	phy_dev = fwnode_phy_find_device(phy_fwnode);
1955 	/* We're done with the phy_node handle */
1956 	fwnode_handle_put(phy_fwnode);
1957 	if (!phy_dev)
1958 		return -ENODEV;
1959 
1960 	/* Use PHY device/driver interface */
1961 	if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
1962 		pl->link_interface = phy_dev->interface;
1963 		pl->link_config.interface = pl->link_interface;
1964 	}
1965 
1966 	ret = phy_attach_direct(pl->netdev, phy_dev, flags,
1967 				pl->link_interface);
1968 	phy_device_free(phy_dev);
1969 	if (ret)
1970 		return ret;
1971 
1972 	ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface);
1973 	if (ret)
1974 		phy_detach(phy_dev);
1975 
1976 	return ret;
1977 }
1978 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect);
1979 
1980 /**
1981  * phylink_disconnect_phy() - disconnect any PHY attached to the phylink
1982  *   instance.
1983  * @pl: a pointer to a &struct phylink returned from phylink_create()
1984  *
1985  * Disconnect any current PHY from the phylink instance described by @pl.
1986  */
phylink_disconnect_phy(struct phylink * pl)1987 void phylink_disconnect_phy(struct phylink *pl)
1988 {
1989 	struct phy_device *phy;
1990 
1991 	ASSERT_RTNL();
1992 
1993 	phy = pl->phydev;
1994 	if (phy) {
1995 		mutex_lock(&phy->lock);
1996 		mutex_lock(&pl->state_mutex);
1997 		pl->phydev = NULL;
1998 		mutex_unlock(&pl->state_mutex);
1999 		mutex_unlock(&phy->lock);
2000 		flush_work(&pl->resolve);
2001 
2002 		phy_disconnect(phy);
2003 	}
2004 }
2005 EXPORT_SYMBOL_GPL(phylink_disconnect_phy);
2006 
phylink_link_changed(struct phylink * pl,bool up,const char * what)2007 static void phylink_link_changed(struct phylink *pl, bool up, const char *what)
2008 {
2009 	if (!up)
2010 		pl->mac_link_dropped = true;
2011 	phylink_run_resolve(pl);
2012 	phylink_dbg(pl, "%s link %s\n", what, up ? "up" : "down");
2013 }
2014 
2015 /**
2016  * phylink_mac_change() - notify phylink of a change in MAC state
2017  * @pl: a pointer to a &struct phylink returned from phylink_create()
2018  * @up: indicates whether the link is currently up.
2019  *
2020  * The MAC driver should call this driver when the state of its link
2021  * changes (eg, link failure, new negotiation results, etc.)
2022  */
phylink_mac_change(struct phylink * pl,bool up)2023 void phylink_mac_change(struct phylink *pl, bool up)
2024 {
2025 	phylink_link_changed(pl, up, "mac");
2026 }
2027 EXPORT_SYMBOL_GPL(phylink_mac_change);
2028 
2029 /**
2030  * phylink_pcs_change() - notify phylink of a change to PCS link state
2031  * @pcs: pointer to &struct phylink_pcs
2032  * @up: indicates whether the link is currently up.
2033  *
2034  * The PCS driver should call this when the state of its link changes
2035  * (e.g. link failure, new negotiation results, etc.) Note: it should
2036  * not determine "up" by reading the BMSR. If in doubt about the link
2037  * state at interrupt time, then pass true if pcs_get_state() returns
2038  * the latched link-down state, otherwise pass false.
2039  */
phylink_pcs_change(struct phylink_pcs * pcs,bool up)2040 void phylink_pcs_change(struct phylink_pcs *pcs, bool up)
2041 {
2042 	struct phylink *pl = pcs->phylink;
2043 
2044 	if (pl)
2045 		phylink_link_changed(pl, up, "pcs");
2046 }
2047 EXPORT_SYMBOL_GPL(phylink_pcs_change);
2048 
phylink_link_handler(int irq,void * data)2049 static irqreturn_t phylink_link_handler(int irq, void *data)
2050 {
2051 	struct phylink *pl = data;
2052 
2053 	phylink_run_resolve(pl);
2054 
2055 	return IRQ_HANDLED;
2056 }
2057 
2058 /**
2059  * phylink_start() - start a phylink instance
2060  * @pl: a pointer to a &struct phylink returned from phylink_create()
2061  *
2062  * Start the phylink instance specified by @pl, configuring the MAC for the
2063  * desired link mode(s) and negotiation style. This should be called from the
2064  * network device driver's &struct net_device_ops ndo_open() method.
2065  */
phylink_start(struct phylink * pl)2066 void phylink_start(struct phylink *pl)
2067 {
2068 	bool poll = false;
2069 
2070 	ASSERT_RTNL();
2071 
2072 	phylink_info(pl, "configuring for %s/%s link mode\n",
2073 		     phylink_an_mode_str(pl->cur_link_an_mode),
2074 		     phy_modes(pl->link_config.interface));
2075 
2076 	/* Always set the carrier off */
2077 	if (pl->netdev)
2078 		netif_carrier_off(pl->netdev);
2079 
2080 	pl->pcs_state = PCS_STATE_STARTING;
2081 
2082 	/* Apply the link configuration to the MAC when starting. This allows
2083 	 * a fixed-link to start with the correct parameters, and also
2084 	 * ensures that we set the appropriate advertisement for Serdes links.
2085 	 *
2086 	 * Restart autonegotiation if using 802.3z to ensure that the link
2087 	 * parameters are properly negotiated.  This is necessary for DSA
2088 	 * switches using 802.3z negotiation to ensure they see our modes.
2089 	 */
2090 	phylink_mac_initial_config(pl, true);
2091 
2092 	pl->pcs_state = PCS_STATE_STARTED;
2093 
2094 	phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED);
2095 
2096 	if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) {
2097 		int irq = gpiod_to_irq(pl->link_gpio);
2098 
2099 		if (irq > 0) {
2100 			if (!request_irq(irq, phylink_link_handler,
2101 					 IRQF_TRIGGER_RISING |
2102 					 IRQF_TRIGGER_FALLING,
2103 					 "netdev link", pl))
2104 				pl->link_irq = irq;
2105 			else
2106 				irq = 0;
2107 		}
2108 		if (irq <= 0)
2109 			poll = true;
2110 	}
2111 
2112 	if (pl->cfg_link_an_mode == MLO_AN_FIXED)
2113 		poll |= pl->config->poll_fixed_state;
2114 
2115 	if (poll)
2116 		mod_timer(&pl->link_poll, jiffies + HZ);
2117 	if (pl->phydev)
2118 		phy_start(pl->phydev);
2119 	if (pl->sfp_bus)
2120 		sfp_upstream_start(pl->sfp_bus);
2121 }
2122 EXPORT_SYMBOL_GPL(phylink_start);
2123 
2124 /**
2125  * phylink_stop() - stop a phylink instance
2126  * @pl: a pointer to a &struct phylink returned from phylink_create()
2127  *
2128  * Stop the phylink instance specified by @pl. This should be called from the
2129  * network device driver's &struct net_device_ops ndo_stop() method.  The
2130  * network device's carrier state should not be changed prior to calling this
2131  * function.
2132  *
2133  * This will synchronously bring down the link if the link is not already
2134  * down (in other words, it will trigger a mac_link_down() method call.)
2135  */
phylink_stop(struct phylink * pl)2136 void phylink_stop(struct phylink *pl)
2137 {
2138 	ASSERT_RTNL();
2139 
2140 	if (pl->sfp_bus)
2141 		sfp_upstream_stop(pl->sfp_bus);
2142 	if (pl->phydev)
2143 		phy_stop(pl->phydev);
2144 	del_timer_sync(&pl->link_poll);
2145 	if (pl->link_irq) {
2146 		free_irq(pl->link_irq, pl);
2147 		pl->link_irq = 0;
2148 	}
2149 
2150 	phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED);
2151 
2152 	pl->pcs_state = PCS_STATE_DOWN;
2153 
2154 	phylink_pcs_disable(pl->pcs);
2155 }
2156 EXPORT_SYMBOL_GPL(phylink_stop);
2157 
2158 /**
2159  * phylink_suspend() - handle a network device suspend event
2160  * @pl: a pointer to a &struct phylink returned from phylink_create()
2161  * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan
2162  *
2163  * Handle a network device suspend event. There are several cases:
2164  *
2165  * - If Wake-on-Lan is not active, we can bring down the link between
2166  *   the MAC and PHY by calling phylink_stop().
2167  * - If Wake-on-Lan is active, and being handled only by the PHY, we
2168  *   can also bring down the link between the MAC and PHY.
2169  * - If Wake-on-Lan is active, but being handled by the MAC, the MAC
2170  *   still needs to receive packets, so we can not bring the link down.
2171  */
phylink_suspend(struct phylink * pl,bool mac_wol)2172 void phylink_suspend(struct phylink *pl, bool mac_wol)
2173 {
2174 	ASSERT_RTNL();
2175 
2176 	if (mac_wol && (!pl->netdev || pl->netdev->wol_enabled)) {
2177 		/* Wake-on-Lan enabled, MAC handling */
2178 		mutex_lock(&pl->state_mutex);
2179 
2180 		/* Stop the resolver bringing the link up */
2181 		__set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state);
2182 
2183 		/* Disable the carrier, to prevent transmit timeouts,
2184 		 * but one would hope all packets have been sent. This
2185 		 * also means phylink_resolve() will do nothing.
2186 		 */
2187 		if (pl->netdev)
2188 			netif_carrier_off(pl->netdev);
2189 		else
2190 			pl->old_link_state = false;
2191 
2192 		/* We do not call mac_link_down() here as we want the
2193 		 * link to remain up to receive the WoL packets.
2194 		 */
2195 		mutex_unlock(&pl->state_mutex);
2196 	} else {
2197 		phylink_stop(pl);
2198 	}
2199 }
2200 EXPORT_SYMBOL_GPL(phylink_suspend);
2201 
2202 /**
2203  * phylink_resume() - handle a network device resume event
2204  * @pl: a pointer to a &struct phylink returned from phylink_create()
2205  *
2206  * Undo the effects of phylink_suspend(), returning the link to an
2207  * operational state.
2208  */
phylink_resume(struct phylink * pl)2209 void phylink_resume(struct phylink *pl)
2210 {
2211 	ASSERT_RTNL();
2212 
2213 	if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) {
2214 		/* Wake-on-Lan enabled, MAC handling */
2215 
2216 		/* Call mac_link_down() so we keep the overall state balanced.
2217 		 * Do this under the state_mutex lock for consistency. This
2218 		 * will cause a "Link Down" message to be printed during
2219 		 * resume, which is harmless - the true link state will be
2220 		 * printed when we run a resolve.
2221 		 */
2222 		mutex_lock(&pl->state_mutex);
2223 		phylink_link_down(pl);
2224 		mutex_unlock(&pl->state_mutex);
2225 
2226 		/* Re-apply the link parameters so that all the settings get
2227 		 * restored to the MAC.
2228 		 */
2229 		phylink_mac_initial_config(pl, true);
2230 
2231 		/* Re-enable and re-resolve the link parameters */
2232 		phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL);
2233 	} else {
2234 		phylink_start(pl);
2235 	}
2236 }
2237 EXPORT_SYMBOL_GPL(phylink_resume);
2238 
2239 /**
2240  * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY
2241  * @pl: a pointer to a &struct phylink returned from phylink_create()
2242  * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters
2243  *
2244  * Read the wake on lan parameters from the PHY attached to the phylink
2245  * instance specified by @pl. If no PHY is currently attached, report no
2246  * support for wake on lan.
2247  */
phylink_ethtool_get_wol(struct phylink * pl,struct ethtool_wolinfo * wol)2248 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
2249 {
2250 	ASSERT_RTNL();
2251 
2252 	wol->supported = 0;
2253 	wol->wolopts = 0;
2254 
2255 	if (pl->phydev)
2256 		phy_ethtool_get_wol(pl->phydev, wol);
2257 }
2258 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol);
2259 
2260 /**
2261  * phylink_ethtool_set_wol() - set wake on lan parameters
2262  * @pl: a pointer to a &struct phylink returned from phylink_create()
2263  * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters
2264  *
2265  * Set the wake on lan parameters for the PHY attached to the phylink
2266  * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP
2267  * error.
2268  *
2269  * Returns zero on success or negative errno code.
2270  */
phylink_ethtool_set_wol(struct phylink * pl,struct ethtool_wolinfo * wol)2271 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
2272 {
2273 	int ret = -EOPNOTSUPP;
2274 
2275 	ASSERT_RTNL();
2276 
2277 	if (pl->phydev)
2278 		ret = phy_ethtool_set_wol(pl->phydev, wol);
2279 
2280 	return ret;
2281 }
2282 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol);
2283 
phylink_merge_link_mode(unsigned long * dst,const unsigned long * b)2284 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b)
2285 {
2286 	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask);
2287 
2288 	linkmode_zero(mask);
2289 	phylink_set_port_modes(mask);
2290 
2291 	linkmode_and(dst, dst, mask);
2292 	linkmode_or(dst, dst, b);
2293 }
2294 
phylink_get_ksettings(const struct phylink_link_state * state,struct ethtool_link_ksettings * kset)2295 static void phylink_get_ksettings(const struct phylink_link_state *state,
2296 				  struct ethtool_link_ksettings *kset)
2297 {
2298 	phylink_merge_link_mode(kset->link_modes.advertising, state->advertising);
2299 	linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising);
2300 	if (kset->base.rate_matching == RATE_MATCH_NONE) {
2301 		kset->base.speed = state->speed;
2302 		kset->base.duplex = state->duplex;
2303 	}
2304 	kset->base.autoneg = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
2305 					       state->advertising) ?
2306 				AUTONEG_ENABLE : AUTONEG_DISABLE;
2307 }
2308 
2309 /**
2310  * phylink_ethtool_ksettings_get() - get the current link settings
2311  * @pl: a pointer to a &struct phylink returned from phylink_create()
2312  * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings
2313  *
2314  * Read the current link settings for the phylink instance specified by @pl.
2315  * This will be the link settings read from the MAC, PHY or fixed link
2316  * settings depending on the current negotiation mode.
2317  */
phylink_ethtool_ksettings_get(struct phylink * pl,struct ethtool_link_ksettings * kset)2318 int phylink_ethtool_ksettings_get(struct phylink *pl,
2319 				  struct ethtool_link_ksettings *kset)
2320 {
2321 	struct phylink_link_state link_state;
2322 
2323 	ASSERT_RTNL();
2324 
2325 	if (pl->phydev)
2326 		phy_ethtool_ksettings_get(pl->phydev, kset);
2327 	else
2328 		kset->base.port = pl->link_port;
2329 
2330 	linkmode_copy(kset->link_modes.supported, pl->supported);
2331 
2332 	switch (pl->cur_link_an_mode) {
2333 	case MLO_AN_FIXED:
2334 		/* We are using fixed settings. Report these as the
2335 		 * current link settings - and note that these also
2336 		 * represent the supported speeds/duplex/pause modes.
2337 		 */
2338 		phylink_get_fixed_state(pl, &link_state);
2339 		phylink_get_ksettings(&link_state, kset);
2340 		break;
2341 
2342 	case MLO_AN_INBAND:
2343 		/* If there is a phy attached, then use the reported
2344 		 * settings from the phy with no modification.
2345 		 */
2346 		if (pl->phydev)
2347 			break;
2348 
2349 		phylink_mac_pcs_get_state(pl, &link_state);
2350 
2351 		/* The MAC is reporting the link results from its own PCS
2352 		 * layer via in-band status. Report these as the current
2353 		 * link settings.
2354 		 */
2355 		phylink_get_ksettings(&link_state, kset);
2356 		break;
2357 	}
2358 
2359 	return 0;
2360 }
2361 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get);
2362 
2363 /**
2364  * phylink_ethtool_ksettings_set() - set the link settings
2365  * @pl: a pointer to a &struct phylink returned from phylink_create()
2366  * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes
2367  */
phylink_ethtool_ksettings_set(struct phylink * pl,const struct ethtool_link_ksettings * kset)2368 int phylink_ethtool_ksettings_set(struct phylink *pl,
2369 				  const struct ethtool_link_ksettings *kset)
2370 {
2371 	__ETHTOOL_DECLARE_LINK_MODE_MASK(support);
2372 	struct phylink_link_state config;
2373 	const struct phy_setting *s;
2374 
2375 	ASSERT_RTNL();
2376 
2377 	if (pl->phydev) {
2378 		struct ethtool_link_ksettings phy_kset = *kset;
2379 
2380 		linkmode_and(phy_kset.link_modes.advertising,
2381 			     phy_kset.link_modes.advertising,
2382 			     pl->supported);
2383 
2384 		/* We can rely on phylib for this update; we also do not need
2385 		 * to update the pl->link_config settings:
2386 		 * - the configuration returned via ksettings_get() will come
2387 		 *   from phylib whenever a PHY is present.
2388 		 * - link_config.interface will be updated by the PHY calling
2389 		 *   back via phylink_phy_change() and a subsequent resolve.
2390 		 * - initial link configuration for PHY mode comes from the
2391 		 *   last phy state updated via phylink_phy_change().
2392 		 * - other configuration changes (e.g. pause modes) are
2393 		 *   performed directly via phylib.
2394 		 * - if in in-band mode with a PHY, the link configuration
2395 		 *   is passed on the link from the PHY, and all of
2396 		 *   link_config.{speed,duplex,an_enabled,pause} are not used.
2397 		 * - the only possible use would be link_config.advertising
2398 		 *   pause modes when in 1000base-X mode with a PHY, but in
2399 		 *   the presence of a PHY, this should not be changed as that
2400 		 *   should be determined from the media side advertisement.
2401 		 */
2402 		return phy_ethtool_ksettings_set(pl->phydev, &phy_kset);
2403 	}
2404 
2405 	config = pl->link_config;
2406 	/* Mask out unsupported advertisements */
2407 	linkmode_and(config.advertising, kset->link_modes.advertising,
2408 		     pl->supported);
2409 
2410 	/* FIXME: should we reject autoneg if phy/mac does not support it? */
2411 	switch (kset->base.autoneg) {
2412 	case AUTONEG_DISABLE:
2413 		/* Autonegotiation disabled, select a suitable speed and
2414 		 * duplex.
2415 		 */
2416 		s = phy_lookup_setting(kset->base.speed, kset->base.duplex,
2417 				       pl->supported, false);
2418 		if (!s)
2419 			return -EINVAL;
2420 
2421 		/* If we have a fixed link, refuse to change link parameters.
2422 		 * If the link parameters match, accept them but do nothing.
2423 		 */
2424 		if (pl->cur_link_an_mode == MLO_AN_FIXED) {
2425 			if (s->speed != pl->link_config.speed ||
2426 			    s->duplex != pl->link_config.duplex)
2427 				return -EINVAL;
2428 			return 0;
2429 		}
2430 
2431 		config.speed = s->speed;
2432 		config.duplex = s->duplex;
2433 		break;
2434 
2435 	case AUTONEG_ENABLE:
2436 		/* If we have a fixed link, allow autonegotiation (since that
2437 		 * is our default case) but do not allow the advertisement to
2438 		 * be changed. If the advertisement matches, simply return.
2439 		 */
2440 		if (pl->cur_link_an_mode == MLO_AN_FIXED) {
2441 			if (!linkmode_equal(config.advertising,
2442 					    pl->link_config.advertising))
2443 				return -EINVAL;
2444 			return 0;
2445 		}
2446 
2447 		config.speed = SPEED_UNKNOWN;
2448 		config.duplex = DUPLEX_UNKNOWN;
2449 		break;
2450 
2451 	default:
2452 		return -EINVAL;
2453 	}
2454 
2455 	/* We have ruled out the case with a PHY attached, and the
2456 	 * fixed-link cases.  All that is left are in-band links.
2457 	 */
2458 	linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising,
2459 			 kset->base.autoneg == AUTONEG_ENABLE);
2460 
2461 	/* If this link is with an SFP, ensure that changes to advertised modes
2462 	 * also cause the associated interface to be selected such that the
2463 	 * link can be configured correctly.
2464 	 */
2465 	if (pl->sfp_bus) {
2466 		config.interface = sfp_select_interface(pl->sfp_bus,
2467 							config.advertising);
2468 		if (config.interface == PHY_INTERFACE_MODE_NA) {
2469 			phylink_err(pl,
2470 				    "selection of interface failed, advertisement %*pb\n",
2471 				    __ETHTOOL_LINK_MODE_MASK_NBITS,
2472 				    config.advertising);
2473 			return -EINVAL;
2474 		}
2475 
2476 		/* Revalidate with the selected interface */
2477 		linkmode_copy(support, pl->supported);
2478 		if (phylink_validate(pl, support, &config)) {
2479 			phylink_err(pl, "validation of %s/%s with support %*pb failed\n",
2480 				    phylink_an_mode_str(pl->cur_link_an_mode),
2481 				    phy_modes(config.interface),
2482 				    __ETHTOOL_LINK_MODE_MASK_NBITS, support);
2483 			return -EINVAL;
2484 		}
2485 	} else {
2486 		/* Validate without changing the current supported mask. */
2487 		linkmode_copy(support, pl->supported);
2488 		if (phylink_validate(pl, support, &config))
2489 			return -EINVAL;
2490 	}
2491 
2492 	/* If autonegotiation is enabled, we must have an advertisement */
2493 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
2494 			      config.advertising) &&
2495 	    phylink_is_empty_linkmode(config.advertising))
2496 		return -EINVAL;
2497 
2498 	mutex_lock(&pl->state_mutex);
2499 	pl->link_config.speed = config.speed;
2500 	pl->link_config.duplex = config.duplex;
2501 
2502 	if (pl->link_config.interface != config.interface) {
2503 		/* The interface changed, e.g. 1000base-X <-> 2500base-X */
2504 		/* We need to force the link down, then change the interface */
2505 		if (pl->old_link_state) {
2506 			phylink_link_down(pl);
2507 			pl->old_link_state = false;
2508 		}
2509 		if (!test_bit(PHYLINK_DISABLE_STOPPED,
2510 			      &pl->phylink_disable_state))
2511 			phylink_major_config(pl, false, &config);
2512 		pl->link_config.interface = config.interface;
2513 		linkmode_copy(pl->link_config.advertising, config.advertising);
2514 	} else if (!linkmode_equal(pl->link_config.advertising,
2515 				   config.advertising)) {
2516 		linkmode_copy(pl->link_config.advertising, config.advertising);
2517 		phylink_change_inband_advert(pl);
2518 	}
2519 	mutex_unlock(&pl->state_mutex);
2520 
2521 	return 0;
2522 }
2523 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set);
2524 
2525 /**
2526  * phylink_ethtool_nway_reset() - restart negotiation
2527  * @pl: a pointer to a &struct phylink returned from phylink_create()
2528  *
2529  * Restart negotiation for the phylink instance specified by @pl. This will
2530  * cause any attached phy to restart negotiation with the link partner, and
2531  * if the MAC is in a BaseX mode, the MAC will also be requested to restart
2532  * negotiation.
2533  *
2534  * Returns zero on success, or negative error code.
2535  */
phylink_ethtool_nway_reset(struct phylink * pl)2536 int phylink_ethtool_nway_reset(struct phylink *pl)
2537 {
2538 	int ret = 0;
2539 
2540 	ASSERT_RTNL();
2541 
2542 	if (pl->phydev)
2543 		ret = phy_restart_aneg(pl->phydev);
2544 	phylink_pcs_an_restart(pl);
2545 
2546 	return ret;
2547 }
2548 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset);
2549 
2550 /**
2551  * phylink_ethtool_get_pauseparam() - get the current pause parameters
2552  * @pl: a pointer to a &struct phylink returned from phylink_create()
2553  * @pause: a pointer to a &struct ethtool_pauseparam
2554  */
phylink_ethtool_get_pauseparam(struct phylink * pl,struct ethtool_pauseparam * pause)2555 void phylink_ethtool_get_pauseparam(struct phylink *pl,
2556 				    struct ethtool_pauseparam *pause)
2557 {
2558 	ASSERT_RTNL();
2559 
2560 	pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN);
2561 	pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX);
2562 	pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX);
2563 }
2564 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam);
2565 
2566 /**
2567  * phylink_ethtool_set_pauseparam() - set the current pause parameters
2568  * @pl: a pointer to a &struct phylink returned from phylink_create()
2569  * @pause: a pointer to a &struct ethtool_pauseparam
2570  */
phylink_ethtool_set_pauseparam(struct phylink * pl,struct ethtool_pauseparam * pause)2571 int phylink_ethtool_set_pauseparam(struct phylink *pl,
2572 				   struct ethtool_pauseparam *pause)
2573 {
2574 	struct phylink_link_state *config = &pl->link_config;
2575 	bool manual_changed;
2576 	int pause_state;
2577 
2578 	ASSERT_RTNL();
2579 
2580 	if (pl->cur_link_an_mode == MLO_AN_FIXED)
2581 		return -EOPNOTSUPP;
2582 
2583 	if (!phylink_test(pl->supported, Pause) &&
2584 	    !phylink_test(pl->supported, Asym_Pause))
2585 		return -EOPNOTSUPP;
2586 
2587 	if (!phylink_test(pl->supported, Asym_Pause) &&
2588 	    pause->rx_pause != pause->tx_pause)
2589 		return -EINVAL;
2590 
2591 	pause_state = 0;
2592 	if (pause->autoneg)
2593 		pause_state |= MLO_PAUSE_AN;
2594 	if (pause->rx_pause)
2595 		pause_state |= MLO_PAUSE_RX;
2596 	if (pause->tx_pause)
2597 		pause_state |= MLO_PAUSE_TX;
2598 
2599 	mutex_lock(&pl->state_mutex);
2600 	/*
2601 	 * See the comments for linkmode_set_pause(), wrt the deficiencies
2602 	 * with the current implementation.  A solution to this issue would
2603 	 * be:
2604 	 * ethtool  Local device
2605 	 *  rx  tx  Pause AsymDir
2606 	 *  0   0   0     0
2607 	 *  1   0   1     1
2608 	 *  0   1   0     1
2609 	 *  1   1   1     1
2610 	 * and then use the ethtool rx/tx enablement status to mask the
2611 	 * rx/tx pause resolution.
2612 	 */
2613 	linkmode_set_pause(config->advertising, pause->tx_pause,
2614 			   pause->rx_pause);
2615 
2616 	manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN ||
2617 			 (!(pause_state & MLO_PAUSE_AN) &&
2618 			   (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK);
2619 
2620 	config->pause = pause_state;
2621 
2622 	/* Update our in-band advertisement, triggering a renegotiation if
2623 	 * the advertisement changed.
2624 	 */
2625 	if (!pl->phydev)
2626 		phylink_change_inband_advert(pl);
2627 
2628 	mutex_unlock(&pl->state_mutex);
2629 
2630 	/* If we have a PHY, a change of the pause frame advertisement will
2631 	 * cause phylib to renegotiate (if AN is enabled) which will in turn
2632 	 * call our phylink_phy_change() and trigger a resolve.  Note that
2633 	 * we can't hold our state mutex while calling phy_set_asym_pause().
2634 	 */
2635 	if (pl->phydev)
2636 		phy_set_asym_pause(pl->phydev, pause->rx_pause,
2637 				   pause->tx_pause);
2638 
2639 	/* If the manual pause settings changed, make sure we trigger a
2640 	 * resolve to update their state; we can not guarantee that the
2641 	 * link will cycle.
2642 	 */
2643 	if (manual_changed) {
2644 		pl->mac_link_dropped = true;
2645 		phylink_run_resolve(pl);
2646 	}
2647 
2648 	return 0;
2649 }
2650 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam);
2651 
2652 /**
2653  * phylink_get_eee_err() - read the energy efficient ethernet error
2654  *   counter
2655  * @pl: a pointer to a &struct phylink returned from phylink_create().
2656  *
2657  * Read the Energy Efficient Ethernet error counter from the PHY associated
2658  * with the phylink instance specified by @pl.
2659  *
2660  * Returns positive error counter value, or negative error code.
2661  */
phylink_get_eee_err(struct phylink * pl)2662 int phylink_get_eee_err(struct phylink *pl)
2663 {
2664 	int ret = 0;
2665 
2666 	ASSERT_RTNL();
2667 
2668 	if (pl->phydev)
2669 		ret = phy_get_eee_err(pl->phydev);
2670 
2671 	return ret;
2672 }
2673 EXPORT_SYMBOL_GPL(phylink_get_eee_err);
2674 
2675 /**
2676  * phylink_init_eee() - init and check the EEE features
2677  * @pl: a pointer to a &struct phylink returned from phylink_create()
2678  * @clk_stop_enable: allow PHY to stop receive clock
2679  *
2680  * Must be called either with RTNL held or within mac_link_up()
2681  */
phylink_init_eee(struct phylink * pl,bool clk_stop_enable)2682 int phylink_init_eee(struct phylink *pl, bool clk_stop_enable)
2683 {
2684 	int ret = -EOPNOTSUPP;
2685 
2686 	if (pl->phydev)
2687 		ret = phy_init_eee(pl->phydev, clk_stop_enable);
2688 
2689 	return ret;
2690 }
2691 EXPORT_SYMBOL_GPL(phylink_init_eee);
2692 
2693 /**
2694  * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters
2695  * @pl: a pointer to a &struct phylink returned from phylink_create()
2696  * @eee: a pointer to a &struct ethtool_eee for the read parameters
2697  */
phylink_ethtool_get_eee(struct phylink * pl,struct ethtool_eee * eee)2698 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_eee *eee)
2699 {
2700 	int ret = -EOPNOTSUPP;
2701 
2702 	ASSERT_RTNL();
2703 
2704 	if (pl->phydev)
2705 		ret = phy_ethtool_get_eee(pl->phydev, eee);
2706 
2707 	return ret;
2708 }
2709 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee);
2710 
2711 /**
2712  * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters
2713  * @pl: a pointer to a &struct phylink returned from phylink_create()
2714  * @eee: a pointer to a &struct ethtool_eee for the desired parameters
2715  */
phylink_ethtool_set_eee(struct phylink * pl,struct ethtool_eee * eee)2716 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_eee *eee)
2717 {
2718 	int ret = -EOPNOTSUPP;
2719 
2720 	ASSERT_RTNL();
2721 
2722 	if (pl->phydev)
2723 		ret = phy_ethtool_set_eee(pl->phydev, eee);
2724 
2725 	return ret;
2726 }
2727 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee);
2728 
2729 /* This emulates MII registers for a fixed-mode phy operating as per the
2730  * passed in state. "aneg" defines if we report negotiation is possible.
2731  *
2732  * FIXME: should deal with negotiation state too.
2733  */
phylink_mii_emul_read(unsigned int reg,struct phylink_link_state * state)2734 static int phylink_mii_emul_read(unsigned int reg,
2735 				 struct phylink_link_state *state)
2736 {
2737 	struct fixed_phy_status fs;
2738 	unsigned long *lpa = state->lp_advertising;
2739 	int val;
2740 
2741 	fs.link = state->link;
2742 	fs.speed = state->speed;
2743 	fs.duplex = state->duplex;
2744 	fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa);
2745 	fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa);
2746 
2747 	val = swphy_read_reg(reg, &fs);
2748 	if (reg == MII_BMSR) {
2749 		if (!state->an_complete)
2750 			val &= ~BMSR_ANEGCOMPLETE;
2751 	}
2752 	return val;
2753 }
2754 
phylink_phy_read(struct phylink * pl,unsigned int phy_id,unsigned int reg)2755 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id,
2756 			    unsigned int reg)
2757 {
2758 	struct phy_device *phydev = pl->phydev;
2759 	int prtad, devad;
2760 
2761 	if (mdio_phy_id_is_c45(phy_id)) {
2762 		prtad = mdio_phy_id_prtad(phy_id);
2763 		devad = mdio_phy_id_devad(phy_id);
2764 		return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad,
2765 					reg);
2766 	}
2767 
2768 	if (phydev->is_c45) {
2769 		switch (reg) {
2770 		case MII_BMCR:
2771 		case MII_BMSR:
2772 		case MII_PHYSID1:
2773 		case MII_PHYSID2:
2774 			devad = __ffs(phydev->c45_ids.mmds_present);
2775 			break;
2776 		case MII_ADVERTISE:
2777 		case MII_LPA:
2778 			if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
2779 				return -EINVAL;
2780 			devad = MDIO_MMD_AN;
2781 			if (reg == MII_ADVERTISE)
2782 				reg = MDIO_AN_ADVERTISE;
2783 			else
2784 				reg = MDIO_AN_LPA;
2785 			break;
2786 		default:
2787 			return -EINVAL;
2788 		}
2789 		prtad = phy_id;
2790 		return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad,
2791 					reg);
2792 	}
2793 
2794 	return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg);
2795 }
2796 
phylink_phy_write(struct phylink * pl,unsigned int phy_id,unsigned int reg,unsigned int val)2797 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id,
2798 			     unsigned int reg, unsigned int val)
2799 {
2800 	struct phy_device *phydev = pl->phydev;
2801 	int prtad, devad;
2802 
2803 	if (mdio_phy_id_is_c45(phy_id)) {
2804 		prtad = mdio_phy_id_prtad(phy_id);
2805 		devad = mdio_phy_id_devad(phy_id);
2806 		return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad,
2807 					 reg, val);
2808 	}
2809 
2810 	if (phydev->is_c45) {
2811 		switch (reg) {
2812 		case MII_BMCR:
2813 		case MII_BMSR:
2814 		case MII_PHYSID1:
2815 		case MII_PHYSID2:
2816 			devad = __ffs(phydev->c45_ids.mmds_present);
2817 			break;
2818 		case MII_ADVERTISE:
2819 		case MII_LPA:
2820 			if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
2821 				return -EINVAL;
2822 			devad = MDIO_MMD_AN;
2823 			if (reg == MII_ADVERTISE)
2824 				reg = MDIO_AN_ADVERTISE;
2825 			else
2826 				reg = MDIO_AN_LPA;
2827 			break;
2828 		default:
2829 			return -EINVAL;
2830 		}
2831 		return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad,
2832 					 reg, val);
2833 	}
2834 
2835 	return mdiobus_write(phydev->mdio.bus, phy_id, reg, val);
2836 }
2837 
phylink_mii_read(struct phylink * pl,unsigned int phy_id,unsigned int reg)2838 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id,
2839 			    unsigned int reg)
2840 {
2841 	struct phylink_link_state state;
2842 	int val = 0xffff;
2843 
2844 	switch (pl->cur_link_an_mode) {
2845 	case MLO_AN_FIXED:
2846 		if (phy_id == 0) {
2847 			phylink_get_fixed_state(pl, &state);
2848 			val = phylink_mii_emul_read(reg, &state);
2849 		}
2850 		break;
2851 
2852 	case MLO_AN_PHY:
2853 		return -EOPNOTSUPP;
2854 
2855 	case MLO_AN_INBAND:
2856 		if (phy_id == 0) {
2857 			phylink_mac_pcs_get_state(pl, &state);
2858 			val = phylink_mii_emul_read(reg, &state);
2859 		}
2860 		break;
2861 	}
2862 
2863 	return val & 0xffff;
2864 }
2865 
phylink_mii_write(struct phylink * pl,unsigned int phy_id,unsigned int reg,unsigned int val)2866 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id,
2867 			     unsigned int reg, unsigned int val)
2868 {
2869 	switch (pl->cur_link_an_mode) {
2870 	case MLO_AN_FIXED:
2871 		break;
2872 
2873 	case MLO_AN_PHY:
2874 		return -EOPNOTSUPP;
2875 
2876 	case MLO_AN_INBAND:
2877 		break;
2878 	}
2879 
2880 	return 0;
2881 }
2882 
2883 /**
2884  * phylink_mii_ioctl() - generic mii ioctl interface
2885  * @pl: a pointer to a &struct phylink returned from phylink_create()
2886  * @ifr: a pointer to a &struct ifreq for socket ioctls
2887  * @cmd: ioctl cmd to execute
2888  *
2889  * Perform the specified MII ioctl on the PHY attached to the phylink instance
2890  * specified by @pl. If no PHY is attached, emulate the presence of the PHY.
2891  *
2892  * Returns: zero on success or negative error code.
2893  *
2894  * %SIOCGMIIPHY:
2895  *  read register from the current PHY.
2896  * %SIOCGMIIREG:
2897  *  read register from the specified PHY.
2898  * %SIOCSMIIREG:
2899  *  set a register on the specified PHY.
2900  */
phylink_mii_ioctl(struct phylink * pl,struct ifreq * ifr,int cmd)2901 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd)
2902 {
2903 	struct mii_ioctl_data *mii = if_mii(ifr);
2904 	int  ret;
2905 
2906 	ASSERT_RTNL();
2907 
2908 	if (pl->phydev) {
2909 		/* PHYs only exist for MLO_AN_PHY and SGMII */
2910 		switch (cmd) {
2911 		case SIOCGMIIPHY:
2912 			mii->phy_id = pl->phydev->mdio.addr;
2913 			fallthrough;
2914 
2915 		case SIOCGMIIREG:
2916 			ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num);
2917 			if (ret >= 0) {
2918 				mii->val_out = ret;
2919 				ret = 0;
2920 			}
2921 			break;
2922 
2923 		case SIOCSMIIREG:
2924 			ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num,
2925 						mii->val_in);
2926 			break;
2927 
2928 		default:
2929 			ret = phy_mii_ioctl(pl->phydev, ifr, cmd);
2930 			break;
2931 		}
2932 	} else {
2933 		switch (cmd) {
2934 		case SIOCGMIIPHY:
2935 			mii->phy_id = 0;
2936 			fallthrough;
2937 
2938 		case SIOCGMIIREG:
2939 			ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num);
2940 			if (ret >= 0) {
2941 				mii->val_out = ret;
2942 				ret = 0;
2943 			}
2944 			break;
2945 
2946 		case SIOCSMIIREG:
2947 			ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num,
2948 						mii->val_in);
2949 			break;
2950 
2951 		default:
2952 			ret = -EOPNOTSUPP;
2953 			break;
2954 		}
2955 	}
2956 
2957 	return ret;
2958 }
2959 EXPORT_SYMBOL_GPL(phylink_mii_ioctl);
2960 
2961 /**
2962  * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both
2963  *   link partners
2964  * @pl: a pointer to a &struct phylink returned from phylink_create()
2965  * @sync: perform action synchronously
2966  *
2967  * If we have a PHY that is not part of a SFP module, then set the speed
2968  * as described in the phy_speed_down() function. Please see this function
2969  * for a description of the @sync parameter.
2970  *
2971  * Returns zero if there is no PHY, otherwise as per phy_speed_down().
2972  */
phylink_speed_down(struct phylink * pl,bool sync)2973 int phylink_speed_down(struct phylink *pl, bool sync)
2974 {
2975 	int ret = 0;
2976 
2977 	ASSERT_RTNL();
2978 
2979 	if (!pl->sfp_bus && pl->phydev)
2980 		ret = phy_speed_down(pl->phydev, sync);
2981 
2982 	return ret;
2983 }
2984 EXPORT_SYMBOL_GPL(phylink_speed_down);
2985 
2986 /**
2987  * phylink_speed_up() - restore the advertised speeds prior to the call to
2988  *   phylink_speed_down()
2989  * @pl: a pointer to a &struct phylink returned from phylink_create()
2990  *
2991  * If we have a PHY that is not part of a SFP module, then restore the
2992  * PHY speeds as per phy_speed_up().
2993  *
2994  * Returns zero if there is no PHY, otherwise as per phy_speed_up().
2995  */
phylink_speed_up(struct phylink * pl)2996 int phylink_speed_up(struct phylink *pl)
2997 {
2998 	int ret = 0;
2999 
3000 	ASSERT_RTNL();
3001 
3002 	if (!pl->sfp_bus && pl->phydev)
3003 		ret = phy_speed_up(pl->phydev);
3004 
3005 	return ret;
3006 }
3007 EXPORT_SYMBOL_GPL(phylink_speed_up);
3008 
phylink_sfp_attach(void * upstream,struct sfp_bus * bus)3009 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus)
3010 {
3011 	struct phylink *pl = upstream;
3012 
3013 	pl->netdev->sfp_bus = bus;
3014 }
3015 
phylink_sfp_detach(void * upstream,struct sfp_bus * bus)3016 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus)
3017 {
3018 	struct phylink *pl = upstream;
3019 
3020 	pl->netdev->sfp_bus = NULL;
3021 }
3022 
3023 static const phy_interface_t phylink_sfp_interface_preference[] = {
3024 	PHY_INTERFACE_MODE_25GBASER,
3025 	PHY_INTERFACE_MODE_USXGMII,
3026 	PHY_INTERFACE_MODE_10GBASER,
3027 	PHY_INTERFACE_MODE_5GBASER,
3028 	PHY_INTERFACE_MODE_2500BASEX,
3029 	PHY_INTERFACE_MODE_SGMII,
3030 	PHY_INTERFACE_MODE_1000BASEX,
3031 	PHY_INTERFACE_MODE_100BASEX,
3032 };
3033 
3034 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces);
3035 
phylink_choose_sfp_interface(struct phylink * pl,const unsigned long * intf)3036 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl,
3037 						    const unsigned long *intf)
3038 {
3039 	phy_interface_t interface;
3040 	size_t i;
3041 
3042 	interface = PHY_INTERFACE_MODE_NA;
3043 	for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++)
3044 		if (test_bit(phylink_sfp_interface_preference[i], intf)) {
3045 			interface = phylink_sfp_interface_preference[i];
3046 			break;
3047 		}
3048 
3049 	return interface;
3050 }
3051 
phylink_sfp_set_config(struct phylink * pl,u8 mode,unsigned long * supported,struct phylink_link_state * state)3052 static void phylink_sfp_set_config(struct phylink *pl, u8 mode,
3053 				   unsigned long *supported,
3054 				   struct phylink_link_state *state)
3055 {
3056 	bool changed = false;
3057 
3058 	phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n",
3059 		    phylink_an_mode_str(mode), phy_modes(state->interface),
3060 		    __ETHTOOL_LINK_MODE_MASK_NBITS, supported);
3061 
3062 	if (!linkmode_equal(pl->supported, supported)) {
3063 		linkmode_copy(pl->supported, supported);
3064 		changed = true;
3065 	}
3066 
3067 	if (!linkmode_equal(pl->link_config.advertising, state->advertising)) {
3068 		linkmode_copy(pl->link_config.advertising, state->advertising);
3069 		changed = true;
3070 	}
3071 
3072 	if (pl->cur_link_an_mode != mode ||
3073 	    pl->link_config.interface != state->interface) {
3074 		pl->cur_link_an_mode = mode;
3075 		pl->link_config.interface = state->interface;
3076 
3077 		changed = true;
3078 
3079 		phylink_info(pl, "switched to %s/%s link mode\n",
3080 			     phylink_an_mode_str(mode),
3081 			     phy_modes(state->interface));
3082 	}
3083 
3084 	if (changed && !test_bit(PHYLINK_DISABLE_STOPPED,
3085 				 &pl->phylink_disable_state))
3086 		phylink_mac_initial_config(pl, false);
3087 }
3088 
phylink_sfp_config_phy(struct phylink * pl,u8 mode,struct phy_device * phy)3089 static int phylink_sfp_config_phy(struct phylink *pl, u8 mode,
3090 				  struct phy_device *phy)
3091 {
3092 	__ETHTOOL_DECLARE_LINK_MODE_MASK(support1);
3093 	__ETHTOOL_DECLARE_LINK_MODE_MASK(support);
3094 	struct phylink_link_state config;
3095 	phy_interface_t iface;
3096 	int ret;
3097 
3098 	linkmode_copy(support, phy->supported);
3099 
3100 	memset(&config, 0, sizeof(config));
3101 	linkmode_copy(config.advertising, phy->advertising);
3102 	config.interface = PHY_INTERFACE_MODE_NA;
3103 	config.speed = SPEED_UNKNOWN;
3104 	config.duplex = DUPLEX_UNKNOWN;
3105 	config.pause = MLO_PAUSE_AN;
3106 
3107 	/* Ignore errors if we're expecting a PHY to attach later */
3108 	ret = phylink_validate(pl, support, &config);
3109 	if (ret) {
3110 		phylink_err(pl, "validation with support %*pb failed: %pe\n",
3111 			    __ETHTOOL_LINK_MODE_MASK_NBITS, support,
3112 			    ERR_PTR(ret));
3113 		return ret;
3114 	}
3115 
3116 	iface = sfp_select_interface(pl->sfp_bus, config.advertising);
3117 	if (iface == PHY_INTERFACE_MODE_NA) {
3118 		phylink_err(pl,
3119 			    "selection of interface failed, advertisement %*pb\n",
3120 			    __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising);
3121 		return -EINVAL;
3122 	}
3123 
3124 	config.interface = iface;
3125 	linkmode_copy(support1, support);
3126 	ret = phylink_validate(pl, support1, &config);
3127 	if (ret) {
3128 		phylink_err(pl,
3129 			    "validation of %s/%s with support %*pb failed: %pe\n",
3130 			    phylink_an_mode_str(mode),
3131 			    phy_modes(config.interface),
3132 			    __ETHTOOL_LINK_MODE_MASK_NBITS, support,
3133 			    ERR_PTR(ret));
3134 		return ret;
3135 	}
3136 
3137 	pl->link_port = pl->sfp_port;
3138 
3139 	phylink_sfp_set_config(pl, mode, support, &config);
3140 
3141 	return 0;
3142 }
3143 
phylink_sfp_config_optical(struct phylink * pl)3144 static int phylink_sfp_config_optical(struct phylink *pl)
3145 {
3146 	__ETHTOOL_DECLARE_LINK_MODE_MASK(support);
3147 	DECLARE_PHY_INTERFACE_MASK(interfaces);
3148 	struct phylink_link_state config;
3149 	phy_interface_t interface;
3150 	int ret;
3151 
3152 	phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n",
3153 		    (int)PHY_INTERFACE_MODE_MAX,
3154 		    pl->config->supported_interfaces,
3155 		    (int)PHY_INTERFACE_MODE_MAX,
3156 		    pl->sfp_interfaces);
3157 
3158 	/* Find the union of the supported interfaces by the PCS/MAC and
3159 	 * the SFP module.
3160 	 */
3161 	phy_interface_and(interfaces, pl->config->supported_interfaces,
3162 			  pl->sfp_interfaces);
3163 	if (phy_interface_empty(interfaces)) {
3164 		phylink_err(pl, "unsupported SFP module: no common interface modes\n");
3165 		return -EINVAL;
3166 	}
3167 
3168 	memset(&config, 0, sizeof(config));
3169 	linkmode_copy(support, pl->sfp_support);
3170 	linkmode_copy(config.advertising, pl->sfp_support);
3171 	config.speed = SPEED_UNKNOWN;
3172 	config.duplex = DUPLEX_UNKNOWN;
3173 	config.pause = MLO_PAUSE_AN;
3174 
3175 	/* For all the interfaces that are supported, reduce the sfp_support
3176 	 * mask to only those link modes that can be supported.
3177 	 */
3178 	ret = phylink_validate_mask(pl, pl->sfp_support, &config, interfaces);
3179 	if (ret) {
3180 		phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n",
3181 			    __ETHTOOL_LINK_MODE_MASK_NBITS, support);
3182 		return ret;
3183 	}
3184 
3185 	interface = phylink_choose_sfp_interface(pl, interfaces);
3186 	if (interface == PHY_INTERFACE_MODE_NA) {
3187 		phylink_err(pl, "failed to select SFP interface\n");
3188 		return -EINVAL;
3189 	}
3190 
3191 	phylink_dbg(pl, "optical SFP: chosen %s interface\n",
3192 		    phy_modes(interface));
3193 
3194 	config.interface = interface;
3195 
3196 	/* Ignore errors if we're expecting a PHY to attach later */
3197 	ret = phylink_validate(pl, support, &config);
3198 	if (ret) {
3199 		phylink_err(pl, "validation with support %*pb failed: %pe\n",
3200 			    __ETHTOOL_LINK_MODE_MASK_NBITS, support,
3201 			    ERR_PTR(ret));
3202 		return ret;
3203 	}
3204 
3205 	pl->link_port = pl->sfp_port;
3206 
3207 	phylink_sfp_set_config(pl, MLO_AN_INBAND, pl->sfp_support, &config);
3208 
3209 	return 0;
3210 }
3211 
phylink_sfp_module_insert(void * upstream,const struct sfp_eeprom_id * id)3212 static int phylink_sfp_module_insert(void *upstream,
3213 				     const struct sfp_eeprom_id *id)
3214 {
3215 	struct phylink *pl = upstream;
3216 
3217 	ASSERT_RTNL();
3218 
3219 	linkmode_zero(pl->sfp_support);
3220 	phy_interface_zero(pl->sfp_interfaces);
3221 	sfp_parse_support(pl->sfp_bus, id, pl->sfp_support, pl->sfp_interfaces);
3222 	pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, pl->sfp_support);
3223 
3224 	/* If this module may have a PHY connecting later, defer until later */
3225 	pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id);
3226 	if (pl->sfp_may_have_phy)
3227 		return 0;
3228 
3229 	return phylink_sfp_config_optical(pl);
3230 }
3231 
phylink_sfp_module_start(void * upstream)3232 static int phylink_sfp_module_start(void *upstream)
3233 {
3234 	struct phylink *pl = upstream;
3235 
3236 	/* If this SFP module has a PHY, start the PHY now. */
3237 	if (pl->phydev) {
3238 		phy_start(pl->phydev);
3239 		return 0;
3240 	}
3241 
3242 	/* If the module may have a PHY but we didn't detect one we
3243 	 * need to configure the MAC here.
3244 	 */
3245 	if (!pl->sfp_may_have_phy)
3246 		return 0;
3247 
3248 	return phylink_sfp_config_optical(pl);
3249 }
3250 
phylink_sfp_module_stop(void * upstream)3251 static void phylink_sfp_module_stop(void *upstream)
3252 {
3253 	struct phylink *pl = upstream;
3254 
3255 	/* If this SFP module has a PHY, stop it. */
3256 	if (pl->phydev)
3257 		phy_stop(pl->phydev);
3258 }
3259 
phylink_sfp_link_down(void * upstream)3260 static void phylink_sfp_link_down(void *upstream)
3261 {
3262 	struct phylink *pl = upstream;
3263 
3264 	ASSERT_RTNL();
3265 
3266 	phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK);
3267 }
3268 
phylink_sfp_link_up(void * upstream)3269 static void phylink_sfp_link_up(void *upstream)
3270 {
3271 	struct phylink *pl = upstream;
3272 
3273 	ASSERT_RTNL();
3274 
3275 	phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK);
3276 }
3277 
3278 /* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII
3279  * or 802.3z control word, so inband will not work.
3280  */
phylink_phy_no_inband(struct phy_device * phy)3281 static bool phylink_phy_no_inband(struct phy_device *phy)
3282 {
3283 	return phy->is_c45 && phy_id_compare(phy->c45_ids.device_ids[1],
3284 					     0xae025150, 0xfffffff0);
3285 }
3286 
phylink_sfp_connect_phy(void * upstream,struct phy_device * phy)3287 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy)
3288 {
3289 	struct phylink *pl = upstream;
3290 	phy_interface_t interface;
3291 	u8 mode;
3292 	int ret;
3293 
3294 	/*
3295 	 * This is the new way of dealing with flow control for PHYs,
3296 	 * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
3297 	 * phy drivers should not set SUPPORTED_[Asym_]Pause") except
3298 	 * using our validate call to the MAC, we rely upon the MAC
3299 	 * clearing the bits from both supported and advertising fields.
3300 	 */
3301 	phy_support_asym_pause(phy);
3302 
3303 	if (phylink_phy_no_inband(phy))
3304 		mode = MLO_AN_PHY;
3305 	else
3306 		mode = MLO_AN_INBAND;
3307 
3308 	/* Set the PHY's host supported interfaces */
3309 	phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces,
3310 			  pl->config->supported_interfaces);
3311 
3312 	/* Do the initial configuration */
3313 	ret = phylink_sfp_config_phy(pl, mode, phy);
3314 	if (ret < 0)
3315 		return ret;
3316 
3317 	interface = pl->link_config.interface;
3318 	ret = phylink_attach_phy(pl, phy, interface);
3319 	if (ret < 0)
3320 		return ret;
3321 
3322 	ret = phylink_bringup_phy(pl, phy, interface);
3323 	if (ret)
3324 		phy_detach(phy);
3325 
3326 	return ret;
3327 }
3328 
phylink_sfp_disconnect_phy(void * upstream)3329 static void phylink_sfp_disconnect_phy(void *upstream)
3330 {
3331 	phylink_disconnect_phy(upstream);
3332 }
3333 
3334 static const struct sfp_upstream_ops sfp_phylink_ops = {
3335 	.attach = phylink_sfp_attach,
3336 	.detach = phylink_sfp_detach,
3337 	.module_insert = phylink_sfp_module_insert,
3338 	.module_start = phylink_sfp_module_start,
3339 	.module_stop = phylink_sfp_module_stop,
3340 	.link_up = phylink_sfp_link_up,
3341 	.link_down = phylink_sfp_link_down,
3342 	.connect_phy = phylink_sfp_connect_phy,
3343 	.disconnect_phy = phylink_sfp_disconnect_phy,
3344 };
3345 
3346 /* Helpers for MAC drivers */
3347 
3348 static struct {
3349 	int bit;
3350 	int speed;
3351 } phylink_c73_priority_resolution[] = {
3352 	{ ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, SPEED_100000 },
3353 	{ ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, SPEED_100000 },
3354 	/* 100GBASE-KP4 and 100GBASE-CR10 not supported */
3355 	{ ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, SPEED_40000 },
3356 	{ ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, SPEED_40000 },
3357 	{ ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, SPEED_10000 },
3358 	{ ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, SPEED_10000 },
3359 	/* 5GBASE-KR not supported */
3360 	{ ETHTOOL_LINK_MODE_2500baseX_Full_BIT, SPEED_2500 },
3361 	{ ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, SPEED_1000 },
3362 };
3363 
phylink_resolve_c73(struct phylink_link_state * state)3364 void phylink_resolve_c73(struct phylink_link_state *state)
3365 {
3366 	int i;
3367 
3368 	for (i = 0; i < ARRAY_SIZE(phylink_c73_priority_resolution); i++) {
3369 		int bit = phylink_c73_priority_resolution[i].bit;
3370 		if (linkmode_test_bit(bit, state->advertising) &&
3371 		    linkmode_test_bit(bit, state->lp_advertising))
3372 			break;
3373 	}
3374 
3375 	if (i < ARRAY_SIZE(phylink_c73_priority_resolution)) {
3376 		state->speed = phylink_c73_priority_resolution[i].speed;
3377 		state->duplex = DUPLEX_FULL;
3378 	} else {
3379 		/* negotiation failure */
3380 		state->link = false;
3381 	}
3382 
3383 	phylink_resolve_an_pause(state);
3384 }
3385 EXPORT_SYMBOL_GPL(phylink_resolve_c73);
3386 
phylink_decode_c37_word(struct phylink_link_state * state,uint16_t config_reg,int speed)3387 static void phylink_decode_c37_word(struct phylink_link_state *state,
3388 				    uint16_t config_reg, int speed)
3389 {
3390 	int fd_bit;
3391 
3392 	if (speed == SPEED_2500)
3393 		fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT;
3394 	else
3395 		fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT;
3396 
3397 	mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit);
3398 
3399 	if (linkmode_test_bit(fd_bit, state->advertising) &&
3400 	    linkmode_test_bit(fd_bit, state->lp_advertising)) {
3401 		state->speed = speed;
3402 		state->duplex = DUPLEX_FULL;
3403 	} else {
3404 		/* negotiation failure */
3405 		state->link = false;
3406 	}
3407 
3408 	phylink_resolve_an_pause(state);
3409 }
3410 
phylink_decode_sgmii_word(struct phylink_link_state * state,uint16_t config_reg)3411 static void phylink_decode_sgmii_word(struct phylink_link_state *state,
3412 				      uint16_t config_reg)
3413 {
3414 	if (!(config_reg & LPA_SGMII_LINK)) {
3415 		state->link = false;
3416 		return;
3417 	}
3418 
3419 	switch (config_reg & LPA_SGMII_SPD_MASK) {
3420 	case LPA_SGMII_10:
3421 		state->speed = SPEED_10;
3422 		break;
3423 	case LPA_SGMII_100:
3424 		state->speed = SPEED_100;
3425 		break;
3426 	case LPA_SGMII_1000:
3427 		state->speed = SPEED_1000;
3428 		break;
3429 	default:
3430 		state->link = false;
3431 		return;
3432 	}
3433 	if (config_reg & LPA_SGMII_FULL_DUPLEX)
3434 		state->duplex = DUPLEX_FULL;
3435 	else
3436 		state->duplex = DUPLEX_HALF;
3437 }
3438 
3439 /**
3440  * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS
3441  * @state: a pointer to a struct phylink_link_state.
3442  * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word
3443  *
3444  * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation
3445  * code word.  Decode the USXGMII code word and populate the corresponding fields
3446  * (speed, duplex) into the phylink_link_state structure.
3447  */
phylink_decode_usxgmii_word(struct phylink_link_state * state,uint16_t lpa)3448 void phylink_decode_usxgmii_word(struct phylink_link_state *state,
3449 				 uint16_t lpa)
3450 {
3451 	switch (lpa & MDIO_USXGMII_SPD_MASK) {
3452 	case MDIO_USXGMII_10:
3453 		state->speed = SPEED_10;
3454 		break;
3455 	case MDIO_USXGMII_100:
3456 		state->speed = SPEED_100;
3457 		break;
3458 	case MDIO_USXGMII_1000:
3459 		state->speed = SPEED_1000;
3460 		break;
3461 	case MDIO_USXGMII_2500:
3462 		state->speed = SPEED_2500;
3463 		break;
3464 	case MDIO_USXGMII_5000:
3465 		state->speed = SPEED_5000;
3466 		break;
3467 	case MDIO_USXGMII_10G:
3468 		state->speed = SPEED_10000;
3469 		break;
3470 	default:
3471 		state->link = false;
3472 		return;
3473 	}
3474 
3475 	if (lpa & MDIO_USXGMII_FULL_DUPLEX)
3476 		state->duplex = DUPLEX_FULL;
3477 	else
3478 		state->duplex = DUPLEX_HALF;
3479 }
3480 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word);
3481 
3482 /**
3483  * phylink_decode_usgmii_word() - decode the USGMII word from a MAC PCS
3484  * @state: a pointer to a struct phylink_link_state.
3485  * @lpa: a 16 bit value which stores the USGMII auto-negotiation word
3486  *
3487  * Helper for MAC PCS supporting the USGMII protocol and the auto-negotiation
3488  * code word.  Decode the USGMII code word and populate the corresponding fields
3489  * (speed, duplex) into the phylink_link_state structure. The structure for this
3490  * word is the same as the USXGMII word, except it only supports speeds up to
3491  * 1Gbps.
3492  */
phylink_decode_usgmii_word(struct phylink_link_state * state,uint16_t lpa)3493 static void phylink_decode_usgmii_word(struct phylink_link_state *state,
3494 				       uint16_t lpa)
3495 {
3496 	switch (lpa & MDIO_USXGMII_SPD_MASK) {
3497 	case MDIO_USXGMII_10:
3498 		state->speed = SPEED_10;
3499 		break;
3500 	case MDIO_USXGMII_100:
3501 		state->speed = SPEED_100;
3502 		break;
3503 	case MDIO_USXGMII_1000:
3504 		state->speed = SPEED_1000;
3505 		break;
3506 	default:
3507 		state->link = false;
3508 		return;
3509 	}
3510 
3511 	if (lpa & MDIO_USXGMII_FULL_DUPLEX)
3512 		state->duplex = DUPLEX_FULL;
3513 	else
3514 		state->duplex = DUPLEX_HALF;
3515 }
3516 
3517 /**
3518  * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers
3519  * @state: a pointer to a &struct phylink_link_state.
3520  * @bmsr: The value of the %MII_BMSR register
3521  * @lpa: The value of the %MII_LPA register
3522  *
3523  * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3524  * clause 37 negotiation and/or SGMII control.
3525  *
3526  * Parse the Clause 37 or Cisco SGMII link partner negotiation word into
3527  * the phylink @state structure. This is suitable to be used for implementing
3528  * the pcs_get_state() member of the struct phylink_pcs_ops structure if
3529  * accessing @bmsr and @lpa cannot be done with MDIO directly.
3530  */
phylink_mii_c22_pcs_decode_state(struct phylink_link_state * state,u16 bmsr,u16 lpa)3531 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state,
3532 				      u16 bmsr, u16 lpa)
3533 {
3534 	state->link = !!(bmsr & BMSR_LSTATUS);
3535 	state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE);
3536 	/* If there is no link or autonegotiation is disabled, the LP advertisement
3537 	 * data is not meaningful, so don't go any further.
3538 	 */
3539 	if (!state->link || !linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
3540 					       state->advertising))
3541 		return;
3542 
3543 	switch (state->interface) {
3544 	case PHY_INTERFACE_MODE_1000BASEX:
3545 		phylink_decode_c37_word(state, lpa, SPEED_1000);
3546 		break;
3547 
3548 	case PHY_INTERFACE_MODE_2500BASEX:
3549 		phylink_decode_c37_word(state, lpa, SPEED_2500);
3550 		break;
3551 
3552 	case PHY_INTERFACE_MODE_SGMII:
3553 	case PHY_INTERFACE_MODE_QSGMII:
3554 		phylink_decode_sgmii_word(state, lpa);
3555 		break;
3556 	case PHY_INTERFACE_MODE_QUSGMII:
3557 		phylink_decode_usgmii_word(state, lpa);
3558 		break;
3559 
3560 	default:
3561 		state->link = false;
3562 		break;
3563 	}
3564 }
3565 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state);
3566 
3567 /**
3568  * phylink_mii_c22_pcs_get_state() - read the MAC PCS state
3569  * @pcs: a pointer to a &struct mdio_device.
3570  * @state: a pointer to a &struct phylink_link_state.
3571  *
3572  * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3573  * clause 37 negotiation and/or SGMII control.
3574  *
3575  * Read the MAC PCS state from the MII device configured in @config and
3576  * parse the Clause 37 or Cisco SGMII link partner negotiation word into
3577  * the phylink @state structure. This is suitable to be directly plugged
3578  * into the pcs_get_state() member of the struct phylink_pcs_ops
3579  * structure.
3580  */
phylink_mii_c22_pcs_get_state(struct mdio_device * pcs,struct phylink_link_state * state)3581 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs,
3582 				   struct phylink_link_state *state)
3583 {
3584 	int bmsr, lpa;
3585 
3586 	bmsr = mdiodev_read(pcs, MII_BMSR);
3587 	lpa = mdiodev_read(pcs, MII_LPA);
3588 	if (bmsr < 0 || lpa < 0) {
3589 		state->link = false;
3590 		return;
3591 	}
3592 
3593 	phylink_mii_c22_pcs_decode_state(state, bmsr, lpa);
3594 }
3595 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state);
3596 
3597 /**
3598  * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS
3599  *	advertisement
3600  * @interface: the PHY interface mode being configured
3601  * @advertising: the ethtool advertisement mask
3602  *
3603  * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3604  * clause 37 negotiation and/or SGMII control.
3605  *
3606  * Encode the clause 37 PCS advertisement as specified by @interface and
3607  * @advertising.
3608  *
3609  * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed.
3610  */
phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface,const unsigned long * advertising)3611 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface,
3612 					     const unsigned long *advertising)
3613 {
3614 	u16 adv;
3615 
3616 	switch (interface) {
3617 	case PHY_INTERFACE_MODE_1000BASEX:
3618 	case PHY_INTERFACE_MODE_2500BASEX:
3619 		adv = ADVERTISE_1000XFULL;
3620 		if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT,
3621 				      advertising))
3622 			adv |= ADVERTISE_1000XPAUSE;
3623 		if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
3624 				      advertising))
3625 			adv |= ADVERTISE_1000XPSE_ASYM;
3626 		return adv;
3627 	case PHY_INTERFACE_MODE_SGMII:
3628 	case PHY_INTERFACE_MODE_QSGMII:
3629 		return 0x0001;
3630 	default:
3631 		/* Nothing to do for other modes */
3632 		return -EINVAL;
3633 	}
3634 }
3635 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement);
3636 
3637 /**
3638  * phylink_mii_c22_pcs_config() - configure clause 22 PCS
3639  * @pcs: a pointer to a &struct mdio_device.
3640  * @interface: the PHY interface mode being configured
3641  * @advertising: the ethtool advertisement mask
3642  * @neg_mode: PCS negotiation mode
3643  *
3644  * Configure a Clause 22 PCS PHY with the appropriate negotiation
3645  * parameters for the @mode, @interface and @advertising parameters.
3646  * Returns negative error number on failure, zero if the advertisement
3647  * has not changed, or positive if there is a change.
3648  */
phylink_mii_c22_pcs_config(struct mdio_device * pcs,phy_interface_t interface,const unsigned long * advertising,unsigned int neg_mode)3649 int phylink_mii_c22_pcs_config(struct mdio_device *pcs,
3650 			       phy_interface_t interface,
3651 			       const unsigned long *advertising,
3652 			       unsigned int neg_mode)
3653 {
3654 	bool changed = 0;
3655 	u16 bmcr;
3656 	int ret, adv;
3657 
3658 	adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising);
3659 	if (adv >= 0) {
3660 		ret = mdiobus_modify_changed(pcs->bus, pcs->addr,
3661 					     MII_ADVERTISE, 0xffff, adv);
3662 		if (ret < 0)
3663 			return ret;
3664 		changed = ret;
3665 	}
3666 
3667 	if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED)
3668 		bmcr = BMCR_ANENABLE;
3669 	else
3670 		bmcr = 0;
3671 
3672 	/* Configure the inband state. Ensure ISOLATE bit is disabled */
3673 	ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr);
3674 	if (ret < 0)
3675 		return ret;
3676 
3677 	return changed;
3678 }
3679 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config);
3680 
3681 /**
3682  * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation
3683  * @pcs: a pointer to a &struct mdio_device.
3684  *
3685  * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3686  * clause 37 negotiation.
3687  *
3688  * Restart the clause 37 negotiation with the link partner. This is
3689  * suitable to be directly plugged into the pcs_get_state() member
3690  * of the struct phylink_pcs_ops structure.
3691  */
phylink_mii_c22_pcs_an_restart(struct mdio_device * pcs)3692 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs)
3693 {
3694 	int val = mdiodev_read(pcs, MII_BMCR);
3695 
3696 	if (val >= 0) {
3697 		val |= BMCR_ANRESTART;
3698 
3699 		mdiodev_write(pcs, MII_BMCR, val);
3700 	}
3701 }
3702 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart);
3703 
phylink_mii_c45_pcs_get_state(struct mdio_device * pcs,struct phylink_link_state * state)3704 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs,
3705 				   struct phylink_link_state *state)
3706 {
3707 	struct mii_bus *bus = pcs->bus;
3708 	int addr = pcs->addr;
3709 	int stat;
3710 
3711 	stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1);
3712 	if (stat < 0) {
3713 		state->link = false;
3714 		return;
3715 	}
3716 
3717 	state->link = !!(stat & MDIO_STAT1_LSTATUS);
3718 	if (!state->link)
3719 		return;
3720 
3721 	switch (state->interface) {
3722 	case PHY_INTERFACE_MODE_10GBASER:
3723 		state->speed = SPEED_10000;
3724 		state->duplex = DUPLEX_FULL;
3725 		break;
3726 
3727 	default:
3728 		break;
3729 	}
3730 }
3731 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state);
3732 
phylink_init(void)3733 static int __init phylink_init(void)
3734 {
3735 	for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i)
3736 		__set_bit(phylink_sfp_interface_preference[i],
3737 			  phylink_sfp_interfaces);
3738 
3739 	return 0;
3740 }
3741 
3742 module_init(phylink_init);
3743 
3744 MODULE_LICENSE("GPL v2");
3745