1 /*
2 * Copyright 2020 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22
23 #ifndef __SMU_CMN_H__
24 #define __SMU_CMN_H__
25
26 #include "amdgpu_smu.h"
27
28 #if defined(SWSMU_CODE_LAYER_L2) || defined(SWSMU_CODE_LAYER_L3) || defined(SWSMU_CODE_LAYER_L4)
29
30 #define FDO_PWM_MODE_STATIC 1
31 #define FDO_PWM_MODE_STATIC_RPM 5
32
33 extern const int link_speed[];
34
35 /* Helper to Convert from PCIE Gen 1/2/3/4/5/6 to 0.1 GT/s speed units */
pcie_gen_to_speed(uint32_t gen)36 static inline int pcie_gen_to_speed(uint32_t gen)
37 {
38 return ((gen == 0) ? link_speed[0] : link_speed[gen - 1]);
39 }
40
41 int smu_cmn_send_msg_without_waiting(struct smu_context *smu,
42 uint16_t msg_index,
43 uint32_t param);
44 int smu_cmn_send_smc_msg_with_param(struct smu_context *smu,
45 enum smu_message_type msg,
46 uint32_t param,
47 uint32_t *read_arg);
48
49 int smu_cmn_send_smc_msg(struct smu_context *smu,
50 enum smu_message_type msg,
51 uint32_t *read_arg);
52
53 int smu_cmn_send_debug_smc_msg(struct smu_context *smu,
54 uint32_t msg);
55
56 int smu_cmn_send_debug_smc_msg_with_param(struct smu_context *smu,
57 uint32_t msg, uint32_t param);
58
59 int smu_cmn_wait_for_response(struct smu_context *smu);
60
61 int smu_cmn_to_asic_specific_index(struct smu_context *smu,
62 enum smu_cmn2asic_mapping_type type,
63 uint32_t index);
64
65 int smu_cmn_feature_is_supported(struct smu_context *smu,
66 enum smu_feature_mask mask);
67
68 int smu_cmn_feature_is_enabled(struct smu_context *smu,
69 enum smu_feature_mask mask);
70
71 bool smu_cmn_clk_dpm_is_enabled(struct smu_context *smu,
72 enum smu_clk_type clk_type);
73
74 int smu_cmn_get_enabled_mask(struct smu_context *smu,
75 uint64_t *feature_mask);
76
77 uint64_t smu_cmn_get_indep_throttler_status(
78 const unsigned long dep_status,
79 const uint8_t *throttler_map);
80
81 int smu_cmn_feature_update_enable_state(struct smu_context *smu,
82 uint64_t feature_mask,
83 bool enabled);
84
85 int smu_cmn_feature_set_enabled(struct smu_context *smu,
86 enum smu_feature_mask mask,
87 bool enable);
88
89 size_t smu_cmn_get_pp_feature_mask(struct smu_context *smu,
90 char *buf);
91
92 int smu_cmn_set_pp_feature_mask(struct smu_context *smu,
93 uint64_t new_mask);
94
95 int smu_cmn_disable_all_features_with_exception(struct smu_context *smu,
96 enum smu_feature_mask mask);
97
98 int smu_cmn_get_smc_version(struct smu_context *smu,
99 uint32_t *if_version,
100 uint32_t *smu_version);
101
102 int smu_cmn_update_table(struct smu_context *smu,
103 enum smu_table_id table_index,
104 int argument,
105 void *table_data,
106 bool drv2smu);
107
108 int smu_cmn_write_watermarks_table(struct smu_context *smu);
109
110 int smu_cmn_write_pptable(struct smu_context *smu);
111
112 int smu_cmn_get_metrics_table(struct smu_context *smu,
113 void *metrics_table,
114 bool bypass_cache);
115
116 int smu_cmn_get_combo_pptable(struct smu_context *smu);
117
118 void smu_cmn_init_soft_gpu_metrics(void *table, uint8_t frev, uint8_t crev);
119
120 int smu_cmn_set_mp1_state(struct smu_context *smu,
121 enum pp_mp1_state mp1_state);
122
123 /*
124 * Helper function to make sysfs_emit_at() happy. Align buf to
125 * the current page boundary and record the offset.
126 */
smu_cmn_get_sysfs_buf(char ** buf,int * offset)127 static inline void smu_cmn_get_sysfs_buf(char **buf, int *offset)
128 {
129 if (!*buf || !offset)
130 return;
131
132 *offset = offset_in_page(*buf);
133 *buf -= *offset;
134 }
135
136 bool smu_cmn_is_audio_func_enabled(struct amdgpu_device *adev);
137
138 #endif
139 #endif
140