xref: /openbmc/qemu/hw/pci-bridge/pci_bridge_dev.c (revision f026c578)
1 /*
2  * Standard PCI Bridge Device
3  *
4  * Copyright (c) 2011 Red Hat Inc. Author: Michael S. Tsirkin <mst@redhat.com>
5  *
6  * http://www.pcisig.com/specifications/conventional/pci_to_pci_bridge_architecture/
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; either version 2 of the License, or
11  * (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License along
19  * with this program; if not, see <http://www.gnu.org/licenses/>.
20  */
21 
22 #include "qemu/osdep.h"
23 #include "qapi/error.h"
24 #include "qemu/module.h"
25 #include "hw/pci/pci_bridge.h"
26 #include "hw/pci/pci_ids.h"
27 #include "hw/pci/msi.h"
28 #include "hw/pci/shpc.h"
29 #include "hw/pci/slotid_cap.h"
30 #include "hw/qdev-properties.h"
31 #include "exec/memory.h"
32 #include "hw/pci/pci_bus.h"
33 #include "hw/hotplug.h"
34 #include "qom/object.h"
35 
36 #define TYPE_PCI_BRIDGE_DEV      "pci-bridge"
37 #define TYPE_PCI_BRIDGE_SEAT_DEV "pci-bridge-seat"
38 OBJECT_DECLARE_SIMPLE_TYPE(PCIBridgeDev, PCI_BRIDGE_DEV)
39 
40 struct PCIBridgeDev {
41     /*< private >*/
42     PCIBridge parent_obj;
43     /*< public >*/
44 
45     MemoryRegion bar;
46     uint8_t chassis_nr;
47 #define PCI_BRIDGE_DEV_F_SHPC_REQ 0
48     uint32_t flags;
49 
50     OnOffAuto msi;
51 
52     /* additional resources to reserve */
53     PCIResReserve res_reserve;
54 };
55 
pci_bridge_dev_realize(PCIDevice * dev,Error ** errp)56 static void pci_bridge_dev_realize(PCIDevice *dev, Error **errp)
57 {
58     PCIBridge *br = PCI_BRIDGE(dev);
59     PCIBridgeDev *bridge_dev = PCI_BRIDGE_DEV(dev);
60     int err;
61     Error *local_err = NULL;
62 
63     pci_bridge_initfn(dev, TYPE_PCI_BUS);
64 
65     if (bridge_dev->flags & (1 << PCI_BRIDGE_DEV_F_SHPC_REQ)) {
66         dev->config[PCI_INTERRUPT_PIN] = 0x1;
67         memory_region_init(&bridge_dev->bar, OBJECT(dev), "shpc-bar",
68                            shpc_bar_size(dev));
69         err = shpc_init(dev, &br->sec_bus, &bridge_dev->bar, 0, errp);
70         if (err) {
71             goto shpc_error;
72         }
73     } else {
74         /* MSI is not applicable without SHPC */
75         bridge_dev->msi = ON_OFF_AUTO_OFF;
76     }
77 
78     err = slotid_cap_init(dev, 0, bridge_dev->chassis_nr, 0, errp);
79     if (err) {
80         goto slotid_error;
81     }
82 
83     if (bridge_dev->msi != ON_OFF_AUTO_OFF) {
84         /* it means SHPC exists, because MSI is needed by SHPC */
85 
86         err = msi_init(dev, 0, 1, true, true, &local_err);
87         /* Any error other than -ENOTSUP(board's MSI support is broken)
88          * is a programming error */
89         assert(!err || err == -ENOTSUP);
90         if (err && bridge_dev->msi == ON_OFF_AUTO_ON) {
91             /* Can't satisfy user's explicit msi=on request, fail */
92             error_append_hint(&local_err, "You have to use msi=auto (default) "
93                     "or msi=off with this machine type.\n");
94             error_propagate(errp, local_err);
95             goto msi_error;
96         }
97         assert(!local_err || bridge_dev->msi == ON_OFF_AUTO_AUTO);
98         /* With msi=auto, we fall back to MSI off silently */
99         error_free(local_err);
100     }
101 
102     err = pci_bridge_qemu_reserve_cap_init(dev, 0,
103                                          bridge_dev->res_reserve, errp);
104     if (err) {
105         goto cap_error;
106     }
107 
108     if (shpc_present(dev)) {
109         /* TODO: spec recommends using 64 bit prefetcheable BAR.
110          * Check whether that works well. */
111         pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY |
112                          PCI_BASE_ADDRESS_MEM_TYPE_64, &bridge_dev->bar);
113     }
114     return;
115 
116 cap_error:
117     msi_uninit(dev);
118 msi_error:
119     slotid_cap_cleanup(dev);
120 slotid_error:
121     if (shpc_present(dev)) {
122         shpc_cleanup(dev, &bridge_dev->bar);
123     }
124 shpc_error:
125     pci_bridge_exitfn(dev);
126 }
127 
pci_bridge_dev_exitfn(PCIDevice * dev)128 static void pci_bridge_dev_exitfn(PCIDevice *dev)
129 {
130     PCIBridgeDev *bridge_dev = PCI_BRIDGE_DEV(dev);
131 
132     pci_del_capability(dev, PCI_CAP_ID_VNDR, sizeof(PCIBridgeQemuCap));
133     if (msi_present(dev)) {
134         msi_uninit(dev);
135     }
136     slotid_cap_cleanup(dev);
137     if (shpc_present(dev)) {
138         shpc_cleanup(dev, &bridge_dev->bar);
139     }
140     pci_bridge_exitfn(dev);
141 }
142 
pci_bridge_dev_instance_finalize(Object * obj)143 static void pci_bridge_dev_instance_finalize(Object *obj)
144 {
145     /* this function is idempotent and handles (PCIDevice.shpc == NULL) */
146     shpc_free(PCI_DEVICE(obj));
147 }
148 
pci_bridge_dev_write_config(PCIDevice * d,uint32_t address,uint32_t val,int len)149 static void pci_bridge_dev_write_config(PCIDevice *d,
150                                         uint32_t address, uint32_t val, int len)
151 {
152     pci_bridge_write_config(d, address, val, len);
153     if (msi_present(d)) {
154         msi_write_config(d, address, val, len);
155     }
156     if (shpc_present(d)) {
157         shpc_cap_write_config(d, address, val, len);
158     }
159 }
160 
qdev_pci_bridge_dev_reset(DeviceState * qdev)161 static void qdev_pci_bridge_dev_reset(DeviceState *qdev)
162 {
163     PCIDevice *dev = PCI_DEVICE(qdev);
164 
165     pci_bridge_reset(qdev);
166     if (shpc_present(dev)) {
167         shpc_reset(dev);
168     }
169 }
170 
171 static Property pci_bridge_dev_properties[] = {
172                     /* Note: 0 is not a legal chassis number. */
173     DEFINE_PROP_UINT8(PCI_BRIDGE_DEV_PROP_CHASSIS_NR, PCIBridgeDev, chassis_nr,
174                       0),
175     DEFINE_PROP_ON_OFF_AUTO(PCI_BRIDGE_DEV_PROP_MSI, PCIBridgeDev, msi,
176                             ON_OFF_AUTO_AUTO),
177     DEFINE_PROP_BIT(PCI_BRIDGE_DEV_PROP_SHPC, PCIBridgeDev, flags,
178                     PCI_BRIDGE_DEV_F_SHPC_REQ, true),
179     DEFINE_PROP_UINT32("bus-reserve", PCIBridgeDev,
180                        res_reserve.bus, -1),
181     DEFINE_PROP_SIZE("io-reserve", PCIBridgeDev,
182                      res_reserve.io, -1),
183     DEFINE_PROP_SIZE("mem-reserve", PCIBridgeDev,
184                      res_reserve.mem_non_pref, -1),
185     DEFINE_PROP_SIZE("pref32-reserve", PCIBridgeDev,
186                      res_reserve.mem_pref_32, -1),
187     DEFINE_PROP_SIZE("pref64-reserve", PCIBridgeDev,
188                      res_reserve.mem_pref_64, -1),
189     DEFINE_PROP_END_OF_LIST(),
190 };
191 
pci_device_shpc_present(void * opaque,int version_id)192 static bool pci_device_shpc_present(void *opaque, int version_id)
193 {
194     PCIDevice *dev = opaque;
195 
196     return shpc_present(dev);
197 }
198 
199 static const VMStateDescription pci_bridge_dev_vmstate = {
200     .name = "pci_bridge",
201     .priority = MIG_PRI_PCI_BUS,
202     .fields = (const VMStateField[]) {
203         VMSTATE_PCI_DEVICE(parent_obj, PCIBridge),
204         SHPC_VMSTATE(shpc, PCIDevice, pci_device_shpc_present),
205         VMSTATE_END_OF_LIST()
206     }
207 };
208 
pci_bridge_dev_plug_cb(HotplugHandler * hotplug_dev,DeviceState * dev,Error ** errp)209 void pci_bridge_dev_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
210                             Error **errp)
211 {
212     PCIDevice *pci_hotplug_dev = PCI_DEVICE(hotplug_dev);
213 
214     if (!shpc_present(pci_hotplug_dev)) {
215         error_setg(errp, "standard hotplug controller has been disabled for "
216                    "this %s", object_get_typename(OBJECT(hotplug_dev)));
217         return;
218     }
219     shpc_device_plug_cb(hotplug_dev, dev, errp);
220 }
221 
pci_bridge_dev_unplug_cb(HotplugHandler * hotplug_dev,DeviceState * dev,Error ** errp)222 void pci_bridge_dev_unplug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
223                               Error **errp)
224 {
225     PCIDevice *pci_hotplug_dev = PCI_DEVICE(hotplug_dev);
226 
227     g_assert(shpc_present(pci_hotplug_dev));
228     shpc_device_unplug_cb(hotplug_dev, dev, errp);
229 }
230 
pci_bridge_dev_unplug_request_cb(HotplugHandler * hotplug_dev,DeviceState * dev,Error ** errp)231 void pci_bridge_dev_unplug_request_cb(HotplugHandler *hotplug_dev,
232                                       DeviceState *dev, Error **errp)
233 {
234     PCIDevice *pci_hotplug_dev = PCI_DEVICE(hotplug_dev);
235 
236     if (!shpc_present(pci_hotplug_dev)) {
237         error_setg(errp, "standard hotplug controller has been disabled for "
238                    "this %s", object_get_typename(OBJECT(hotplug_dev)));
239         return;
240     }
241     shpc_device_unplug_request_cb(hotplug_dev, dev, errp);
242 }
243 
pci_bridge_dev_class_init(ObjectClass * klass,void * data)244 static void pci_bridge_dev_class_init(ObjectClass *klass, void *data)
245 {
246     DeviceClass *dc = DEVICE_CLASS(klass);
247     PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
248     HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(klass);
249 
250     k->realize = pci_bridge_dev_realize;
251     k->exit = pci_bridge_dev_exitfn;
252     k->config_write = pci_bridge_dev_write_config;
253     k->vendor_id = PCI_VENDOR_ID_REDHAT;
254     k->device_id = PCI_DEVICE_ID_REDHAT_BRIDGE;
255     k->class_id = PCI_CLASS_BRIDGE_PCI;
256     dc->desc = "Standard PCI Bridge";
257     dc->reset = qdev_pci_bridge_dev_reset;
258     device_class_set_props(dc, pci_bridge_dev_properties);
259     dc->vmsd = &pci_bridge_dev_vmstate;
260     set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
261     hc->plug = pci_bridge_dev_plug_cb;
262     hc->unplug = pci_bridge_dev_unplug_cb;
263     hc->unplug_request = pci_bridge_dev_unplug_request_cb;
264 }
265 
266 static const TypeInfo pci_bridge_dev_info = {
267     .name              = TYPE_PCI_BRIDGE_DEV,
268     .parent            = TYPE_PCI_BRIDGE,
269     .instance_size     = sizeof(PCIBridgeDev),
270     .class_init        = pci_bridge_dev_class_init,
271     .instance_finalize = pci_bridge_dev_instance_finalize,
272     .interfaces = (InterfaceInfo[]) {
273         { TYPE_HOTPLUG_HANDLER },
274         { INTERFACE_CONVENTIONAL_PCI_DEVICE },
275         { }
276     }
277 };
278 
279 /*
280  * Multiseat bridge.  Same as the standard pci bridge, only with a
281  * different pci id, so we can match it easily in the guest for
282  * automagic multiseat configuration.  See docs/multiseat.txt for more.
283  */
pci_bridge_dev_seat_class_init(ObjectClass * klass,void * data)284 static void pci_bridge_dev_seat_class_init(ObjectClass *klass, void *data)
285 {
286     DeviceClass *dc = DEVICE_CLASS(klass);
287     PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
288 
289     k->device_id = PCI_DEVICE_ID_REDHAT_BRIDGE_SEAT;
290     dc->desc = "Standard PCI Bridge (multiseat)";
291 }
292 
293 static const TypeInfo pci_bridge_dev_seat_info = {
294     .name              = TYPE_PCI_BRIDGE_SEAT_DEV,
295     .parent            = TYPE_PCI_BRIDGE_DEV,
296     .instance_size     = sizeof(PCIBridgeDev),
297     .class_init        = pci_bridge_dev_seat_class_init,
298 };
299 
pci_bridge_dev_register(void)300 static void pci_bridge_dev_register(void)
301 {
302     type_register_static(&pci_bridge_dev_info);
303     type_register_static(&pci_bridge_dev_seat_info);
304 }
305 
306 type_init(pci_bridge_dev_register);
307