1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * (C) Copyright 2010 4 * Marvell Semiconductor <www.marvell.com> 5 * Written-by: Prafulla Wadaskar <prafulla@marvell.com>, 6 */ 7 8 #include <common.h> 9 #include <asm/io.h> 10 #include <mvmfp.h> 11 #include <asm/arch/mfp.h> 12 13 /* 14 * mfp_config 15 * 16 * On most of Marvell SoCs (ex. ARMADA100) there is Multi-Funtion-Pin 17 * configuration registers to configure each GPIO/Function pin on the 18 * SoC. 19 * 20 * This function reads the array of values for 21 * MFPR_X registers and programms them into respective 22 * Multi-Function Pin registers. 23 * It supports - Alternate Function Selection programming. 24 * 25 * Whereas, 26 * The Configureation value is constructed using MFP() 27 * array consists of 32bit values as defined in MFP(xx,xx..) macro 28 */ mfp_config(u32 * mfp_cfgs)29void mfp_config(u32 *mfp_cfgs) 30 { 31 u32 *p_mfpr = NULL; 32 u32 cfg_val, val; 33 34 do { 35 cfg_val = *mfp_cfgs++; 36 /* exit if End of configuration table detected */ 37 if (cfg_val == MFP_EOC) 38 break; 39 40 p_mfpr = (u32 *)(MV_MFPR_BASE 41 + MFP_REG_GET_OFFSET(cfg_val)); 42 43 /* Write a mfg register as per configuration */ 44 val = 0; 45 if (cfg_val & MFP_VALUE_MASK) 46 val |= cfg_val & MFP_VALUE_MASK; 47 48 writel(val, p_mfpr); 49 } while (1); 50 /* 51 * perform a read-back of any MFPR register to make sure the 52 * previous writings are finished 53 */ 54 readl(p_mfpr); 55 } 56