1 /*
2 * ST STM32VLDISCOVERY machine
3 * Olimex STM32-H405 machine
4 *
5 * Copyright (c) 2022 Felipe Balbi <balbi@kernel.org>
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
25
26 #include "qemu/osdep.h"
27 #include "qapi/error.h"
28 #include "hw/boards.h"
29 #include "hw/qdev-properties.h"
30 #include "hw/qdev-clock.h"
31 #include "qemu/error-report.h"
32 #include "hw/arm/stm32f405_soc.h"
33 #include "hw/arm/boot.h"
34
35 /* olimex-stm32-h405 implementation is derived from netduinoplus2 */
36
37 /* Main SYSCLK frequency in Hz (168MHz) */
38 #define SYSCLK_FRQ 168000000ULL
39
olimex_stm32_h405_init(MachineState * machine)40 static void olimex_stm32_h405_init(MachineState *machine)
41 {
42 DeviceState *dev;
43 Clock *sysclk;
44
45 /* This clock doesn't need migration because it is fixed-frequency */
46 sysclk = clock_new(OBJECT(machine), "SYSCLK");
47 clock_set_hz(sysclk, SYSCLK_FRQ);
48
49 dev = qdev_new(TYPE_STM32F405_SOC);
50 object_property_add_child(OBJECT(machine), "soc", OBJECT(dev));
51 qdev_connect_clock_in(dev, "sysclk", sysclk);
52 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
53
54 armv7m_load_kernel(ARM_CPU(first_cpu),
55 machine->kernel_filename,
56 0, FLASH_SIZE);
57 }
58
olimex_stm32_h405_machine_init(MachineClass * mc)59 static void olimex_stm32_h405_machine_init(MachineClass *mc)
60 {
61 static const char * const valid_cpu_types[] = {
62 ARM_CPU_TYPE_NAME("cortex-m4"),
63 NULL
64 };
65
66 mc->desc = "Olimex STM32-H405 (Cortex-M4)";
67 mc->init = olimex_stm32_h405_init;
68 mc->valid_cpu_types = valid_cpu_types;
69
70 /* SRAM pre-allocated as part of the SoC instantiation */
71 mc->default_ram_size = 0;
72 }
73
74 DEFINE_MACHINE("olimex-stm32-h405", olimex_stm32_h405_machine_init)
75