1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * NVM Express device driver
4 * Copyright (c) 2011-2014, Intel Corporation.
5 */
6
7 #include <linux/blkdev.h>
8 #include <linux/blk-mq.h>
9 #include <linux/blk-integrity.h>
10 #include <linux/compat.h>
11 #include <linux/delay.h>
12 #include <linux/errno.h>
13 #include <linux/hdreg.h>
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/backing-dev.h>
17 #include <linux/slab.h>
18 #include <linux/types.h>
19 #include <linux/pr.h>
20 #include <linux/ptrace.h>
21 #include <linux/nvme_ioctl.h>
22 #include <linux/pm_qos.h>
23 #include <asm/unaligned.h>
24
25 #include "nvme.h"
26 #include "fabrics.h"
27 #include <linux/nvme-auth.h>
28
29 #define CREATE_TRACE_POINTS
30 #include "trace.h"
31
32 #define NVME_MINORS (1U << MINORBITS)
33
34 struct nvme_ns_info {
35 struct nvme_ns_ids ids;
36 u32 nsid;
37 __le32 anagrpid;
38 bool is_shared;
39 bool is_readonly;
40 bool is_ready;
41 bool is_removed;
42 };
43
44 unsigned int admin_timeout = 60;
45 module_param(admin_timeout, uint, 0644);
46 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
47 EXPORT_SYMBOL_GPL(admin_timeout);
48
49 unsigned int nvme_io_timeout = 30;
50 module_param_named(io_timeout, nvme_io_timeout, uint, 0644);
51 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
52 EXPORT_SYMBOL_GPL(nvme_io_timeout);
53
54 static unsigned char shutdown_timeout = 5;
55 module_param(shutdown_timeout, byte, 0644);
56 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
57
58 static u8 nvme_max_retries = 5;
59 module_param_named(max_retries, nvme_max_retries, byte, 0644);
60 MODULE_PARM_DESC(max_retries, "max number of retries a command may have");
61
62 static unsigned long default_ps_max_latency_us = 100000;
63 module_param(default_ps_max_latency_us, ulong, 0644);
64 MODULE_PARM_DESC(default_ps_max_latency_us,
65 "max power saving latency for new devices; use PM QOS to change per device");
66
67 static bool force_apst;
68 module_param(force_apst, bool, 0644);
69 MODULE_PARM_DESC(force_apst, "allow APST for newly enumerated devices even if quirked off");
70
71 static unsigned long apst_primary_timeout_ms = 100;
72 module_param(apst_primary_timeout_ms, ulong, 0644);
73 MODULE_PARM_DESC(apst_primary_timeout_ms,
74 "primary APST timeout in ms");
75
76 static unsigned long apst_secondary_timeout_ms = 2000;
77 module_param(apst_secondary_timeout_ms, ulong, 0644);
78 MODULE_PARM_DESC(apst_secondary_timeout_ms,
79 "secondary APST timeout in ms");
80
81 static unsigned long apst_primary_latency_tol_us = 15000;
82 module_param(apst_primary_latency_tol_us, ulong, 0644);
83 MODULE_PARM_DESC(apst_primary_latency_tol_us,
84 "primary APST latency tolerance in us");
85
86 static unsigned long apst_secondary_latency_tol_us = 100000;
87 module_param(apst_secondary_latency_tol_us, ulong, 0644);
88 MODULE_PARM_DESC(apst_secondary_latency_tol_us,
89 "secondary APST latency tolerance in us");
90
91 /*
92 * nvme_wq - hosts nvme related works that are not reset or delete
93 * nvme_reset_wq - hosts nvme reset works
94 * nvme_delete_wq - hosts nvme delete works
95 *
96 * nvme_wq will host works such as scan, aen handling, fw activation,
97 * keep-alive, periodic reconnects etc. nvme_reset_wq
98 * runs reset works which also flush works hosted on nvme_wq for
99 * serialization purposes. nvme_delete_wq host controller deletion
100 * works which flush reset works for serialization.
101 */
102 struct workqueue_struct *nvme_wq;
103 EXPORT_SYMBOL_GPL(nvme_wq);
104
105 struct workqueue_struct *nvme_reset_wq;
106 EXPORT_SYMBOL_GPL(nvme_reset_wq);
107
108 struct workqueue_struct *nvme_delete_wq;
109 EXPORT_SYMBOL_GPL(nvme_delete_wq);
110
111 static LIST_HEAD(nvme_subsystems);
112 DEFINE_MUTEX(nvme_subsystems_lock);
113
114 static DEFINE_IDA(nvme_instance_ida);
115 static dev_t nvme_ctrl_base_chr_devt;
116 static struct class *nvme_class;
117 static struct class *nvme_subsys_class;
118
119 static DEFINE_IDA(nvme_ns_chr_minor_ida);
120 static dev_t nvme_ns_chr_devt;
121 static struct class *nvme_ns_chr_class;
122
123 static void nvme_put_subsystem(struct nvme_subsystem *subsys);
124 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl,
125 unsigned nsid);
126 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl,
127 struct nvme_command *cmd);
128
nvme_queue_scan(struct nvme_ctrl * ctrl)129 void nvme_queue_scan(struct nvme_ctrl *ctrl)
130 {
131 /*
132 * Only new queue scan work when admin and IO queues are both alive
133 */
134 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE && ctrl->tagset)
135 queue_work(nvme_wq, &ctrl->scan_work);
136 }
137
138 /*
139 * Use this function to proceed with scheduling reset_work for a controller
140 * that had previously been set to the resetting state. This is intended for
141 * code paths that can't be interrupted by other reset attempts. A hot removal
142 * may prevent this from succeeding.
143 */
nvme_try_sched_reset(struct nvme_ctrl * ctrl)144 int nvme_try_sched_reset(struct nvme_ctrl *ctrl)
145 {
146 if (nvme_ctrl_state(ctrl) != NVME_CTRL_RESETTING)
147 return -EBUSY;
148 if (!queue_work(nvme_reset_wq, &ctrl->reset_work))
149 return -EBUSY;
150 return 0;
151 }
152 EXPORT_SYMBOL_GPL(nvme_try_sched_reset);
153
nvme_failfast_work(struct work_struct * work)154 static void nvme_failfast_work(struct work_struct *work)
155 {
156 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work),
157 struct nvme_ctrl, failfast_work);
158
159 if (nvme_ctrl_state(ctrl) != NVME_CTRL_CONNECTING)
160 return;
161
162 set_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags);
163 dev_info(ctrl->device, "failfast expired\n");
164 nvme_kick_requeue_lists(ctrl);
165 }
166
nvme_start_failfast_work(struct nvme_ctrl * ctrl)167 static inline void nvme_start_failfast_work(struct nvme_ctrl *ctrl)
168 {
169 if (!ctrl->opts || ctrl->opts->fast_io_fail_tmo == -1)
170 return;
171
172 schedule_delayed_work(&ctrl->failfast_work,
173 ctrl->opts->fast_io_fail_tmo * HZ);
174 }
175
nvme_stop_failfast_work(struct nvme_ctrl * ctrl)176 static inline void nvme_stop_failfast_work(struct nvme_ctrl *ctrl)
177 {
178 if (!ctrl->opts)
179 return;
180
181 cancel_delayed_work_sync(&ctrl->failfast_work);
182 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags);
183 }
184
185
nvme_reset_ctrl(struct nvme_ctrl * ctrl)186 int nvme_reset_ctrl(struct nvme_ctrl *ctrl)
187 {
188 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING))
189 return -EBUSY;
190 if (!queue_work(nvme_reset_wq, &ctrl->reset_work))
191 return -EBUSY;
192 return 0;
193 }
194 EXPORT_SYMBOL_GPL(nvme_reset_ctrl);
195
nvme_reset_ctrl_sync(struct nvme_ctrl * ctrl)196 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl)
197 {
198 int ret;
199
200 ret = nvme_reset_ctrl(ctrl);
201 if (!ret) {
202 flush_work(&ctrl->reset_work);
203 if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE)
204 ret = -ENETRESET;
205 }
206
207 return ret;
208 }
209
nvme_do_delete_ctrl(struct nvme_ctrl * ctrl)210 static void nvme_do_delete_ctrl(struct nvme_ctrl *ctrl)
211 {
212 dev_info(ctrl->device,
213 "Removing ctrl: NQN \"%s\"\n", nvmf_ctrl_subsysnqn(ctrl));
214
215 flush_work(&ctrl->reset_work);
216 nvme_stop_ctrl(ctrl);
217 nvme_remove_namespaces(ctrl);
218 ctrl->ops->delete_ctrl(ctrl);
219 nvme_uninit_ctrl(ctrl);
220 }
221
nvme_delete_ctrl_work(struct work_struct * work)222 static void nvme_delete_ctrl_work(struct work_struct *work)
223 {
224 struct nvme_ctrl *ctrl =
225 container_of(work, struct nvme_ctrl, delete_work);
226
227 nvme_do_delete_ctrl(ctrl);
228 }
229
nvme_delete_ctrl(struct nvme_ctrl * ctrl)230 int nvme_delete_ctrl(struct nvme_ctrl *ctrl)
231 {
232 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING))
233 return -EBUSY;
234 if (!queue_work(nvme_delete_wq, &ctrl->delete_work))
235 return -EBUSY;
236 return 0;
237 }
238 EXPORT_SYMBOL_GPL(nvme_delete_ctrl);
239
nvme_delete_ctrl_sync(struct nvme_ctrl * ctrl)240 void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl)
241 {
242 /*
243 * Keep a reference until nvme_do_delete_ctrl() complete,
244 * since ->delete_ctrl can free the controller.
245 */
246 nvme_get_ctrl(ctrl);
247 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING))
248 nvme_do_delete_ctrl(ctrl);
249 nvme_put_ctrl(ctrl);
250 }
251
nvme_error_status(u16 status)252 static blk_status_t nvme_error_status(u16 status)
253 {
254 switch (status & 0x7ff) {
255 case NVME_SC_SUCCESS:
256 return BLK_STS_OK;
257 case NVME_SC_CAP_EXCEEDED:
258 return BLK_STS_NOSPC;
259 case NVME_SC_LBA_RANGE:
260 case NVME_SC_CMD_INTERRUPTED:
261 case NVME_SC_NS_NOT_READY:
262 return BLK_STS_TARGET;
263 case NVME_SC_BAD_ATTRIBUTES:
264 case NVME_SC_ONCS_NOT_SUPPORTED:
265 case NVME_SC_INVALID_OPCODE:
266 case NVME_SC_INVALID_FIELD:
267 case NVME_SC_INVALID_NS:
268 return BLK_STS_NOTSUPP;
269 case NVME_SC_WRITE_FAULT:
270 case NVME_SC_READ_ERROR:
271 case NVME_SC_UNWRITTEN_BLOCK:
272 case NVME_SC_ACCESS_DENIED:
273 case NVME_SC_READ_ONLY:
274 case NVME_SC_COMPARE_FAILED:
275 return BLK_STS_MEDIUM;
276 case NVME_SC_GUARD_CHECK:
277 case NVME_SC_APPTAG_CHECK:
278 case NVME_SC_REFTAG_CHECK:
279 case NVME_SC_INVALID_PI:
280 return BLK_STS_PROTECTION;
281 case NVME_SC_RESERVATION_CONFLICT:
282 return BLK_STS_RESV_CONFLICT;
283 case NVME_SC_HOST_PATH_ERROR:
284 return BLK_STS_TRANSPORT;
285 case NVME_SC_ZONE_TOO_MANY_ACTIVE:
286 return BLK_STS_ZONE_ACTIVE_RESOURCE;
287 case NVME_SC_ZONE_TOO_MANY_OPEN:
288 return BLK_STS_ZONE_OPEN_RESOURCE;
289 default:
290 return BLK_STS_IOERR;
291 }
292 }
293
nvme_retry_req(struct request * req)294 static void nvme_retry_req(struct request *req)
295 {
296 unsigned long delay = 0;
297 u16 crd;
298
299 /* The mask and shift result must be <= 3 */
300 crd = (nvme_req(req)->status & NVME_SC_CRD) >> 11;
301 if (crd)
302 delay = nvme_req(req)->ctrl->crdt[crd - 1] * 100;
303
304 nvme_req(req)->retries++;
305 blk_mq_requeue_request(req, false);
306 blk_mq_delay_kick_requeue_list(req->q, delay);
307 }
308
nvme_log_error(struct request * req)309 static void nvme_log_error(struct request *req)
310 {
311 struct nvme_ns *ns = req->q->queuedata;
312 struct nvme_request *nr = nvme_req(req);
313
314 if (ns) {
315 pr_err_ratelimited("%s: %s(0x%x) @ LBA %llu, %llu blocks, %s (sct 0x%x / sc 0x%x) %s%s\n",
316 ns->disk ? ns->disk->disk_name : "?",
317 nvme_get_opcode_str(nr->cmd->common.opcode),
318 nr->cmd->common.opcode,
319 (unsigned long long)nvme_sect_to_lba(ns, blk_rq_pos(req)),
320 (unsigned long long)blk_rq_bytes(req) >> ns->lba_shift,
321 nvme_get_error_status_str(nr->status),
322 nr->status >> 8 & 7, /* Status Code Type */
323 nr->status & 0xff, /* Status Code */
324 nr->status & NVME_SC_MORE ? "MORE " : "",
325 nr->status & NVME_SC_DNR ? "DNR " : "");
326 return;
327 }
328
329 pr_err_ratelimited("%s: %s(0x%x), %s (sct 0x%x / sc 0x%x) %s%s\n",
330 dev_name(nr->ctrl->device),
331 nvme_get_admin_opcode_str(nr->cmd->common.opcode),
332 nr->cmd->common.opcode,
333 nvme_get_error_status_str(nr->status),
334 nr->status >> 8 & 7, /* Status Code Type */
335 nr->status & 0xff, /* Status Code */
336 nr->status & NVME_SC_MORE ? "MORE " : "",
337 nr->status & NVME_SC_DNR ? "DNR " : "");
338 }
339
340 enum nvme_disposition {
341 COMPLETE,
342 RETRY,
343 FAILOVER,
344 AUTHENTICATE,
345 };
346
nvme_decide_disposition(struct request * req)347 static inline enum nvme_disposition nvme_decide_disposition(struct request *req)
348 {
349 if (likely(nvme_req(req)->status == 0))
350 return COMPLETE;
351
352 if ((nvme_req(req)->status & 0x7ff) == NVME_SC_AUTH_REQUIRED)
353 return AUTHENTICATE;
354
355 if (blk_noretry_request(req) ||
356 (nvme_req(req)->status & NVME_SC_DNR) ||
357 nvme_req(req)->retries >= nvme_max_retries)
358 return COMPLETE;
359
360 if (req->cmd_flags & REQ_NVME_MPATH) {
361 if (nvme_is_path_error(nvme_req(req)->status) ||
362 blk_queue_dying(req->q))
363 return FAILOVER;
364 } else {
365 if (blk_queue_dying(req->q))
366 return COMPLETE;
367 }
368
369 return RETRY;
370 }
371
nvme_end_req_zoned(struct request * req)372 static inline void nvme_end_req_zoned(struct request *req)
373 {
374 if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) &&
375 req_op(req) == REQ_OP_ZONE_APPEND)
376 req->__sector = nvme_lba_to_sect(req->q->queuedata,
377 le64_to_cpu(nvme_req(req)->result.u64));
378 }
379
nvme_end_req(struct request * req)380 void nvme_end_req(struct request *req)
381 {
382 blk_status_t status = nvme_error_status(nvme_req(req)->status);
383
384 if (unlikely(nvme_req(req)->status && !(req->rq_flags & RQF_QUIET)))
385 nvme_log_error(req);
386 nvme_end_req_zoned(req);
387 nvme_trace_bio_complete(req);
388 if (req->cmd_flags & REQ_NVME_MPATH)
389 nvme_mpath_end_request(req);
390 blk_mq_end_request(req, status);
391 }
392
nvme_complete_rq(struct request * req)393 void nvme_complete_rq(struct request *req)
394 {
395 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl;
396
397 trace_nvme_complete_rq(req);
398 nvme_cleanup_cmd(req);
399
400 /*
401 * Completions of long-running commands should not be able to
402 * defer sending of periodic keep alives, since the controller
403 * may have completed processing such commands a long time ago
404 * (arbitrarily close to command submission time).
405 * req->deadline - req->timeout is the command submission time
406 * in jiffies.
407 */
408 if (ctrl->kas &&
409 req->deadline - req->timeout >= ctrl->ka_last_check_time)
410 ctrl->comp_seen = true;
411
412 switch (nvme_decide_disposition(req)) {
413 case COMPLETE:
414 nvme_end_req(req);
415 return;
416 case RETRY:
417 nvme_retry_req(req);
418 return;
419 case FAILOVER:
420 nvme_failover_req(req);
421 return;
422 case AUTHENTICATE:
423 #ifdef CONFIG_NVME_AUTH
424 queue_work(nvme_wq, &ctrl->dhchap_auth_work);
425 nvme_retry_req(req);
426 #else
427 nvme_end_req(req);
428 #endif
429 return;
430 }
431 }
432 EXPORT_SYMBOL_GPL(nvme_complete_rq);
433
nvme_complete_batch_req(struct request * req)434 void nvme_complete_batch_req(struct request *req)
435 {
436 trace_nvme_complete_rq(req);
437 nvme_cleanup_cmd(req);
438 nvme_end_req_zoned(req);
439 }
440 EXPORT_SYMBOL_GPL(nvme_complete_batch_req);
441
442 /*
443 * Called to unwind from ->queue_rq on a failed command submission so that the
444 * multipathing code gets called to potentially failover to another path.
445 * The caller needs to unwind all transport specific resource allocations and
446 * must return propagate the return value.
447 */
nvme_host_path_error(struct request * req)448 blk_status_t nvme_host_path_error(struct request *req)
449 {
450 nvme_req(req)->status = NVME_SC_HOST_PATH_ERROR;
451 blk_mq_set_request_complete(req);
452 nvme_complete_rq(req);
453 return BLK_STS_OK;
454 }
455 EXPORT_SYMBOL_GPL(nvme_host_path_error);
456
nvme_cancel_request(struct request * req,void * data)457 bool nvme_cancel_request(struct request *req, void *data)
458 {
459 dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device,
460 "Cancelling I/O %d", req->tag);
461
462 /* don't abort one completed or idle request */
463 if (blk_mq_rq_state(req) != MQ_RQ_IN_FLIGHT)
464 return true;
465
466 nvme_req(req)->status = NVME_SC_HOST_ABORTED_CMD;
467 nvme_req(req)->flags |= NVME_REQ_CANCELLED;
468 blk_mq_complete_request(req);
469 return true;
470 }
471 EXPORT_SYMBOL_GPL(nvme_cancel_request);
472
nvme_cancel_tagset(struct nvme_ctrl * ctrl)473 void nvme_cancel_tagset(struct nvme_ctrl *ctrl)
474 {
475 if (ctrl->tagset) {
476 blk_mq_tagset_busy_iter(ctrl->tagset,
477 nvme_cancel_request, ctrl);
478 blk_mq_tagset_wait_completed_request(ctrl->tagset);
479 }
480 }
481 EXPORT_SYMBOL_GPL(nvme_cancel_tagset);
482
nvme_cancel_admin_tagset(struct nvme_ctrl * ctrl)483 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl)
484 {
485 if (ctrl->admin_tagset) {
486 blk_mq_tagset_busy_iter(ctrl->admin_tagset,
487 nvme_cancel_request, ctrl);
488 blk_mq_tagset_wait_completed_request(ctrl->admin_tagset);
489 }
490 }
491 EXPORT_SYMBOL_GPL(nvme_cancel_admin_tagset);
492
nvme_change_ctrl_state(struct nvme_ctrl * ctrl,enum nvme_ctrl_state new_state)493 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
494 enum nvme_ctrl_state new_state)
495 {
496 enum nvme_ctrl_state old_state;
497 unsigned long flags;
498 bool changed = false;
499
500 spin_lock_irqsave(&ctrl->lock, flags);
501
502 old_state = nvme_ctrl_state(ctrl);
503 switch (new_state) {
504 case NVME_CTRL_LIVE:
505 switch (old_state) {
506 case NVME_CTRL_NEW:
507 case NVME_CTRL_RESETTING:
508 case NVME_CTRL_CONNECTING:
509 changed = true;
510 fallthrough;
511 default:
512 break;
513 }
514 break;
515 case NVME_CTRL_RESETTING:
516 switch (old_state) {
517 case NVME_CTRL_NEW:
518 case NVME_CTRL_LIVE:
519 changed = true;
520 fallthrough;
521 default:
522 break;
523 }
524 break;
525 case NVME_CTRL_CONNECTING:
526 switch (old_state) {
527 case NVME_CTRL_NEW:
528 case NVME_CTRL_RESETTING:
529 changed = true;
530 fallthrough;
531 default:
532 break;
533 }
534 break;
535 case NVME_CTRL_DELETING:
536 switch (old_state) {
537 case NVME_CTRL_LIVE:
538 case NVME_CTRL_RESETTING:
539 case NVME_CTRL_CONNECTING:
540 changed = true;
541 fallthrough;
542 default:
543 break;
544 }
545 break;
546 case NVME_CTRL_DELETING_NOIO:
547 switch (old_state) {
548 case NVME_CTRL_DELETING:
549 case NVME_CTRL_DEAD:
550 changed = true;
551 fallthrough;
552 default:
553 break;
554 }
555 break;
556 case NVME_CTRL_DEAD:
557 switch (old_state) {
558 case NVME_CTRL_DELETING:
559 changed = true;
560 fallthrough;
561 default:
562 break;
563 }
564 break;
565 default:
566 break;
567 }
568
569 if (changed) {
570 WRITE_ONCE(ctrl->state, new_state);
571 wake_up_all(&ctrl->state_wq);
572 }
573
574 spin_unlock_irqrestore(&ctrl->lock, flags);
575 if (!changed)
576 return false;
577
578 if (new_state == NVME_CTRL_LIVE) {
579 if (old_state == NVME_CTRL_CONNECTING)
580 nvme_stop_failfast_work(ctrl);
581 nvme_kick_requeue_lists(ctrl);
582 } else if (new_state == NVME_CTRL_CONNECTING &&
583 old_state == NVME_CTRL_RESETTING) {
584 nvme_start_failfast_work(ctrl);
585 }
586 return changed;
587 }
588 EXPORT_SYMBOL_GPL(nvme_change_ctrl_state);
589
590 /*
591 * Waits for the controller state to be resetting, or returns false if it is
592 * not possible to ever transition to that state.
593 */
nvme_wait_reset(struct nvme_ctrl * ctrl)594 bool nvme_wait_reset(struct nvme_ctrl *ctrl)
595 {
596 wait_event(ctrl->state_wq,
597 nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING) ||
598 nvme_state_terminal(ctrl));
599 return nvme_ctrl_state(ctrl) == NVME_CTRL_RESETTING;
600 }
601 EXPORT_SYMBOL_GPL(nvme_wait_reset);
602
nvme_free_ns_head(struct kref * ref)603 static void nvme_free_ns_head(struct kref *ref)
604 {
605 struct nvme_ns_head *head =
606 container_of(ref, struct nvme_ns_head, ref);
607
608 nvme_mpath_remove_disk(head);
609 ida_free(&head->subsys->ns_ida, head->instance);
610 cleanup_srcu_struct(&head->srcu);
611 nvme_put_subsystem(head->subsys);
612 kfree(head);
613 }
614
nvme_tryget_ns_head(struct nvme_ns_head * head)615 bool nvme_tryget_ns_head(struct nvme_ns_head *head)
616 {
617 return kref_get_unless_zero(&head->ref);
618 }
619
nvme_put_ns_head(struct nvme_ns_head * head)620 void nvme_put_ns_head(struct nvme_ns_head *head)
621 {
622 kref_put(&head->ref, nvme_free_ns_head);
623 }
624
nvme_free_ns(struct kref * kref)625 static void nvme_free_ns(struct kref *kref)
626 {
627 struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref);
628
629 put_disk(ns->disk);
630 nvme_put_ns_head(ns->head);
631 nvme_put_ctrl(ns->ctrl);
632 kfree(ns);
633 }
634
nvme_get_ns(struct nvme_ns * ns)635 bool nvme_get_ns(struct nvme_ns *ns)
636 {
637 return kref_get_unless_zero(&ns->kref);
638 }
639
nvme_put_ns(struct nvme_ns * ns)640 void nvme_put_ns(struct nvme_ns *ns)
641 {
642 kref_put(&ns->kref, nvme_free_ns);
643 }
644 EXPORT_SYMBOL_NS_GPL(nvme_put_ns, NVME_TARGET_PASSTHRU);
645
nvme_clear_nvme_request(struct request * req)646 static inline void nvme_clear_nvme_request(struct request *req)
647 {
648 nvme_req(req)->status = 0;
649 nvme_req(req)->retries = 0;
650 nvme_req(req)->flags = 0;
651 req->rq_flags |= RQF_DONTPREP;
652 }
653
654 /* initialize a passthrough request */
nvme_init_request(struct request * req,struct nvme_command * cmd)655 void nvme_init_request(struct request *req, struct nvme_command *cmd)
656 {
657 if (req->q->queuedata)
658 req->timeout = NVME_IO_TIMEOUT;
659 else /* no queuedata implies admin queue */
660 req->timeout = NVME_ADMIN_TIMEOUT;
661
662 /* passthru commands should let the driver set the SGL flags */
663 cmd->common.flags &= ~NVME_CMD_SGL_ALL;
664
665 req->cmd_flags |= REQ_FAILFAST_DRIVER;
666 if (req->mq_hctx->type == HCTX_TYPE_POLL)
667 req->cmd_flags |= REQ_POLLED;
668 nvme_clear_nvme_request(req);
669 req->rq_flags |= RQF_QUIET;
670 memcpy(nvme_req(req)->cmd, cmd, sizeof(*cmd));
671 }
672 EXPORT_SYMBOL_GPL(nvme_init_request);
673
674 /*
675 * For something we're not in a state to send to the device the default action
676 * is to busy it and retry it after the controller state is recovered. However,
677 * if the controller is deleting or if anything is marked for failfast or
678 * nvme multipath it is immediately failed.
679 *
680 * Note: commands used to initialize the controller will be marked for failfast.
681 * Note: nvme cli/ioctl commands are marked for failfast.
682 */
nvme_fail_nonready_command(struct nvme_ctrl * ctrl,struct request * rq)683 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl,
684 struct request *rq)
685 {
686 enum nvme_ctrl_state state = nvme_ctrl_state(ctrl);
687
688 if (state != NVME_CTRL_DELETING_NOIO &&
689 state != NVME_CTRL_DELETING &&
690 state != NVME_CTRL_DEAD &&
691 !test_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags) &&
692 !blk_noretry_request(rq) && !(rq->cmd_flags & REQ_NVME_MPATH))
693 return BLK_STS_RESOURCE;
694 return nvme_host_path_error(rq);
695 }
696 EXPORT_SYMBOL_GPL(nvme_fail_nonready_command);
697
__nvme_check_ready(struct nvme_ctrl * ctrl,struct request * rq,bool queue_live)698 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
699 bool queue_live)
700 {
701 struct nvme_request *req = nvme_req(rq);
702
703 /*
704 * currently we have a problem sending passthru commands
705 * on the admin_q if the controller is not LIVE because we can't
706 * make sure that they are going out after the admin connect,
707 * controller enable and/or other commands in the initialization
708 * sequence. until the controller will be LIVE, fail with
709 * BLK_STS_RESOURCE so that they will be rescheduled.
710 */
711 if (rq->q == ctrl->admin_q && (req->flags & NVME_REQ_USERCMD))
712 return false;
713
714 if (ctrl->ops->flags & NVME_F_FABRICS) {
715 /*
716 * Only allow commands on a live queue, except for the connect
717 * command, which is require to set the queue live in the
718 * appropinquate states.
719 */
720 switch (nvme_ctrl_state(ctrl)) {
721 case NVME_CTRL_CONNECTING:
722 if (blk_rq_is_passthrough(rq) && nvme_is_fabrics(req->cmd) &&
723 (req->cmd->fabrics.fctype == nvme_fabrics_type_connect ||
724 req->cmd->fabrics.fctype == nvme_fabrics_type_auth_send ||
725 req->cmd->fabrics.fctype == nvme_fabrics_type_auth_receive))
726 return true;
727 break;
728 default:
729 break;
730 case NVME_CTRL_DEAD:
731 return false;
732 }
733 }
734
735 return queue_live;
736 }
737 EXPORT_SYMBOL_GPL(__nvme_check_ready);
738
nvme_setup_flush(struct nvme_ns * ns,struct nvme_command * cmnd)739 static inline void nvme_setup_flush(struct nvme_ns *ns,
740 struct nvme_command *cmnd)
741 {
742 memset(cmnd, 0, sizeof(*cmnd));
743 cmnd->common.opcode = nvme_cmd_flush;
744 cmnd->common.nsid = cpu_to_le32(ns->head->ns_id);
745 }
746
nvme_setup_discard(struct nvme_ns * ns,struct request * req,struct nvme_command * cmnd)747 static blk_status_t nvme_setup_discard(struct nvme_ns *ns, struct request *req,
748 struct nvme_command *cmnd)
749 {
750 unsigned short segments = blk_rq_nr_discard_segments(req), n = 0;
751 struct nvme_dsm_range *range;
752 struct bio *bio;
753
754 /*
755 * Some devices do not consider the DSM 'Number of Ranges' field when
756 * determining how much data to DMA. Always allocate memory for maximum
757 * number of segments to prevent device reading beyond end of buffer.
758 */
759 static const size_t alloc_size = sizeof(*range) * NVME_DSM_MAX_RANGES;
760
761 range = kzalloc(alloc_size, GFP_ATOMIC | __GFP_NOWARN);
762 if (!range) {
763 /*
764 * If we fail allocation our range, fallback to the controller
765 * discard page. If that's also busy, it's safe to return
766 * busy, as we know we can make progress once that's freed.
767 */
768 if (test_and_set_bit_lock(0, &ns->ctrl->discard_page_busy))
769 return BLK_STS_RESOURCE;
770
771 range = page_address(ns->ctrl->discard_page);
772 }
773
774 if (queue_max_discard_segments(req->q) == 1) {
775 u64 slba = nvme_sect_to_lba(ns, blk_rq_pos(req));
776 u32 nlb = blk_rq_sectors(req) >> (ns->lba_shift - 9);
777
778 range[0].cattr = cpu_to_le32(0);
779 range[0].nlb = cpu_to_le32(nlb);
780 range[0].slba = cpu_to_le64(slba);
781 n = 1;
782 } else {
783 __rq_for_each_bio(bio, req) {
784 u64 slba = nvme_sect_to_lba(ns, bio->bi_iter.bi_sector);
785 u32 nlb = bio->bi_iter.bi_size >> ns->lba_shift;
786
787 if (n < segments) {
788 range[n].cattr = cpu_to_le32(0);
789 range[n].nlb = cpu_to_le32(nlb);
790 range[n].slba = cpu_to_le64(slba);
791 }
792 n++;
793 }
794 }
795
796 if (WARN_ON_ONCE(n != segments)) {
797 if (virt_to_page(range) == ns->ctrl->discard_page)
798 clear_bit_unlock(0, &ns->ctrl->discard_page_busy);
799 else
800 kfree(range);
801 return BLK_STS_IOERR;
802 }
803
804 memset(cmnd, 0, sizeof(*cmnd));
805 cmnd->dsm.opcode = nvme_cmd_dsm;
806 cmnd->dsm.nsid = cpu_to_le32(ns->head->ns_id);
807 cmnd->dsm.nr = cpu_to_le32(segments - 1);
808 cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
809
810 bvec_set_virt(&req->special_vec, range, alloc_size);
811 req->rq_flags |= RQF_SPECIAL_PAYLOAD;
812
813 return BLK_STS_OK;
814 }
815
nvme_set_ref_tag(struct nvme_ns * ns,struct nvme_command * cmnd,struct request * req)816 static void nvme_set_ref_tag(struct nvme_ns *ns, struct nvme_command *cmnd,
817 struct request *req)
818 {
819 u32 upper, lower;
820 u64 ref48;
821
822 /* both rw and write zeroes share the same reftag format */
823 switch (ns->guard_type) {
824 case NVME_NVM_NS_16B_GUARD:
825 cmnd->rw.reftag = cpu_to_le32(t10_pi_ref_tag(req));
826 break;
827 case NVME_NVM_NS_64B_GUARD:
828 ref48 = ext_pi_ref_tag(req);
829 lower = lower_32_bits(ref48);
830 upper = upper_32_bits(ref48);
831
832 cmnd->rw.reftag = cpu_to_le32(lower);
833 cmnd->rw.cdw3 = cpu_to_le32(upper);
834 break;
835 default:
836 break;
837 }
838 }
839
nvme_setup_write_zeroes(struct nvme_ns * ns,struct request * req,struct nvme_command * cmnd)840 static inline blk_status_t nvme_setup_write_zeroes(struct nvme_ns *ns,
841 struct request *req, struct nvme_command *cmnd)
842 {
843 memset(cmnd, 0, sizeof(*cmnd));
844
845 if (ns->ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES)
846 return nvme_setup_discard(ns, req, cmnd);
847
848 cmnd->write_zeroes.opcode = nvme_cmd_write_zeroes;
849 cmnd->write_zeroes.nsid = cpu_to_le32(ns->head->ns_id);
850 cmnd->write_zeroes.slba =
851 cpu_to_le64(nvme_sect_to_lba(ns, blk_rq_pos(req)));
852 cmnd->write_zeroes.length =
853 cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
854
855 if (!(req->cmd_flags & REQ_NOUNMAP) && (ns->features & NVME_NS_DEAC))
856 cmnd->write_zeroes.control |= cpu_to_le16(NVME_WZ_DEAC);
857
858 if (nvme_ns_has_pi(ns)) {
859 cmnd->write_zeroes.control |= cpu_to_le16(NVME_RW_PRINFO_PRACT);
860
861 switch (ns->pi_type) {
862 case NVME_NS_DPS_PI_TYPE1:
863 case NVME_NS_DPS_PI_TYPE2:
864 nvme_set_ref_tag(ns, cmnd, req);
865 break;
866 }
867 }
868
869 return BLK_STS_OK;
870 }
871
nvme_setup_rw(struct nvme_ns * ns,struct request * req,struct nvme_command * cmnd,enum nvme_opcode op)872 static inline blk_status_t nvme_setup_rw(struct nvme_ns *ns,
873 struct request *req, struct nvme_command *cmnd,
874 enum nvme_opcode op)
875 {
876 u16 control = 0;
877 u32 dsmgmt = 0;
878
879 if (req->cmd_flags & REQ_FUA)
880 control |= NVME_RW_FUA;
881 if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
882 control |= NVME_RW_LR;
883
884 if (req->cmd_flags & REQ_RAHEAD)
885 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
886
887 cmnd->rw.opcode = op;
888 cmnd->rw.flags = 0;
889 cmnd->rw.nsid = cpu_to_le32(ns->head->ns_id);
890 cmnd->rw.cdw2 = 0;
891 cmnd->rw.cdw3 = 0;
892 cmnd->rw.metadata = 0;
893 cmnd->rw.slba = cpu_to_le64(nvme_sect_to_lba(ns, blk_rq_pos(req)));
894 cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
895 cmnd->rw.reftag = 0;
896 cmnd->rw.apptag = 0;
897 cmnd->rw.appmask = 0;
898
899 if (ns->ms) {
900 /*
901 * If formated with metadata, the block layer always provides a
902 * metadata buffer if CONFIG_BLK_DEV_INTEGRITY is enabled. Else
903 * we enable the PRACT bit for protection information or set the
904 * namespace capacity to zero to prevent any I/O.
905 */
906 if (!blk_integrity_rq(req)) {
907 if (WARN_ON_ONCE(!nvme_ns_has_pi(ns)))
908 return BLK_STS_NOTSUPP;
909 control |= NVME_RW_PRINFO_PRACT;
910 }
911
912 switch (ns->pi_type) {
913 case NVME_NS_DPS_PI_TYPE3:
914 control |= NVME_RW_PRINFO_PRCHK_GUARD;
915 break;
916 case NVME_NS_DPS_PI_TYPE1:
917 case NVME_NS_DPS_PI_TYPE2:
918 control |= NVME_RW_PRINFO_PRCHK_GUARD |
919 NVME_RW_PRINFO_PRCHK_REF;
920 if (op == nvme_cmd_zone_append)
921 control |= NVME_RW_APPEND_PIREMAP;
922 nvme_set_ref_tag(ns, cmnd, req);
923 break;
924 }
925 }
926
927 cmnd->rw.control = cpu_to_le16(control);
928 cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
929 return 0;
930 }
931
nvme_cleanup_cmd(struct request * req)932 void nvme_cleanup_cmd(struct request *req)
933 {
934 if (req->rq_flags & RQF_SPECIAL_PAYLOAD) {
935 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl;
936
937 if (req->special_vec.bv_page == ctrl->discard_page)
938 clear_bit_unlock(0, &ctrl->discard_page_busy);
939 else
940 kfree(bvec_virt(&req->special_vec));
941 req->rq_flags &= ~RQF_SPECIAL_PAYLOAD;
942 }
943 }
944 EXPORT_SYMBOL_GPL(nvme_cleanup_cmd);
945
nvme_setup_cmd(struct nvme_ns * ns,struct request * req)946 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req)
947 {
948 struct nvme_command *cmd = nvme_req(req)->cmd;
949 blk_status_t ret = BLK_STS_OK;
950
951 if (!(req->rq_flags & RQF_DONTPREP))
952 nvme_clear_nvme_request(req);
953
954 switch (req_op(req)) {
955 case REQ_OP_DRV_IN:
956 case REQ_OP_DRV_OUT:
957 /* these are setup prior to execution in nvme_init_request() */
958 break;
959 case REQ_OP_FLUSH:
960 nvme_setup_flush(ns, cmd);
961 break;
962 case REQ_OP_ZONE_RESET_ALL:
963 case REQ_OP_ZONE_RESET:
964 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_RESET);
965 break;
966 case REQ_OP_ZONE_OPEN:
967 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_OPEN);
968 break;
969 case REQ_OP_ZONE_CLOSE:
970 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_CLOSE);
971 break;
972 case REQ_OP_ZONE_FINISH:
973 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_FINISH);
974 break;
975 case REQ_OP_WRITE_ZEROES:
976 ret = nvme_setup_write_zeroes(ns, req, cmd);
977 break;
978 case REQ_OP_DISCARD:
979 ret = nvme_setup_discard(ns, req, cmd);
980 break;
981 case REQ_OP_READ:
982 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_read);
983 break;
984 case REQ_OP_WRITE:
985 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_write);
986 break;
987 case REQ_OP_ZONE_APPEND:
988 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_zone_append);
989 break;
990 default:
991 WARN_ON_ONCE(1);
992 return BLK_STS_IOERR;
993 }
994
995 cmd->common.command_id = nvme_cid(req);
996 trace_nvme_setup_cmd(req, cmd);
997 return ret;
998 }
999 EXPORT_SYMBOL_GPL(nvme_setup_cmd);
1000
1001 /*
1002 * Return values:
1003 * 0: success
1004 * >0: nvme controller's cqe status response
1005 * <0: kernel error in lieu of controller response
1006 */
nvme_execute_rq(struct request * rq,bool at_head)1007 int nvme_execute_rq(struct request *rq, bool at_head)
1008 {
1009 blk_status_t status;
1010
1011 status = blk_execute_rq(rq, at_head);
1012 if (nvme_req(rq)->flags & NVME_REQ_CANCELLED)
1013 return -EINTR;
1014 if (nvme_req(rq)->status)
1015 return nvme_req(rq)->status;
1016 return blk_status_to_errno(status);
1017 }
1018 EXPORT_SYMBOL_NS_GPL(nvme_execute_rq, NVME_TARGET_PASSTHRU);
1019
1020 /*
1021 * Returns 0 on success. If the result is negative, it's a Linux error code;
1022 * if the result is positive, it's an NVM Express status code
1023 */
__nvme_submit_sync_cmd(struct request_queue * q,struct nvme_command * cmd,union nvme_result * result,void * buffer,unsigned bufflen,int qid,int at_head,blk_mq_req_flags_t flags)1024 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1025 union nvme_result *result, void *buffer, unsigned bufflen,
1026 int qid, int at_head, blk_mq_req_flags_t flags)
1027 {
1028 struct request *req;
1029 int ret;
1030
1031 if (qid == NVME_QID_ANY)
1032 req = blk_mq_alloc_request(q, nvme_req_op(cmd), flags);
1033 else
1034 req = blk_mq_alloc_request_hctx(q, nvme_req_op(cmd), flags,
1035 qid - 1);
1036
1037 if (IS_ERR(req))
1038 return PTR_ERR(req);
1039 nvme_init_request(req, cmd);
1040
1041 if (buffer && bufflen) {
1042 ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL);
1043 if (ret)
1044 goto out;
1045 }
1046
1047 ret = nvme_execute_rq(req, at_head);
1048 if (result && ret >= 0)
1049 *result = nvme_req(req)->result;
1050 out:
1051 blk_mq_free_request(req);
1052 return ret;
1053 }
1054 EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd);
1055
nvme_submit_sync_cmd(struct request_queue * q,struct nvme_command * cmd,void * buffer,unsigned bufflen)1056 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1057 void *buffer, unsigned bufflen)
1058 {
1059 return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen,
1060 NVME_QID_ANY, 0, 0);
1061 }
1062 EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd);
1063
nvme_command_effects(struct nvme_ctrl * ctrl,struct nvme_ns * ns,u8 opcode)1064 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode)
1065 {
1066 u32 effects = 0;
1067
1068 if (ns) {
1069 effects = le32_to_cpu(ns->head->effects->iocs[opcode]);
1070 if (effects & ~(NVME_CMD_EFFECTS_CSUPP | NVME_CMD_EFFECTS_LBCC))
1071 dev_warn_once(ctrl->device,
1072 "IO command:%02x has unusual effects:%08x\n",
1073 opcode, effects);
1074
1075 /*
1076 * NVME_CMD_EFFECTS_CSE_MASK causes a freeze all I/O queues,
1077 * which would deadlock when done on an I/O command. Note that
1078 * We already warn about an unusual effect above.
1079 */
1080 effects &= ~NVME_CMD_EFFECTS_CSE_MASK;
1081 } else {
1082 effects = le32_to_cpu(ctrl->effects->acs[opcode]);
1083 }
1084
1085 return effects;
1086 }
1087 EXPORT_SYMBOL_NS_GPL(nvme_command_effects, NVME_TARGET_PASSTHRU);
1088
nvme_passthru_start(struct nvme_ctrl * ctrl,struct nvme_ns * ns,u8 opcode)1089 u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode)
1090 {
1091 u32 effects = nvme_command_effects(ctrl, ns, opcode);
1092
1093 /*
1094 * For simplicity, IO to all namespaces is quiesced even if the command
1095 * effects say only one namespace is affected.
1096 */
1097 if (effects & NVME_CMD_EFFECTS_CSE_MASK) {
1098 mutex_lock(&ctrl->scan_lock);
1099 mutex_lock(&ctrl->subsys->lock);
1100 nvme_mpath_start_freeze(ctrl->subsys);
1101 nvme_mpath_wait_freeze(ctrl->subsys);
1102 nvme_start_freeze(ctrl);
1103 nvme_wait_freeze(ctrl);
1104 }
1105 return effects;
1106 }
1107 EXPORT_SYMBOL_NS_GPL(nvme_passthru_start, NVME_TARGET_PASSTHRU);
1108
nvme_passthru_end(struct nvme_ctrl * ctrl,struct nvme_ns * ns,u32 effects,struct nvme_command * cmd,int status)1109 void nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects,
1110 struct nvme_command *cmd, int status)
1111 {
1112 if (effects & NVME_CMD_EFFECTS_CSE_MASK) {
1113 nvme_unfreeze(ctrl);
1114 nvme_mpath_unfreeze(ctrl->subsys);
1115 mutex_unlock(&ctrl->subsys->lock);
1116 mutex_unlock(&ctrl->scan_lock);
1117 }
1118 if (effects & NVME_CMD_EFFECTS_CCC) {
1119 if (!test_and_set_bit(NVME_CTRL_DIRTY_CAPABILITY,
1120 &ctrl->flags)) {
1121 dev_info(ctrl->device,
1122 "controller capabilities changed, reset may be required to take effect.\n");
1123 }
1124 }
1125 if (effects & (NVME_CMD_EFFECTS_NIC | NVME_CMD_EFFECTS_NCC)) {
1126 nvme_queue_scan(ctrl);
1127 flush_work(&ctrl->scan_work);
1128 }
1129 if (ns)
1130 return;
1131
1132 switch (cmd->common.opcode) {
1133 case nvme_admin_set_features:
1134 switch (le32_to_cpu(cmd->common.cdw10) & 0xFF) {
1135 case NVME_FEAT_KATO:
1136 /*
1137 * Keep alive commands interval on the host should be
1138 * updated when KATO is modified by Set Features
1139 * commands.
1140 */
1141 if (!status)
1142 nvme_update_keep_alive(ctrl, cmd);
1143 break;
1144 default:
1145 break;
1146 }
1147 break;
1148 default:
1149 break;
1150 }
1151 }
1152 EXPORT_SYMBOL_NS_GPL(nvme_passthru_end, NVME_TARGET_PASSTHRU);
1153
1154 /*
1155 * Recommended frequency for KATO commands per NVMe 1.4 section 7.12.1:
1156 *
1157 * The host should send Keep Alive commands at half of the Keep Alive Timeout
1158 * accounting for transport roundtrip times [..].
1159 */
nvme_keep_alive_work_period(struct nvme_ctrl * ctrl)1160 static unsigned long nvme_keep_alive_work_period(struct nvme_ctrl *ctrl)
1161 {
1162 unsigned long delay = ctrl->kato * HZ / 2;
1163
1164 /*
1165 * When using Traffic Based Keep Alive, we need to run
1166 * nvme_keep_alive_work at twice the normal frequency, as one
1167 * command completion can postpone sending a keep alive command
1168 * by up to twice the delay between runs.
1169 */
1170 if (ctrl->ctratt & NVME_CTRL_ATTR_TBKAS)
1171 delay /= 2;
1172 return delay;
1173 }
1174
nvme_queue_keep_alive_work(struct nvme_ctrl * ctrl)1175 static void nvme_queue_keep_alive_work(struct nvme_ctrl *ctrl)
1176 {
1177 queue_delayed_work(nvme_wq, &ctrl->ka_work,
1178 nvme_keep_alive_work_period(ctrl));
1179 }
1180
nvme_keep_alive_end_io(struct request * rq,blk_status_t status)1181 static enum rq_end_io_ret nvme_keep_alive_end_io(struct request *rq,
1182 blk_status_t status)
1183 {
1184 struct nvme_ctrl *ctrl = rq->end_io_data;
1185 unsigned long rtt = jiffies - (rq->deadline - rq->timeout);
1186 unsigned long delay = nvme_keep_alive_work_period(ctrl);
1187 enum nvme_ctrl_state state = nvme_ctrl_state(ctrl);
1188
1189 /*
1190 * Subtract off the keepalive RTT so nvme_keep_alive_work runs
1191 * at the desired frequency.
1192 */
1193 if (rtt <= delay) {
1194 delay -= rtt;
1195 } else {
1196 dev_warn(ctrl->device, "long keepalive RTT (%u ms)\n",
1197 jiffies_to_msecs(rtt));
1198 delay = 0;
1199 }
1200
1201 blk_mq_free_request(rq);
1202
1203 if (status) {
1204 dev_err(ctrl->device,
1205 "failed nvme_keep_alive_end_io error=%d\n",
1206 status);
1207 return RQ_END_IO_NONE;
1208 }
1209
1210 ctrl->ka_last_check_time = jiffies;
1211 ctrl->comp_seen = false;
1212 if (state == NVME_CTRL_LIVE || state == NVME_CTRL_CONNECTING)
1213 queue_delayed_work(nvme_wq, &ctrl->ka_work, delay);
1214 return RQ_END_IO_NONE;
1215 }
1216
nvme_keep_alive_work(struct work_struct * work)1217 static void nvme_keep_alive_work(struct work_struct *work)
1218 {
1219 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work),
1220 struct nvme_ctrl, ka_work);
1221 bool comp_seen = ctrl->comp_seen;
1222 struct request *rq;
1223
1224 ctrl->ka_last_check_time = jiffies;
1225
1226 if ((ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) && comp_seen) {
1227 dev_dbg(ctrl->device,
1228 "reschedule traffic based keep-alive timer\n");
1229 ctrl->comp_seen = false;
1230 nvme_queue_keep_alive_work(ctrl);
1231 return;
1232 }
1233
1234 rq = blk_mq_alloc_request(ctrl->admin_q, nvme_req_op(&ctrl->ka_cmd),
1235 BLK_MQ_REQ_RESERVED | BLK_MQ_REQ_NOWAIT);
1236 if (IS_ERR(rq)) {
1237 /* allocation failure, reset the controller */
1238 dev_err(ctrl->device, "keep-alive failed: %ld\n", PTR_ERR(rq));
1239 nvme_reset_ctrl(ctrl);
1240 return;
1241 }
1242 nvme_init_request(rq, &ctrl->ka_cmd);
1243
1244 rq->timeout = ctrl->kato * HZ;
1245 rq->end_io = nvme_keep_alive_end_io;
1246 rq->end_io_data = ctrl;
1247 blk_execute_rq_nowait(rq, false);
1248 }
1249
nvme_start_keep_alive(struct nvme_ctrl * ctrl)1250 static void nvme_start_keep_alive(struct nvme_ctrl *ctrl)
1251 {
1252 if (unlikely(ctrl->kato == 0))
1253 return;
1254
1255 nvme_queue_keep_alive_work(ctrl);
1256 }
1257
nvme_stop_keep_alive(struct nvme_ctrl * ctrl)1258 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl)
1259 {
1260 if (unlikely(ctrl->kato == 0))
1261 return;
1262
1263 cancel_delayed_work_sync(&ctrl->ka_work);
1264 }
1265 EXPORT_SYMBOL_GPL(nvme_stop_keep_alive);
1266
nvme_update_keep_alive(struct nvme_ctrl * ctrl,struct nvme_command * cmd)1267 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl,
1268 struct nvme_command *cmd)
1269 {
1270 unsigned int new_kato =
1271 DIV_ROUND_UP(le32_to_cpu(cmd->common.cdw11), 1000);
1272
1273 dev_info(ctrl->device,
1274 "keep alive interval updated from %u ms to %u ms\n",
1275 ctrl->kato * 1000 / 2, new_kato * 1000 / 2);
1276
1277 nvme_stop_keep_alive(ctrl);
1278 ctrl->kato = new_kato;
1279 nvme_start_keep_alive(ctrl);
1280 }
1281
1282 /*
1283 * In NVMe 1.0 the CNS field was just a binary controller or namespace
1284 * flag, thus sending any new CNS opcodes has a big chance of not working.
1285 * Qemu unfortunately had that bug after reporting a 1.1 version compliance
1286 * (but not for any later version).
1287 */
nvme_ctrl_limited_cns(struct nvme_ctrl * ctrl)1288 static bool nvme_ctrl_limited_cns(struct nvme_ctrl *ctrl)
1289 {
1290 if (ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS)
1291 return ctrl->vs < NVME_VS(1, 2, 0);
1292 return ctrl->vs < NVME_VS(1, 1, 0);
1293 }
1294
nvme_identify_ctrl(struct nvme_ctrl * dev,struct nvme_id_ctrl ** id)1295 static int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id)
1296 {
1297 struct nvme_command c = { };
1298 int error;
1299
1300 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1301 c.identify.opcode = nvme_admin_identify;
1302 c.identify.cns = NVME_ID_CNS_CTRL;
1303
1304 *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
1305 if (!*id)
1306 return -ENOMEM;
1307
1308 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1309 sizeof(struct nvme_id_ctrl));
1310 if (error) {
1311 kfree(*id);
1312 *id = NULL;
1313 }
1314 return error;
1315 }
1316
nvme_process_ns_desc(struct nvme_ctrl * ctrl,struct nvme_ns_ids * ids,struct nvme_ns_id_desc * cur,bool * csi_seen)1317 static int nvme_process_ns_desc(struct nvme_ctrl *ctrl, struct nvme_ns_ids *ids,
1318 struct nvme_ns_id_desc *cur, bool *csi_seen)
1319 {
1320 const char *warn_str = "ctrl returned bogus length:";
1321 void *data = cur;
1322
1323 switch (cur->nidt) {
1324 case NVME_NIDT_EUI64:
1325 if (cur->nidl != NVME_NIDT_EUI64_LEN) {
1326 dev_warn(ctrl->device, "%s %d for NVME_NIDT_EUI64\n",
1327 warn_str, cur->nidl);
1328 return -1;
1329 }
1330 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID)
1331 return NVME_NIDT_EUI64_LEN;
1332 memcpy(ids->eui64, data + sizeof(*cur), NVME_NIDT_EUI64_LEN);
1333 return NVME_NIDT_EUI64_LEN;
1334 case NVME_NIDT_NGUID:
1335 if (cur->nidl != NVME_NIDT_NGUID_LEN) {
1336 dev_warn(ctrl->device, "%s %d for NVME_NIDT_NGUID\n",
1337 warn_str, cur->nidl);
1338 return -1;
1339 }
1340 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID)
1341 return NVME_NIDT_NGUID_LEN;
1342 memcpy(ids->nguid, data + sizeof(*cur), NVME_NIDT_NGUID_LEN);
1343 return NVME_NIDT_NGUID_LEN;
1344 case NVME_NIDT_UUID:
1345 if (cur->nidl != NVME_NIDT_UUID_LEN) {
1346 dev_warn(ctrl->device, "%s %d for NVME_NIDT_UUID\n",
1347 warn_str, cur->nidl);
1348 return -1;
1349 }
1350 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID)
1351 return NVME_NIDT_UUID_LEN;
1352 uuid_copy(&ids->uuid, data + sizeof(*cur));
1353 return NVME_NIDT_UUID_LEN;
1354 case NVME_NIDT_CSI:
1355 if (cur->nidl != NVME_NIDT_CSI_LEN) {
1356 dev_warn(ctrl->device, "%s %d for NVME_NIDT_CSI\n",
1357 warn_str, cur->nidl);
1358 return -1;
1359 }
1360 memcpy(&ids->csi, data + sizeof(*cur), NVME_NIDT_CSI_LEN);
1361 *csi_seen = true;
1362 return NVME_NIDT_CSI_LEN;
1363 default:
1364 /* Skip unknown types */
1365 return cur->nidl;
1366 }
1367 }
1368
nvme_identify_ns_descs(struct nvme_ctrl * ctrl,struct nvme_ns_info * info)1369 static int nvme_identify_ns_descs(struct nvme_ctrl *ctrl,
1370 struct nvme_ns_info *info)
1371 {
1372 struct nvme_command c = { };
1373 bool csi_seen = false;
1374 int status, pos, len;
1375 void *data;
1376
1377 if (ctrl->vs < NVME_VS(1, 3, 0) && !nvme_multi_css(ctrl))
1378 return 0;
1379 if (ctrl->quirks & NVME_QUIRK_NO_NS_DESC_LIST)
1380 return 0;
1381
1382 c.identify.opcode = nvme_admin_identify;
1383 c.identify.nsid = cpu_to_le32(info->nsid);
1384 c.identify.cns = NVME_ID_CNS_NS_DESC_LIST;
1385
1386 data = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL);
1387 if (!data)
1388 return -ENOMEM;
1389
1390 status = nvme_submit_sync_cmd(ctrl->admin_q, &c, data,
1391 NVME_IDENTIFY_DATA_SIZE);
1392 if (status) {
1393 dev_warn(ctrl->device,
1394 "Identify Descriptors failed (nsid=%u, status=0x%x)\n",
1395 info->nsid, status);
1396 goto free_data;
1397 }
1398
1399 for (pos = 0; pos < NVME_IDENTIFY_DATA_SIZE; pos += len) {
1400 struct nvme_ns_id_desc *cur = data + pos;
1401
1402 if (cur->nidl == 0)
1403 break;
1404
1405 len = nvme_process_ns_desc(ctrl, &info->ids, cur, &csi_seen);
1406 if (len < 0)
1407 break;
1408
1409 len += sizeof(*cur);
1410 }
1411
1412 if (nvme_multi_css(ctrl) && !csi_seen) {
1413 dev_warn(ctrl->device, "Command set not reported for nsid:%d\n",
1414 info->nsid);
1415 status = -EINVAL;
1416 }
1417
1418 free_data:
1419 kfree(data);
1420 return status;
1421 }
1422
nvme_identify_ns(struct nvme_ctrl * ctrl,unsigned nsid,struct nvme_id_ns ** id)1423 static int nvme_identify_ns(struct nvme_ctrl *ctrl, unsigned nsid,
1424 struct nvme_id_ns **id)
1425 {
1426 struct nvme_command c = { };
1427 int error;
1428
1429 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1430 c.identify.opcode = nvme_admin_identify;
1431 c.identify.nsid = cpu_to_le32(nsid);
1432 c.identify.cns = NVME_ID_CNS_NS;
1433
1434 *id = kmalloc(sizeof(**id), GFP_KERNEL);
1435 if (!*id)
1436 return -ENOMEM;
1437
1438 error = nvme_submit_sync_cmd(ctrl->admin_q, &c, *id, sizeof(**id));
1439 if (error) {
1440 dev_warn(ctrl->device, "Identify namespace failed (%d)\n", error);
1441 kfree(*id);
1442 *id = NULL;
1443 }
1444 return error;
1445 }
1446
nvme_ns_info_from_identify(struct nvme_ctrl * ctrl,struct nvme_ns_info * info)1447 static int nvme_ns_info_from_identify(struct nvme_ctrl *ctrl,
1448 struct nvme_ns_info *info)
1449 {
1450 struct nvme_ns_ids *ids = &info->ids;
1451 struct nvme_id_ns *id;
1452 int ret;
1453
1454 ret = nvme_identify_ns(ctrl, info->nsid, &id);
1455 if (ret)
1456 return ret;
1457
1458 if (id->ncap == 0) {
1459 /* namespace not allocated or attached */
1460 info->is_removed = true;
1461 ret = -ENODEV;
1462 goto error;
1463 }
1464
1465 info->anagrpid = id->anagrpid;
1466 info->is_shared = id->nmic & NVME_NS_NMIC_SHARED;
1467 info->is_readonly = id->nsattr & NVME_NS_ATTR_RO;
1468 info->is_ready = true;
1469 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) {
1470 dev_info(ctrl->device,
1471 "Ignoring bogus Namespace Identifiers\n");
1472 } else {
1473 if (ctrl->vs >= NVME_VS(1, 1, 0) &&
1474 !memchr_inv(ids->eui64, 0, sizeof(ids->eui64)))
1475 memcpy(ids->eui64, id->eui64, sizeof(ids->eui64));
1476 if (ctrl->vs >= NVME_VS(1, 2, 0) &&
1477 !memchr_inv(ids->nguid, 0, sizeof(ids->nguid)))
1478 memcpy(ids->nguid, id->nguid, sizeof(ids->nguid));
1479 }
1480
1481 error:
1482 kfree(id);
1483 return ret;
1484 }
1485
nvme_ns_info_from_id_cs_indep(struct nvme_ctrl * ctrl,struct nvme_ns_info * info)1486 static int nvme_ns_info_from_id_cs_indep(struct nvme_ctrl *ctrl,
1487 struct nvme_ns_info *info)
1488 {
1489 struct nvme_id_ns_cs_indep *id;
1490 struct nvme_command c = {
1491 .identify.opcode = nvme_admin_identify,
1492 .identify.nsid = cpu_to_le32(info->nsid),
1493 .identify.cns = NVME_ID_CNS_NS_CS_INDEP,
1494 };
1495 int ret;
1496
1497 id = kmalloc(sizeof(*id), GFP_KERNEL);
1498 if (!id)
1499 return -ENOMEM;
1500
1501 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id));
1502 if (!ret) {
1503 info->anagrpid = id->anagrpid;
1504 info->is_shared = id->nmic & NVME_NS_NMIC_SHARED;
1505 info->is_readonly = id->nsattr & NVME_NS_ATTR_RO;
1506 info->is_ready = id->nstat & NVME_NSTAT_NRDY;
1507 }
1508 kfree(id);
1509 return ret;
1510 }
1511
nvme_features(struct nvme_ctrl * dev,u8 op,unsigned int fid,unsigned int dword11,void * buffer,size_t buflen,u32 * result)1512 static int nvme_features(struct nvme_ctrl *dev, u8 op, unsigned int fid,
1513 unsigned int dword11, void *buffer, size_t buflen, u32 *result)
1514 {
1515 union nvme_result res = { 0 };
1516 struct nvme_command c = { };
1517 int ret;
1518
1519 c.features.opcode = op;
1520 c.features.fid = cpu_to_le32(fid);
1521 c.features.dword11 = cpu_to_le32(dword11);
1522
1523 ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res,
1524 buffer, buflen, NVME_QID_ANY, 0, 0);
1525 if (ret >= 0 && result)
1526 *result = le32_to_cpu(res.u32);
1527 return ret;
1528 }
1529
nvme_set_features(struct nvme_ctrl * dev,unsigned int fid,unsigned int dword11,void * buffer,size_t buflen,u32 * result)1530 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid,
1531 unsigned int dword11, void *buffer, size_t buflen,
1532 u32 *result)
1533 {
1534 return nvme_features(dev, nvme_admin_set_features, fid, dword11, buffer,
1535 buflen, result);
1536 }
1537 EXPORT_SYMBOL_GPL(nvme_set_features);
1538
nvme_get_features(struct nvme_ctrl * dev,unsigned int fid,unsigned int dword11,void * buffer,size_t buflen,u32 * result)1539 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid,
1540 unsigned int dword11, void *buffer, size_t buflen,
1541 u32 *result)
1542 {
1543 return nvme_features(dev, nvme_admin_get_features, fid, dword11, buffer,
1544 buflen, result);
1545 }
1546 EXPORT_SYMBOL_GPL(nvme_get_features);
1547
nvme_set_queue_count(struct nvme_ctrl * ctrl,int * count)1548 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count)
1549 {
1550 u32 q_count = (*count - 1) | ((*count - 1) << 16);
1551 u32 result;
1552 int status, nr_io_queues;
1553
1554 status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, NULL, 0,
1555 &result);
1556
1557 /*
1558 * It's either a kernel error or the host observed a connection
1559 * lost. In either case it's not possible communicate with the
1560 * controller and thus enter the error code path.
1561 */
1562 if (status < 0 || status == NVME_SC_HOST_PATH_ERROR)
1563 return status;
1564
1565 /*
1566 * Degraded controllers might return an error when setting the queue
1567 * count. We still want to be able to bring them online and offer
1568 * access to the admin queue, as that might be only way to fix them up.
1569 */
1570 if (status > 0) {
1571 dev_err(ctrl->device, "Could not set queue count (%d)\n", status);
1572 *count = 0;
1573 } else {
1574 nr_io_queues = min(result & 0xffff, result >> 16) + 1;
1575 *count = min(*count, nr_io_queues);
1576 }
1577
1578 return 0;
1579 }
1580 EXPORT_SYMBOL_GPL(nvme_set_queue_count);
1581
1582 #define NVME_AEN_SUPPORTED \
1583 (NVME_AEN_CFG_NS_ATTR | NVME_AEN_CFG_FW_ACT | \
1584 NVME_AEN_CFG_ANA_CHANGE | NVME_AEN_CFG_DISC_CHANGE)
1585
nvme_enable_aen(struct nvme_ctrl * ctrl)1586 static void nvme_enable_aen(struct nvme_ctrl *ctrl)
1587 {
1588 u32 result, supported_aens = ctrl->oaes & NVME_AEN_SUPPORTED;
1589 int status;
1590
1591 if (!supported_aens)
1592 return;
1593
1594 status = nvme_set_features(ctrl, NVME_FEAT_ASYNC_EVENT, supported_aens,
1595 NULL, 0, &result);
1596 if (status)
1597 dev_warn(ctrl->device, "Failed to configure AEN (cfg %x)\n",
1598 supported_aens);
1599
1600 queue_work(nvme_wq, &ctrl->async_event_work);
1601 }
1602
nvme_ns_open(struct nvme_ns * ns)1603 static int nvme_ns_open(struct nvme_ns *ns)
1604 {
1605
1606 /* should never be called due to GENHD_FL_HIDDEN */
1607 if (WARN_ON_ONCE(nvme_ns_head_multipath(ns->head)))
1608 goto fail;
1609 if (!nvme_get_ns(ns))
1610 goto fail;
1611 if (!try_module_get(ns->ctrl->ops->module))
1612 goto fail_put_ns;
1613
1614 return 0;
1615
1616 fail_put_ns:
1617 nvme_put_ns(ns);
1618 fail:
1619 return -ENXIO;
1620 }
1621
nvme_ns_release(struct nvme_ns * ns)1622 static void nvme_ns_release(struct nvme_ns *ns)
1623 {
1624
1625 module_put(ns->ctrl->ops->module);
1626 nvme_put_ns(ns);
1627 }
1628
nvme_open(struct gendisk * disk,blk_mode_t mode)1629 static int nvme_open(struct gendisk *disk, blk_mode_t mode)
1630 {
1631 return nvme_ns_open(disk->private_data);
1632 }
1633
nvme_release(struct gendisk * disk)1634 static void nvme_release(struct gendisk *disk)
1635 {
1636 nvme_ns_release(disk->private_data);
1637 }
1638
nvme_getgeo(struct block_device * bdev,struct hd_geometry * geo)1639 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1640 {
1641 /* some standard values */
1642 geo->heads = 1 << 6;
1643 geo->sectors = 1 << 5;
1644 geo->cylinders = get_capacity(bdev->bd_disk) >> 11;
1645 return 0;
1646 }
1647
1648 #ifdef CONFIG_BLK_DEV_INTEGRITY
nvme_init_integrity(struct gendisk * disk,struct nvme_ns * ns,u32 max_integrity_segments)1649 static void nvme_init_integrity(struct gendisk *disk, struct nvme_ns *ns,
1650 u32 max_integrity_segments)
1651 {
1652 struct blk_integrity integrity = { };
1653
1654 switch (ns->pi_type) {
1655 case NVME_NS_DPS_PI_TYPE3:
1656 switch (ns->guard_type) {
1657 case NVME_NVM_NS_16B_GUARD:
1658 integrity.profile = &t10_pi_type3_crc;
1659 integrity.tag_size = sizeof(u16) + sizeof(u32);
1660 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1661 break;
1662 case NVME_NVM_NS_64B_GUARD:
1663 integrity.profile = &ext_pi_type3_crc64;
1664 integrity.tag_size = sizeof(u16) + 6;
1665 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1666 break;
1667 default:
1668 integrity.profile = NULL;
1669 break;
1670 }
1671 break;
1672 case NVME_NS_DPS_PI_TYPE1:
1673 case NVME_NS_DPS_PI_TYPE2:
1674 switch (ns->guard_type) {
1675 case NVME_NVM_NS_16B_GUARD:
1676 integrity.profile = &t10_pi_type1_crc;
1677 integrity.tag_size = sizeof(u16);
1678 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1679 break;
1680 case NVME_NVM_NS_64B_GUARD:
1681 integrity.profile = &ext_pi_type1_crc64;
1682 integrity.tag_size = sizeof(u16);
1683 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1684 break;
1685 default:
1686 integrity.profile = NULL;
1687 break;
1688 }
1689 break;
1690 default:
1691 integrity.profile = NULL;
1692 break;
1693 }
1694
1695 integrity.tuple_size = ns->ms;
1696 blk_integrity_register(disk, &integrity);
1697 blk_queue_max_integrity_segments(disk->queue, max_integrity_segments);
1698 }
1699 #else
nvme_init_integrity(struct gendisk * disk,struct nvme_ns * ns,u32 max_integrity_segments)1700 static void nvme_init_integrity(struct gendisk *disk, struct nvme_ns *ns,
1701 u32 max_integrity_segments)
1702 {
1703 }
1704 #endif /* CONFIG_BLK_DEV_INTEGRITY */
1705
nvme_config_discard(struct gendisk * disk,struct nvme_ns * ns)1706 static void nvme_config_discard(struct gendisk *disk, struct nvme_ns *ns)
1707 {
1708 struct nvme_ctrl *ctrl = ns->ctrl;
1709 struct request_queue *queue = disk->queue;
1710 u32 size = queue_logical_block_size(queue);
1711
1712 if (ctrl->dmrsl && ctrl->dmrsl <= nvme_sect_to_lba(ns, UINT_MAX))
1713 ctrl->max_discard_sectors = nvme_lba_to_sect(ns, ctrl->dmrsl);
1714
1715 if (ctrl->max_discard_sectors == 0) {
1716 blk_queue_max_discard_sectors(queue, 0);
1717 return;
1718 }
1719
1720 BUILD_BUG_ON(PAGE_SIZE / sizeof(struct nvme_dsm_range) <
1721 NVME_DSM_MAX_RANGES);
1722
1723 queue->limits.discard_granularity = size;
1724
1725 /* If discard is already enabled, don't reset queue limits */
1726 if (queue->limits.max_discard_sectors)
1727 return;
1728
1729 blk_queue_max_discard_sectors(queue, ctrl->max_discard_sectors);
1730 blk_queue_max_discard_segments(queue, ctrl->max_discard_segments);
1731
1732 if (ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES)
1733 blk_queue_max_write_zeroes_sectors(queue, UINT_MAX);
1734 }
1735
nvme_ns_ids_equal(struct nvme_ns_ids * a,struct nvme_ns_ids * b)1736 static bool nvme_ns_ids_equal(struct nvme_ns_ids *a, struct nvme_ns_ids *b)
1737 {
1738 return uuid_equal(&a->uuid, &b->uuid) &&
1739 memcmp(&a->nguid, &b->nguid, sizeof(a->nguid)) == 0 &&
1740 memcmp(&a->eui64, &b->eui64, sizeof(a->eui64)) == 0 &&
1741 a->csi == b->csi;
1742 }
1743
nvme_init_ms(struct nvme_ns * ns,struct nvme_id_ns * id)1744 static int nvme_init_ms(struct nvme_ns *ns, struct nvme_id_ns *id)
1745 {
1746 bool first = id->dps & NVME_NS_DPS_PI_FIRST;
1747 unsigned lbaf = nvme_lbaf_index(id->flbas);
1748 struct nvme_ctrl *ctrl = ns->ctrl;
1749 struct nvme_command c = { };
1750 struct nvme_id_ns_nvm *nvm;
1751 int ret = 0;
1752 u32 elbaf;
1753
1754 ns->pi_size = 0;
1755 ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
1756 if (!(ctrl->ctratt & NVME_CTRL_ATTR_ELBAS)) {
1757 ns->pi_size = sizeof(struct t10_pi_tuple);
1758 ns->guard_type = NVME_NVM_NS_16B_GUARD;
1759 goto set_pi;
1760 }
1761
1762 nvm = kzalloc(sizeof(*nvm), GFP_KERNEL);
1763 if (!nvm)
1764 return -ENOMEM;
1765
1766 c.identify.opcode = nvme_admin_identify;
1767 c.identify.nsid = cpu_to_le32(ns->head->ns_id);
1768 c.identify.cns = NVME_ID_CNS_CS_NS;
1769 c.identify.csi = NVME_CSI_NVM;
1770
1771 ret = nvme_submit_sync_cmd(ns->ctrl->admin_q, &c, nvm, sizeof(*nvm));
1772 if (ret)
1773 goto free_data;
1774
1775 elbaf = le32_to_cpu(nvm->elbaf[lbaf]);
1776
1777 /* no support for storage tag formats right now */
1778 if (nvme_elbaf_sts(elbaf))
1779 goto free_data;
1780
1781 ns->guard_type = nvme_elbaf_guard_type(elbaf);
1782 switch (ns->guard_type) {
1783 case NVME_NVM_NS_64B_GUARD:
1784 ns->pi_size = sizeof(struct crc64_pi_tuple);
1785 break;
1786 case NVME_NVM_NS_16B_GUARD:
1787 ns->pi_size = sizeof(struct t10_pi_tuple);
1788 break;
1789 default:
1790 break;
1791 }
1792
1793 free_data:
1794 kfree(nvm);
1795 set_pi:
1796 if (ns->pi_size && (first || ns->ms == ns->pi_size))
1797 ns->pi_type = id->dps & NVME_NS_DPS_PI_MASK;
1798 else
1799 ns->pi_type = 0;
1800
1801 return ret;
1802 }
1803
nvme_configure_metadata(struct nvme_ns * ns,struct nvme_id_ns * id)1804 static int nvme_configure_metadata(struct nvme_ns *ns, struct nvme_id_ns *id)
1805 {
1806 struct nvme_ctrl *ctrl = ns->ctrl;
1807 int ret;
1808
1809 ret = nvme_init_ms(ns, id);
1810 if (ret)
1811 return ret;
1812
1813 ns->features &= ~(NVME_NS_METADATA_SUPPORTED | NVME_NS_EXT_LBAS);
1814 if (!ns->ms || !(ctrl->ops->flags & NVME_F_METADATA_SUPPORTED))
1815 return 0;
1816
1817 if (ctrl->ops->flags & NVME_F_FABRICS) {
1818 /*
1819 * The NVMe over Fabrics specification only supports metadata as
1820 * part of the extended data LBA. We rely on HCA/HBA support to
1821 * remap the separate metadata buffer from the block layer.
1822 */
1823 if (WARN_ON_ONCE(!(id->flbas & NVME_NS_FLBAS_META_EXT)))
1824 return 0;
1825
1826 ns->features |= NVME_NS_EXT_LBAS;
1827
1828 /*
1829 * The current fabrics transport drivers support namespace
1830 * metadata formats only if nvme_ns_has_pi() returns true.
1831 * Suppress support for all other formats so the namespace will
1832 * have a 0 capacity and not be usable through the block stack.
1833 *
1834 * Note, this check will need to be modified if any drivers
1835 * gain the ability to use other metadata formats.
1836 */
1837 if (ctrl->max_integrity_segments && nvme_ns_has_pi(ns))
1838 ns->features |= NVME_NS_METADATA_SUPPORTED;
1839 } else {
1840 /*
1841 * For PCIe controllers, we can't easily remap the separate
1842 * metadata buffer from the block layer and thus require a
1843 * separate metadata buffer for block layer metadata/PI support.
1844 * We allow extended LBAs for the passthrough interface, though.
1845 */
1846 if (id->flbas & NVME_NS_FLBAS_META_EXT)
1847 ns->features |= NVME_NS_EXT_LBAS;
1848 else
1849 ns->features |= NVME_NS_METADATA_SUPPORTED;
1850 }
1851 return 0;
1852 }
1853
nvme_set_queue_limits(struct nvme_ctrl * ctrl,struct request_queue * q)1854 static void nvme_set_queue_limits(struct nvme_ctrl *ctrl,
1855 struct request_queue *q)
1856 {
1857 bool vwc = ctrl->vwc & NVME_CTRL_VWC_PRESENT;
1858
1859 if (ctrl->max_hw_sectors) {
1860 u32 max_segments =
1861 (ctrl->max_hw_sectors / (NVME_CTRL_PAGE_SIZE >> 9)) + 1;
1862
1863 max_segments = min_not_zero(max_segments, ctrl->max_segments);
1864 blk_queue_max_hw_sectors(q, ctrl->max_hw_sectors);
1865 blk_queue_max_segments(q, min_t(u32, max_segments, USHRT_MAX));
1866 }
1867 blk_queue_virt_boundary(q, NVME_CTRL_PAGE_SIZE - 1);
1868 blk_queue_dma_alignment(q, 3);
1869 blk_queue_write_cache(q, vwc, vwc);
1870 }
1871
nvme_update_disk_info(struct gendisk * disk,struct nvme_ns * ns,struct nvme_id_ns * id)1872 static void nvme_update_disk_info(struct gendisk *disk,
1873 struct nvme_ns *ns, struct nvme_id_ns *id)
1874 {
1875 sector_t capacity = nvme_lba_to_sect(ns, le64_to_cpu(id->nsze));
1876 u32 bs = 1U << ns->lba_shift;
1877 u32 atomic_bs, phys_bs, io_opt = 0;
1878
1879 /*
1880 * The block layer can't support LBA sizes larger than the page size
1881 * or smaller than a sector size yet, so catch this early and don't
1882 * allow block I/O.
1883 */
1884 if (ns->lba_shift > PAGE_SHIFT || ns->lba_shift < SECTOR_SHIFT) {
1885 capacity = 0;
1886 bs = (1 << 9);
1887 }
1888
1889 blk_integrity_unregister(disk);
1890
1891 atomic_bs = phys_bs = bs;
1892 if (id->nabo == 0) {
1893 /*
1894 * Bit 1 indicates whether NAWUPF is defined for this namespace
1895 * and whether it should be used instead of AWUPF. If NAWUPF ==
1896 * 0 then AWUPF must be used instead.
1897 */
1898 if (id->nsfeat & NVME_NS_FEAT_ATOMICS && id->nawupf)
1899 atomic_bs = (1 + le16_to_cpu(id->nawupf)) * bs;
1900 else
1901 atomic_bs = (1 + ns->ctrl->subsys->awupf) * bs;
1902 }
1903
1904 if (id->nsfeat & NVME_NS_FEAT_IO_OPT) {
1905 /* NPWG = Namespace Preferred Write Granularity */
1906 phys_bs = bs * (1 + le16_to_cpu(id->npwg));
1907 /* NOWS = Namespace Optimal Write Size */
1908 io_opt = bs * (1 + le16_to_cpu(id->nows));
1909 }
1910
1911 blk_queue_logical_block_size(disk->queue, bs);
1912 /*
1913 * Linux filesystems assume writing a single physical block is
1914 * an atomic operation. Hence limit the physical block size to the
1915 * value of the Atomic Write Unit Power Fail parameter.
1916 */
1917 blk_queue_physical_block_size(disk->queue, min(phys_bs, atomic_bs));
1918 blk_queue_io_min(disk->queue, phys_bs);
1919 blk_queue_io_opt(disk->queue, io_opt);
1920
1921 /*
1922 * Register a metadata profile for PI, or the plain non-integrity NVMe
1923 * metadata masquerading as Type 0 if supported, otherwise reject block
1924 * I/O to namespaces with metadata except when the namespace supports
1925 * PI, as it can strip/insert in that case.
1926 */
1927 if (ns->ms) {
1928 if (IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) &&
1929 (ns->features & NVME_NS_METADATA_SUPPORTED))
1930 nvme_init_integrity(disk, ns,
1931 ns->ctrl->max_integrity_segments);
1932 else if (!nvme_ns_has_pi(ns))
1933 capacity = 0;
1934 }
1935
1936 set_capacity_and_notify(disk, capacity);
1937
1938 nvme_config_discard(disk, ns);
1939 blk_queue_max_write_zeroes_sectors(disk->queue,
1940 ns->ctrl->max_zeroes_sectors);
1941 }
1942
nvme_ns_is_readonly(struct nvme_ns * ns,struct nvme_ns_info * info)1943 static bool nvme_ns_is_readonly(struct nvme_ns *ns, struct nvme_ns_info *info)
1944 {
1945 return info->is_readonly || test_bit(NVME_NS_FORCE_RO, &ns->flags);
1946 }
1947
nvme_first_scan(struct gendisk * disk)1948 static inline bool nvme_first_scan(struct gendisk *disk)
1949 {
1950 /* nvme_alloc_ns() scans the disk prior to adding it */
1951 return !disk_live(disk);
1952 }
1953
nvme_set_chunk_sectors(struct nvme_ns * ns,struct nvme_id_ns * id)1954 static void nvme_set_chunk_sectors(struct nvme_ns *ns, struct nvme_id_ns *id)
1955 {
1956 struct nvme_ctrl *ctrl = ns->ctrl;
1957 u32 iob;
1958
1959 if ((ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) &&
1960 is_power_of_2(ctrl->max_hw_sectors))
1961 iob = ctrl->max_hw_sectors;
1962 else
1963 iob = nvme_lba_to_sect(ns, le16_to_cpu(id->noiob));
1964
1965 if (!iob)
1966 return;
1967
1968 if (!is_power_of_2(iob)) {
1969 if (nvme_first_scan(ns->disk))
1970 pr_warn("%s: ignoring unaligned IO boundary:%u\n",
1971 ns->disk->disk_name, iob);
1972 return;
1973 }
1974
1975 if (blk_queue_is_zoned(ns->disk->queue)) {
1976 if (nvme_first_scan(ns->disk))
1977 pr_warn("%s: ignoring zoned namespace IO boundary\n",
1978 ns->disk->disk_name);
1979 return;
1980 }
1981
1982 blk_queue_chunk_sectors(ns->queue, iob);
1983 }
1984
nvme_update_ns_info_generic(struct nvme_ns * ns,struct nvme_ns_info * info)1985 static int nvme_update_ns_info_generic(struct nvme_ns *ns,
1986 struct nvme_ns_info *info)
1987 {
1988 blk_mq_freeze_queue(ns->disk->queue);
1989 nvme_set_queue_limits(ns->ctrl, ns->queue);
1990 set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info));
1991 blk_mq_unfreeze_queue(ns->disk->queue);
1992
1993 if (nvme_ns_head_multipath(ns->head)) {
1994 blk_mq_freeze_queue(ns->head->disk->queue);
1995 set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info));
1996 nvme_mpath_revalidate_paths(ns);
1997 blk_stack_limits(&ns->head->disk->queue->limits,
1998 &ns->queue->limits, 0);
1999 ns->head->disk->flags |= GENHD_FL_HIDDEN;
2000 blk_mq_unfreeze_queue(ns->head->disk->queue);
2001 }
2002
2003 /* Hide the block-interface for these devices */
2004 ns->disk->flags |= GENHD_FL_HIDDEN;
2005 set_bit(NVME_NS_READY, &ns->flags);
2006
2007 return 0;
2008 }
2009
nvme_update_ns_info_block(struct nvme_ns * ns,struct nvme_ns_info * info)2010 static int nvme_update_ns_info_block(struct nvme_ns *ns,
2011 struct nvme_ns_info *info)
2012 {
2013 struct nvme_id_ns *id;
2014 unsigned lbaf;
2015 int ret;
2016
2017 ret = nvme_identify_ns(ns->ctrl, info->nsid, &id);
2018 if (ret)
2019 return ret;
2020
2021 if (id->ncap == 0) {
2022 /* namespace not allocated or attached */
2023 info->is_removed = true;
2024 ret = -ENODEV;
2025 goto error;
2026 }
2027
2028 blk_mq_freeze_queue(ns->disk->queue);
2029 lbaf = nvme_lbaf_index(id->flbas);
2030 ns->lba_shift = id->lbaf[lbaf].ds;
2031 nvme_set_queue_limits(ns->ctrl, ns->queue);
2032
2033 ret = nvme_configure_metadata(ns, id);
2034 if (ret < 0) {
2035 blk_mq_unfreeze_queue(ns->disk->queue);
2036 goto out;
2037 }
2038 nvme_set_chunk_sectors(ns, id);
2039 nvme_update_disk_info(ns->disk, ns, id);
2040
2041 if (ns->head->ids.csi == NVME_CSI_ZNS) {
2042 ret = nvme_update_zone_info(ns, lbaf);
2043 if (ret) {
2044 blk_mq_unfreeze_queue(ns->disk->queue);
2045 goto out;
2046 }
2047 }
2048
2049 /*
2050 * Only set the DEAC bit if the device guarantees that reads from
2051 * deallocated data return zeroes. While the DEAC bit does not
2052 * require that, it must be a no-op if reads from deallocated data
2053 * do not return zeroes.
2054 */
2055 if ((id->dlfeat & 0x7) == 0x1 && (id->dlfeat & (1 << 3)))
2056 ns->features |= NVME_NS_DEAC;
2057 set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info));
2058 set_bit(NVME_NS_READY, &ns->flags);
2059 blk_mq_unfreeze_queue(ns->disk->queue);
2060
2061 if (blk_queue_is_zoned(ns->queue)) {
2062 ret = nvme_revalidate_zones(ns);
2063 if (ret && !nvme_first_scan(ns->disk))
2064 goto out;
2065 }
2066
2067 if (nvme_ns_head_multipath(ns->head)) {
2068 blk_mq_freeze_queue(ns->head->disk->queue);
2069 nvme_update_disk_info(ns->head->disk, ns, id);
2070 set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info));
2071 nvme_mpath_revalidate_paths(ns);
2072 blk_stack_limits(&ns->head->disk->queue->limits,
2073 &ns->queue->limits, 0);
2074 disk_update_readahead(ns->head->disk);
2075 blk_mq_unfreeze_queue(ns->head->disk->queue);
2076 }
2077
2078 ret = 0;
2079 out:
2080 /*
2081 * If probing fails due an unsupported feature, hide the block device,
2082 * but still allow other access.
2083 */
2084 if (ret == -ENODEV) {
2085 ns->disk->flags |= GENHD_FL_HIDDEN;
2086 set_bit(NVME_NS_READY, &ns->flags);
2087 ret = 0;
2088 }
2089
2090 error:
2091 kfree(id);
2092 return ret;
2093 }
2094
nvme_update_ns_info(struct nvme_ns * ns,struct nvme_ns_info * info)2095 static int nvme_update_ns_info(struct nvme_ns *ns, struct nvme_ns_info *info)
2096 {
2097 switch (info->ids.csi) {
2098 case NVME_CSI_ZNS:
2099 if (!IS_ENABLED(CONFIG_BLK_DEV_ZONED)) {
2100 dev_info(ns->ctrl->device,
2101 "block device for nsid %u not supported without CONFIG_BLK_DEV_ZONED\n",
2102 info->nsid);
2103 return nvme_update_ns_info_generic(ns, info);
2104 }
2105 return nvme_update_ns_info_block(ns, info);
2106 case NVME_CSI_NVM:
2107 return nvme_update_ns_info_block(ns, info);
2108 default:
2109 dev_info(ns->ctrl->device,
2110 "block device for nsid %u not supported (csi %u)\n",
2111 info->nsid, info->ids.csi);
2112 return nvme_update_ns_info_generic(ns, info);
2113 }
2114 }
2115
2116 #ifdef CONFIG_BLK_SED_OPAL
nvme_sec_submit(void * data,u16 spsp,u8 secp,void * buffer,size_t len,bool send)2117 static int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
2118 bool send)
2119 {
2120 struct nvme_ctrl *ctrl = data;
2121 struct nvme_command cmd = { };
2122
2123 if (send)
2124 cmd.common.opcode = nvme_admin_security_send;
2125 else
2126 cmd.common.opcode = nvme_admin_security_recv;
2127 cmd.common.nsid = 0;
2128 cmd.common.cdw10 = cpu_to_le32(((u32)secp) << 24 | ((u32)spsp) << 8);
2129 cmd.common.cdw11 = cpu_to_le32(len);
2130
2131 return __nvme_submit_sync_cmd(ctrl->admin_q, &cmd, NULL, buffer, len,
2132 NVME_QID_ANY, 1, 0);
2133 }
2134
nvme_configure_opal(struct nvme_ctrl * ctrl,bool was_suspended)2135 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended)
2136 {
2137 if (ctrl->oacs & NVME_CTRL_OACS_SEC_SUPP) {
2138 if (!ctrl->opal_dev)
2139 ctrl->opal_dev = init_opal_dev(ctrl, &nvme_sec_submit);
2140 else if (was_suspended)
2141 opal_unlock_from_suspend(ctrl->opal_dev);
2142 } else {
2143 free_opal_dev(ctrl->opal_dev);
2144 ctrl->opal_dev = NULL;
2145 }
2146 }
2147 #else
nvme_configure_opal(struct nvme_ctrl * ctrl,bool was_suspended)2148 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended)
2149 {
2150 }
2151 #endif /* CONFIG_BLK_SED_OPAL */
2152
2153 #ifdef CONFIG_BLK_DEV_ZONED
nvme_report_zones(struct gendisk * disk,sector_t sector,unsigned int nr_zones,report_zones_cb cb,void * data)2154 static int nvme_report_zones(struct gendisk *disk, sector_t sector,
2155 unsigned int nr_zones, report_zones_cb cb, void *data)
2156 {
2157 return nvme_ns_report_zones(disk->private_data, sector, nr_zones, cb,
2158 data);
2159 }
2160 #else
2161 #define nvme_report_zones NULL
2162 #endif /* CONFIG_BLK_DEV_ZONED */
2163
2164 const struct block_device_operations nvme_bdev_ops = {
2165 .owner = THIS_MODULE,
2166 .ioctl = nvme_ioctl,
2167 .compat_ioctl = blkdev_compat_ptr_ioctl,
2168 .open = nvme_open,
2169 .release = nvme_release,
2170 .getgeo = nvme_getgeo,
2171 .report_zones = nvme_report_zones,
2172 .pr_ops = &nvme_pr_ops,
2173 };
2174
nvme_wait_ready(struct nvme_ctrl * ctrl,u32 mask,u32 val,u32 timeout,const char * op)2175 static int nvme_wait_ready(struct nvme_ctrl *ctrl, u32 mask, u32 val,
2176 u32 timeout, const char *op)
2177 {
2178 unsigned long timeout_jiffies = jiffies + timeout * HZ;
2179 u32 csts;
2180 int ret;
2181
2182 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
2183 if (csts == ~0)
2184 return -ENODEV;
2185 if ((csts & mask) == val)
2186 break;
2187
2188 usleep_range(1000, 2000);
2189 if (fatal_signal_pending(current))
2190 return -EINTR;
2191 if (time_after(jiffies, timeout_jiffies)) {
2192 dev_err(ctrl->device,
2193 "Device not ready; aborting %s, CSTS=0x%x\n",
2194 op, csts);
2195 return -ENODEV;
2196 }
2197 }
2198
2199 return ret;
2200 }
2201
nvme_disable_ctrl(struct nvme_ctrl * ctrl,bool shutdown)2202 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown)
2203 {
2204 int ret;
2205
2206 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
2207 if (shutdown)
2208 ctrl->ctrl_config |= NVME_CC_SHN_NORMAL;
2209 else
2210 ctrl->ctrl_config &= ~NVME_CC_ENABLE;
2211
2212 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
2213 if (ret)
2214 return ret;
2215
2216 if (shutdown) {
2217 return nvme_wait_ready(ctrl, NVME_CSTS_SHST_MASK,
2218 NVME_CSTS_SHST_CMPLT,
2219 ctrl->shutdown_timeout, "shutdown");
2220 }
2221 if (ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY)
2222 msleep(NVME_QUIRK_DELAY_AMOUNT);
2223 return nvme_wait_ready(ctrl, NVME_CSTS_RDY, 0,
2224 (NVME_CAP_TIMEOUT(ctrl->cap) + 1) / 2, "reset");
2225 }
2226 EXPORT_SYMBOL_GPL(nvme_disable_ctrl);
2227
nvme_enable_ctrl(struct nvme_ctrl * ctrl)2228 int nvme_enable_ctrl(struct nvme_ctrl *ctrl)
2229 {
2230 unsigned dev_page_min;
2231 u32 timeout;
2232 int ret;
2233
2234 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap);
2235 if (ret) {
2236 dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret);
2237 return ret;
2238 }
2239 dev_page_min = NVME_CAP_MPSMIN(ctrl->cap) + 12;
2240
2241 if (NVME_CTRL_PAGE_SHIFT < dev_page_min) {
2242 dev_err(ctrl->device,
2243 "Minimum device page size %u too large for host (%u)\n",
2244 1 << dev_page_min, 1 << NVME_CTRL_PAGE_SHIFT);
2245 return -ENODEV;
2246 }
2247
2248 if (NVME_CAP_CSS(ctrl->cap) & NVME_CAP_CSS_CSI)
2249 ctrl->ctrl_config = NVME_CC_CSS_CSI;
2250 else
2251 ctrl->ctrl_config = NVME_CC_CSS_NVM;
2252
2253 /*
2254 * Setting CRIME results in CSTS.RDY before the media is ready. This
2255 * makes it possible for media related commands to return the error
2256 * NVME_SC_ADMIN_COMMAND_MEDIA_NOT_READY. Until the driver is
2257 * restructured to handle retries, disable CC.CRIME.
2258 */
2259 ctrl->ctrl_config &= ~NVME_CC_CRIME;
2260
2261 ctrl->ctrl_config |= (NVME_CTRL_PAGE_SHIFT - 12) << NVME_CC_MPS_SHIFT;
2262 ctrl->ctrl_config |= NVME_CC_AMS_RR | NVME_CC_SHN_NONE;
2263 ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
2264 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
2265 if (ret)
2266 return ret;
2267
2268 /* Flush write to device (required if transport is PCI) */
2269 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CC, &ctrl->ctrl_config);
2270 if (ret)
2271 return ret;
2272
2273 /* CAP value may change after initial CC write */
2274 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap);
2275 if (ret)
2276 return ret;
2277
2278 timeout = NVME_CAP_TIMEOUT(ctrl->cap);
2279 if (ctrl->cap & NVME_CAP_CRMS_CRWMS) {
2280 u32 crto, ready_timeout;
2281
2282 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CRTO, &crto);
2283 if (ret) {
2284 dev_err(ctrl->device, "Reading CRTO failed (%d)\n",
2285 ret);
2286 return ret;
2287 }
2288
2289 /*
2290 * CRTO should always be greater or equal to CAP.TO, but some
2291 * devices are known to get this wrong. Use the larger of the
2292 * two values.
2293 */
2294 ready_timeout = NVME_CRTO_CRWMT(crto);
2295
2296 if (ready_timeout < timeout)
2297 dev_warn_once(ctrl->device, "bad crto:%x cap:%llx\n",
2298 crto, ctrl->cap);
2299 else
2300 timeout = ready_timeout;
2301 }
2302
2303 ctrl->ctrl_config |= NVME_CC_ENABLE;
2304 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
2305 if (ret)
2306 return ret;
2307 return nvme_wait_ready(ctrl, NVME_CSTS_RDY, NVME_CSTS_RDY,
2308 (timeout + 1) / 2, "initialisation");
2309 }
2310 EXPORT_SYMBOL_GPL(nvme_enable_ctrl);
2311
nvme_configure_timestamp(struct nvme_ctrl * ctrl)2312 static int nvme_configure_timestamp(struct nvme_ctrl *ctrl)
2313 {
2314 __le64 ts;
2315 int ret;
2316
2317 if (!(ctrl->oncs & NVME_CTRL_ONCS_TIMESTAMP))
2318 return 0;
2319
2320 ts = cpu_to_le64(ktime_to_ms(ktime_get_real()));
2321 ret = nvme_set_features(ctrl, NVME_FEAT_TIMESTAMP, 0, &ts, sizeof(ts),
2322 NULL);
2323 if (ret)
2324 dev_warn_once(ctrl->device,
2325 "could not set timestamp (%d)\n", ret);
2326 return ret;
2327 }
2328
nvme_configure_host_options(struct nvme_ctrl * ctrl)2329 static int nvme_configure_host_options(struct nvme_ctrl *ctrl)
2330 {
2331 struct nvme_feat_host_behavior *host;
2332 u8 acre = 0, lbafee = 0;
2333 int ret;
2334
2335 /* Don't bother enabling the feature if retry delay is not reported */
2336 if (ctrl->crdt[0])
2337 acre = NVME_ENABLE_ACRE;
2338 if (ctrl->ctratt & NVME_CTRL_ATTR_ELBAS)
2339 lbafee = NVME_ENABLE_LBAFEE;
2340
2341 if (!acre && !lbafee)
2342 return 0;
2343
2344 host = kzalloc(sizeof(*host), GFP_KERNEL);
2345 if (!host)
2346 return 0;
2347
2348 host->acre = acre;
2349 host->lbafee = lbafee;
2350 ret = nvme_set_features(ctrl, NVME_FEAT_HOST_BEHAVIOR, 0,
2351 host, sizeof(*host), NULL);
2352 kfree(host);
2353 return ret;
2354 }
2355
2356 /*
2357 * The function checks whether the given total (exlat + enlat) latency of
2358 * a power state allows the latter to be used as an APST transition target.
2359 * It does so by comparing the latency to the primary and secondary latency
2360 * tolerances defined by module params. If there's a match, the corresponding
2361 * timeout value is returned and the matching tolerance index (1 or 2) is
2362 * reported.
2363 */
nvme_apst_get_transition_time(u64 total_latency,u64 * transition_time,unsigned * last_index)2364 static bool nvme_apst_get_transition_time(u64 total_latency,
2365 u64 *transition_time, unsigned *last_index)
2366 {
2367 if (total_latency <= apst_primary_latency_tol_us) {
2368 if (*last_index == 1)
2369 return false;
2370 *last_index = 1;
2371 *transition_time = apst_primary_timeout_ms;
2372 return true;
2373 }
2374 if (apst_secondary_timeout_ms &&
2375 total_latency <= apst_secondary_latency_tol_us) {
2376 if (*last_index <= 2)
2377 return false;
2378 *last_index = 2;
2379 *transition_time = apst_secondary_timeout_ms;
2380 return true;
2381 }
2382 return false;
2383 }
2384
2385 /*
2386 * APST (Autonomous Power State Transition) lets us program a table of power
2387 * state transitions that the controller will perform automatically.
2388 *
2389 * Depending on module params, one of the two supported techniques will be used:
2390 *
2391 * - If the parameters provide explicit timeouts and tolerances, they will be
2392 * used to build a table with up to 2 non-operational states to transition to.
2393 * The default parameter values were selected based on the values used by
2394 * Microsoft's and Intel's NVMe drivers. Yet, since we don't implement dynamic
2395 * regeneration of the APST table in the event of switching between external
2396 * and battery power, the timeouts and tolerances reflect a compromise
2397 * between values used by Microsoft for AC and battery scenarios.
2398 * - If not, we'll configure the table with a simple heuristic: we are willing
2399 * to spend at most 2% of the time transitioning between power states.
2400 * Therefore, when running in any given state, we will enter the next
2401 * lower-power non-operational state after waiting 50 * (enlat + exlat)
2402 * microseconds, as long as that state's exit latency is under the requested
2403 * maximum latency.
2404 *
2405 * We will not autonomously enter any non-operational state for which the total
2406 * latency exceeds ps_max_latency_us.
2407 *
2408 * Users can set ps_max_latency_us to zero to turn off APST.
2409 */
nvme_configure_apst(struct nvme_ctrl * ctrl)2410 static int nvme_configure_apst(struct nvme_ctrl *ctrl)
2411 {
2412 struct nvme_feat_auto_pst *table;
2413 unsigned apste = 0;
2414 u64 max_lat_us = 0;
2415 __le64 target = 0;
2416 int max_ps = -1;
2417 int state;
2418 int ret;
2419 unsigned last_lt_index = UINT_MAX;
2420
2421 /*
2422 * If APST isn't supported or if we haven't been initialized yet,
2423 * then don't do anything.
2424 */
2425 if (!ctrl->apsta)
2426 return 0;
2427
2428 if (ctrl->npss > 31) {
2429 dev_warn(ctrl->device, "NPSS is invalid; not using APST\n");
2430 return 0;
2431 }
2432
2433 table = kzalloc(sizeof(*table), GFP_KERNEL);
2434 if (!table)
2435 return 0;
2436
2437 if (!ctrl->apst_enabled || ctrl->ps_max_latency_us == 0) {
2438 /* Turn off APST. */
2439 dev_dbg(ctrl->device, "APST disabled\n");
2440 goto done;
2441 }
2442
2443 /*
2444 * Walk through all states from lowest- to highest-power.
2445 * According to the spec, lower-numbered states use more power. NPSS,
2446 * despite the name, is the index of the lowest-power state, not the
2447 * number of states.
2448 */
2449 for (state = (int)ctrl->npss; state >= 0; state--) {
2450 u64 total_latency_us, exit_latency_us, transition_ms;
2451
2452 if (target)
2453 table->entries[state] = target;
2454
2455 /*
2456 * Don't allow transitions to the deepest state if it's quirked
2457 * off.
2458 */
2459 if (state == ctrl->npss &&
2460 (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS))
2461 continue;
2462
2463 /*
2464 * Is this state a useful non-operational state for higher-power
2465 * states to autonomously transition to?
2466 */
2467 if (!(ctrl->psd[state].flags & NVME_PS_FLAGS_NON_OP_STATE))
2468 continue;
2469
2470 exit_latency_us = (u64)le32_to_cpu(ctrl->psd[state].exit_lat);
2471 if (exit_latency_us > ctrl->ps_max_latency_us)
2472 continue;
2473
2474 total_latency_us = exit_latency_us +
2475 le32_to_cpu(ctrl->psd[state].entry_lat);
2476
2477 /*
2478 * This state is good. It can be used as the APST idle target
2479 * for higher power states.
2480 */
2481 if (apst_primary_timeout_ms && apst_primary_latency_tol_us) {
2482 if (!nvme_apst_get_transition_time(total_latency_us,
2483 &transition_ms, &last_lt_index))
2484 continue;
2485 } else {
2486 transition_ms = total_latency_us + 19;
2487 do_div(transition_ms, 20);
2488 if (transition_ms > (1 << 24) - 1)
2489 transition_ms = (1 << 24) - 1;
2490 }
2491
2492 target = cpu_to_le64((state << 3) | (transition_ms << 8));
2493 if (max_ps == -1)
2494 max_ps = state;
2495 if (total_latency_us > max_lat_us)
2496 max_lat_us = total_latency_us;
2497 }
2498
2499 if (max_ps == -1)
2500 dev_dbg(ctrl->device, "APST enabled but no non-operational states are available\n");
2501 else
2502 dev_dbg(ctrl->device, "APST enabled: max PS = %d, max round-trip latency = %lluus, table = %*phN\n",
2503 max_ps, max_lat_us, (int)sizeof(*table), table);
2504 apste = 1;
2505
2506 done:
2507 ret = nvme_set_features(ctrl, NVME_FEAT_AUTO_PST, apste,
2508 table, sizeof(*table), NULL);
2509 if (ret)
2510 dev_err(ctrl->device, "failed to set APST feature (%d)\n", ret);
2511 kfree(table);
2512 return ret;
2513 }
2514
nvme_set_latency_tolerance(struct device * dev,s32 val)2515 static void nvme_set_latency_tolerance(struct device *dev, s32 val)
2516 {
2517 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
2518 u64 latency;
2519
2520 switch (val) {
2521 case PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT:
2522 case PM_QOS_LATENCY_ANY:
2523 latency = U64_MAX;
2524 break;
2525
2526 default:
2527 latency = val;
2528 }
2529
2530 if (ctrl->ps_max_latency_us != latency) {
2531 ctrl->ps_max_latency_us = latency;
2532 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE)
2533 nvme_configure_apst(ctrl);
2534 }
2535 }
2536
2537 struct nvme_core_quirk_entry {
2538 /*
2539 * NVMe model and firmware strings are padded with spaces. For
2540 * simplicity, strings in the quirk table are padded with NULLs
2541 * instead.
2542 */
2543 u16 vid;
2544 const char *mn;
2545 const char *fr;
2546 unsigned long quirks;
2547 };
2548
2549 static const struct nvme_core_quirk_entry core_quirks[] = {
2550 {
2551 /*
2552 * This Toshiba device seems to die using any APST states. See:
2553 * https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1678184/comments/11
2554 */
2555 .vid = 0x1179,
2556 .mn = "THNSF5256GPUK TOSHIBA",
2557 .quirks = NVME_QUIRK_NO_APST,
2558 },
2559 {
2560 /*
2561 * This LiteON CL1-3D*-Q11 firmware version has a race
2562 * condition associated with actions related to suspend to idle
2563 * LiteON has resolved the problem in future firmware
2564 */
2565 .vid = 0x14a4,
2566 .fr = "22301111",
2567 .quirks = NVME_QUIRK_SIMPLE_SUSPEND,
2568 },
2569 {
2570 /*
2571 * This Kioxia CD6-V Series / HPE PE8030 device times out and
2572 * aborts I/O during any load, but more easily reproducible
2573 * with discards (fstrim).
2574 *
2575 * The device is left in a state where it is also not possible
2576 * to use "nvme set-feature" to disable APST, but booting with
2577 * nvme_core.default_ps_max_latency=0 works.
2578 */
2579 .vid = 0x1e0f,
2580 .mn = "KCD6XVUL6T40",
2581 .quirks = NVME_QUIRK_NO_APST,
2582 },
2583 {
2584 /*
2585 * The external Samsung X5 SSD fails initialization without a
2586 * delay before checking if it is ready and has a whole set of
2587 * other problems. To make this even more interesting, it
2588 * shares the PCI ID with internal Samsung 970 Evo Plus that
2589 * does not need or want these quirks.
2590 */
2591 .vid = 0x144d,
2592 .mn = "Samsung Portable SSD X5",
2593 .quirks = NVME_QUIRK_DELAY_BEFORE_CHK_RDY |
2594 NVME_QUIRK_NO_DEEPEST_PS |
2595 NVME_QUIRK_IGNORE_DEV_SUBNQN,
2596 }
2597 };
2598
2599 /* match is null-terminated but idstr is space-padded. */
string_matches(const char * idstr,const char * match,size_t len)2600 static bool string_matches(const char *idstr, const char *match, size_t len)
2601 {
2602 size_t matchlen;
2603
2604 if (!match)
2605 return true;
2606
2607 matchlen = strlen(match);
2608 WARN_ON_ONCE(matchlen > len);
2609
2610 if (memcmp(idstr, match, matchlen))
2611 return false;
2612
2613 for (; matchlen < len; matchlen++)
2614 if (idstr[matchlen] != ' ')
2615 return false;
2616
2617 return true;
2618 }
2619
quirk_matches(const struct nvme_id_ctrl * id,const struct nvme_core_quirk_entry * q)2620 static bool quirk_matches(const struct nvme_id_ctrl *id,
2621 const struct nvme_core_quirk_entry *q)
2622 {
2623 return q->vid == le16_to_cpu(id->vid) &&
2624 string_matches(id->mn, q->mn, sizeof(id->mn)) &&
2625 string_matches(id->fr, q->fr, sizeof(id->fr));
2626 }
2627
nvme_init_subnqn(struct nvme_subsystem * subsys,struct nvme_ctrl * ctrl,struct nvme_id_ctrl * id)2628 static void nvme_init_subnqn(struct nvme_subsystem *subsys, struct nvme_ctrl *ctrl,
2629 struct nvme_id_ctrl *id)
2630 {
2631 size_t nqnlen;
2632 int off;
2633
2634 if(!(ctrl->quirks & NVME_QUIRK_IGNORE_DEV_SUBNQN)) {
2635 nqnlen = strnlen(id->subnqn, NVMF_NQN_SIZE);
2636 if (nqnlen > 0 && nqnlen < NVMF_NQN_SIZE) {
2637 strscpy(subsys->subnqn, id->subnqn, NVMF_NQN_SIZE);
2638 return;
2639 }
2640
2641 if (ctrl->vs >= NVME_VS(1, 2, 1))
2642 dev_warn(ctrl->device, "missing or invalid SUBNQN field.\n");
2643 }
2644
2645 /*
2646 * Generate a "fake" NQN similar to the one in Section 4.5 of the NVMe
2647 * Base Specification 2.0. It is slightly different from the format
2648 * specified there due to historic reasons, and we can't change it now.
2649 */
2650 off = snprintf(subsys->subnqn, NVMF_NQN_SIZE,
2651 "nqn.2014.08.org.nvmexpress:%04x%04x",
2652 le16_to_cpu(id->vid), le16_to_cpu(id->ssvid));
2653 memcpy(subsys->subnqn + off, id->sn, sizeof(id->sn));
2654 off += sizeof(id->sn);
2655 memcpy(subsys->subnqn + off, id->mn, sizeof(id->mn));
2656 off += sizeof(id->mn);
2657 memset(subsys->subnqn + off, 0, sizeof(subsys->subnqn) - off);
2658 }
2659
nvme_release_subsystem(struct device * dev)2660 static void nvme_release_subsystem(struct device *dev)
2661 {
2662 struct nvme_subsystem *subsys =
2663 container_of(dev, struct nvme_subsystem, dev);
2664
2665 if (subsys->instance >= 0)
2666 ida_free(&nvme_instance_ida, subsys->instance);
2667 kfree(subsys);
2668 }
2669
nvme_destroy_subsystem(struct kref * ref)2670 static void nvme_destroy_subsystem(struct kref *ref)
2671 {
2672 struct nvme_subsystem *subsys =
2673 container_of(ref, struct nvme_subsystem, ref);
2674
2675 mutex_lock(&nvme_subsystems_lock);
2676 list_del(&subsys->entry);
2677 mutex_unlock(&nvme_subsystems_lock);
2678
2679 ida_destroy(&subsys->ns_ida);
2680 device_del(&subsys->dev);
2681 put_device(&subsys->dev);
2682 }
2683
nvme_put_subsystem(struct nvme_subsystem * subsys)2684 static void nvme_put_subsystem(struct nvme_subsystem *subsys)
2685 {
2686 kref_put(&subsys->ref, nvme_destroy_subsystem);
2687 }
2688
__nvme_find_get_subsystem(const char * subsysnqn)2689 static struct nvme_subsystem *__nvme_find_get_subsystem(const char *subsysnqn)
2690 {
2691 struct nvme_subsystem *subsys;
2692
2693 lockdep_assert_held(&nvme_subsystems_lock);
2694
2695 /*
2696 * Fail matches for discovery subsystems. This results
2697 * in each discovery controller bound to a unique subsystem.
2698 * This avoids issues with validating controller values
2699 * that can only be true when there is a single unique subsystem.
2700 * There may be multiple and completely independent entities
2701 * that provide discovery controllers.
2702 */
2703 if (!strcmp(subsysnqn, NVME_DISC_SUBSYS_NAME))
2704 return NULL;
2705
2706 list_for_each_entry(subsys, &nvme_subsystems, entry) {
2707 if (strcmp(subsys->subnqn, subsysnqn))
2708 continue;
2709 if (!kref_get_unless_zero(&subsys->ref))
2710 continue;
2711 return subsys;
2712 }
2713
2714 return NULL;
2715 }
2716
nvme_discovery_ctrl(struct nvme_ctrl * ctrl)2717 static inline bool nvme_discovery_ctrl(struct nvme_ctrl *ctrl)
2718 {
2719 return ctrl->opts && ctrl->opts->discovery_nqn;
2720 }
2721
nvme_validate_cntlid(struct nvme_subsystem * subsys,struct nvme_ctrl * ctrl,struct nvme_id_ctrl * id)2722 static bool nvme_validate_cntlid(struct nvme_subsystem *subsys,
2723 struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
2724 {
2725 struct nvme_ctrl *tmp;
2726
2727 lockdep_assert_held(&nvme_subsystems_lock);
2728
2729 list_for_each_entry(tmp, &subsys->ctrls, subsys_entry) {
2730 if (nvme_state_terminal(tmp))
2731 continue;
2732
2733 if (tmp->cntlid == ctrl->cntlid) {
2734 dev_err(ctrl->device,
2735 "Duplicate cntlid %u with %s, subsys %s, rejecting\n",
2736 ctrl->cntlid, dev_name(tmp->device),
2737 subsys->subnqn);
2738 return false;
2739 }
2740
2741 if ((id->cmic & NVME_CTRL_CMIC_MULTI_CTRL) ||
2742 nvme_discovery_ctrl(ctrl))
2743 continue;
2744
2745 dev_err(ctrl->device,
2746 "Subsystem does not support multiple controllers\n");
2747 return false;
2748 }
2749
2750 return true;
2751 }
2752
nvme_init_subsystem(struct nvme_ctrl * ctrl,struct nvme_id_ctrl * id)2753 static int nvme_init_subsystem(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
2754 {
2755 struct nvme_subsystem *subsys, *found;
2756 int ret;
2757
2758 subsys = kzalloc(sizeof(*subsys), GFP_KERNEL);
2759 if (!subsys)
2760 return -ENOMEM;
2761
2762 subsys->instance = -1;
2763 mutex_init(&subsys->lock);
2764 kref_init(&subsys->ref);
2765 INIT_LIST_HEAD(&subsys->ctrls);
2766 INIT_LIST_HEAD(&subsys->nsheads);
2767 nvme_init_subnqn(subsys, ctrl, id);
2768 memcpy(subsys->serial, id->sn, sizeof(subsys->serial));
2769 memcpy(subsys->model, id->mn, sizeof(subsys->model));
2770 subsys->vendor_id = le16_to_cpu(id->vid);
2771 subsys->cmic = id->cmic;
2772
2773 /* Versions prior to 1.4 don't necessarily report a valid type */
2774 if (id->cntrltype == NVME_CTRL_DISC ||
2775 !strcmp(subsys->subnqn, NVME_DISC_SUBSYS_NAME))
2776 subsys->subtype = NVME_NQN_DISC;
2777 else
2778 subsys->subtype = NVME_NQN_NVME;
2779
2780 if (nvme_discovery_ctrl(ctrl) && subsys->subtype != NVME_NQN_DISC) {
2781 dev_err(ctrl->device,
2782 "Subsystem %s is not a discovery controller",
2783 subsys->subnqn);
2784 kfree(subsys);
2785 return -EINVAL;
2786 }
2787 subsys->awupf = le16_to_cpu(id->awupf);
2788 nvme_mpath_default_iopolicy(subsys);
2789
2790 subsys->dev.class = nvme_subsys_class;
2791 subsys->dev.release = nvme_release_subsystem;
2792 subsys->dev.groups = nvme_subsys_attrs_groups;
2793 dev_set_name(&subsys->dev, "nvme-subsys%d", ctrl->instance);
2794 device_initialize(&subsys->dev);
2795
2796 mutex_lock(&nvme_subsystems_lock);
2797 found = __nvme_find_get_subsystem(subsys->subnqn);
2798 if (found) {
2799 put_device(&subsys->dev);
2800 subsys = found;
2801
2802 if (!nvme_validate_cntlid(subsys, ctrl, id)) {
2803 ret = -EINVAL;
2804 goto out_put_subsystem;
2805 }
2806 } else {
2807 ret = device_add(&subsys->dev);
2808 if (ret) {
2809 dev_err(ctrl->device,
2810 "failed to register subsystem device.\n");
2811 put_device(&subsys->dev);
2812 goto out_unlock;
2813 }
2814 ida_init(&subsys->ns_ida);
2815 list_add_tail(&subsys->entry, &nvme_subsystems);
2816 }
2817
2818 ret = sysfs_create_link(&subsys->dev.kobj, &ctrl->device->kobj,
2819 dev_name(ctrl->device));
2820 if (ret) {
2821 dev_err(ctrl->device,
2822 "failed to create sysfs link from subsystem.\n");
2823 goto out_put_subsystem;
2824 }
2825
2826 if (!found)
2827 subsys->instance = ctrl->instance;
2828 ctrl->subsys = subsys;
2829 list_add_tail(&ctrl->subsys_entry, &subsys->ctrls);
2830 mutex_unlock(&nvme_subsystems_lock);
2831 return 0;
2832
2833 out_put_subsystem:
2834 nvme_put_subsystem(subsys);
2835 out_unlock:
2836 mutex_unlock(&nvme_subsystems_lock);
2837 return ret;
2838 }
2839
nvme_get_log(struct nvme_ctrl * ctrl,u32 nsid,u8 log_page,u8 lsp,u8 csi,void * log,size_t size,u64 offset)2840 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi,
2841 void *log, size_t size, u64 offset)
2842 {
2843 struct nvme_command c = { };
2844 u32 dwlen = nvme_bytes_to_numd(size);
2845
2846 c.get_log_page.opcode = nvme_admin_get_log_page;
2847 c.get_log_page.nsid = cpu_to_le32(nsid);
2848 c.get_log_page.lid = log_page;
2849 c.get_log_page.lsp = lsp;
2850 c.get_log_page.numdl = cpu_to_le16(dwlen & ((1 << 16) - 1));
2851 c.get_log_page.numdu = cpu_to_le16(dwlen >> 16);
2852 c.get_log_page.lpol = cpu_to_le32(lower_32_bits(offset));
2853 c.get_log_page.lpou = cpu_to_le32(upper_32_bits(offset));
2854 c.get_log_page.csi = csi;
2855
2856 return nvme_submit_sync_cmd(ctrl->admin_q, &c, log, size);
2857 }
2858
nvme_get_effects_log(struct nvme_ctrl * ctrl,u8 csi,struct nvme_effects_log ** log)2859 static int nvme_get_effects_log(struct nvme_ctrl *ctrl, u8 csi,
2860 struct nvme_effects_log **log)
2861 {
2862 struct nvme_effects_log *old, *cel = xa_load(&ctrl->cels, csi);
2863 int ret;
2864
2865 if (cel)
2866 goto out;
2867
2868 cel = kzalloc(sizeof(*cel), GFP_KERNEL);
2869 if (!cel)
2870 return -ENOMEM;
2871
2872 ret = nvme_get_log(ctrl, 0x00, NVME_LOG_CMD_EFFECTS, 0, csi,
2873 cel, sizeof(*cel), 0);
2874 if (ret) {
2875 kfree(cel);
2876 return ret;
2877 }
2878
2879 old = xa_store(&ctrl->cels, csi, cel, GFP_KERNEL);
2880 if (xa_is_err(old)) {
2881 kfree(cel);
2882 return xa_err(old);
2883 }
2884 out:
2885 *log = cel;
2886 return 0;
2887 }
2888
nvme_mps_to_sectors(struct nvme_ctrl * ctrl,u32 units)2889 static inline u32 nvme_mps_to_sectors(struct nvme_ctrl *ctrl, u32 units)
2890 {
2891 u32 page_shift = NVME_CAP_MPSMIN(ctrl->cap) + 12, val;
2892
2893 if (check_shl_overflow(1U, units + page_shift - 9, &val))
2894 return UINT_MAX;
2895 return val;
2896 }
2897
nvme_init_non_mdts_limits(struct nvme_ctrl * ctrl)2898 static int nvme_init_non_mdts_limits(struct nvme_ctrl *ctrl)
2899 {
2900 struct nvme_command c = { };
2901 struct nvme_id_ctrl_nvm *id;
2902 int ret;
2903
2904 if (ctrl->oncs & NVME_CTRL_ONCS_DSM) {
2905 ctrl->max_discard_sectors = UINT_MAX;
2906 ctrl->max_discard_segments = NVME_DSM_MAX_RANGES;
2907 } else {
2908 ctrl->max_discard_sectors = 0;
2909 ctrl->max_discard_segments = 0;
2910 }
2911
2912 /*
2913 * Even though NVMe spec explicitly states that MDTS is not applicable
2914 * to the write-zeroes, we are cautious and limit the size to the
2915 * controllers max_hw_sectors value, which is based on the MDTS field
2916 * and possibly other limiting factors.
2917 */
2918 if ((ctrl->oncs & NVME_CTRL_ONCS_WRITE_ZEROES) &&
2919 !(ctrl->quirks & NVME_QUIRK_DISABLE_WRITE_ZEROES))
2920 ctrl->max_zeroes_sectors = ctrl->max_hw_sectors;
2921 else
2922 ctrl->max_zeroes_sectors = 0;
2923
2924 if (ctrl->subsys->subtype != NVME_NQN_NVME ||
2925 nvme_ctrl_limited_cns(ctrl) ||
2926 test_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags))
2927 return 0;
2928
2929 id = kzalloc(sizeof(*id), GFP_KERNEL);
2930 if (!id)
2931 return -ENOMEM;
2932
2933 c.identify.opcode = nvme_admin_identify;
2934 c.identify.cns = NVME_ID_CNS_CS_CTRL;
2935 c.identify.csi = NVME_CSI_NVM;
2936
2937 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id));
2938 if (ret)
2939 goto free_data;
2940
2941 if (id->dmrl)
2942 ctrl->max_discard_segments = id->dmrl;
2943 ctrl->dmrsl = le32_to_cpu(id->dmrsl);
2944 if (id->wzsl)
2945 ctrl->max_zeroes_sectors = nvme_mps_to_sectors(ctrl, id->wzsl);
2946
2947 free_data:
2948 if (ret > 0)
2949 set_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags);
2950 kfree(id);
2951 return ret;
2952 }
2953
nvme_init_effects_log(struct nvme_ctrl * ctrl,u8 csi,struct nvme_effects_log ** log)2954 static int nvme_init_effects_log(struct nvme_ctrl *ctrl,
2955 u8 csi, struct nvme_effects_log **log)
2956 {
2957 struct nvme_effects_log *effects, *old;
2958
2959 effects = kzalloc(sizeof(*effects), GFP_KERNEL);
2960 if (!effects)
2961 return -ENOMEM;
2962
2963 old = xa_store(&ctrl->cels, csi, effects, GFP_KERNEL);
2964 if (xa_is_err(old)) {
2965 kfree(effects);
2966 return xa_err(old);
2967 }
2968
2969 *log = effects;
2970 return 0;
2971 }
2972
nvme_init_known_nvm_effects(struct nvme_ctrl * ctrl)2973 static void nvme_init_known_nvm_effects(struct nvme_ctrl *ctrl)
2974 {
2975 struct nvme_effects_log *log = ctrl->effects;
2976
2977 log->acs[nvme_admin_format_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC |
2978 NVME_CMD_EFFECTS_NCC |
2979 NVME_CMD_EFFECTS_CSE_MASK);
2980 log->acs[nvme_admin_sanitize_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC |
2981 NVME_CMD_EFFECTS_CSE_MASK);
2982
2983 /*
2984 * The spec says the result of a security receive command depends on
2985 * the previous security send command. As such, many vendors log this
2986 * command as one to submitted only when no other commands to the same
2987 * namespace are outstanding. The intention is to tell the host to
2988 * prevent mixing security send and receive.
2989 *
2990 * This driver can only enforce such exclusive access against IO
2991 * queues, though. We are not readily able to enforce such a rule for
2992 * two commands to the admin queue, which is the only queue that
2993 * matters for this command.
2994 *
2995 * Rather than blindly freezing the IO queues for this effect that
2996 * doesn't even apply to IO, mask it off.
2997 */
2998 log->acs[nvme_admin_security_recv] &= cpu_to_le32(~NVME_CMD_EFFECTS_CSE_MASK);
2999
3000 log->iocs[nvme_cmd_write] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC);
3001 log->iocs[nvme_cmd_write_zeroes] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC);
3002 log->iocs[nvme_cmd_write_uncor] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC);
3003 }
3004
nvme_init_effects(struct nvme_ctrl * ctrl,struct nvme_id_ctrl * id)3005 static int nvme_init_effects(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
3006 {
3007 int ret = 0;
3008
3009 if (ctrl->effects)
3010 return 0;
3011
3012 if (id->lpa & NVME_CTRL_LPA_CMD_EFFECTS_LOG) {
3013 ret = nvme_get_effects_log(ctrl, NVME_CSI_NVM, &ctrl->effects);
3014 if (ret < 0)
3015 return ret;
3016 }
3017
3018 if (!ctrl->effects) {
3019 ret = nvme_init_effects_log(ctrl, NVME_CSI_NVM, &ctrl->effects);
3020 if (ret < 0)
3021 return ret;
3022 }
3023
3024 nvme_init_known_nvm_effects(ctrl);
3025 return 0;
3026 }
3027
nvme_init_identify(struct nvme_ctrl * ctrl)3028 static int nvme_init_identify(struct nvme_ctrl *ctrl)
3029 {
3030 struct nvme_id_ctrl *id;
3031 u32 max_hw_sectors;
3032 bool prev_apst_enabled;
3033 int ret;
3034
3035 ret = nvme_identify_ctrl(ctrl, &id);
3036 if (ret) {
3037 dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret);
3038 return -EIO;
3039 }
3040
3041 if (!(ctrl->ops->flags & NVME_F_FABRICS))
3042 ctrl->cntlid = le16_to_cpu(id->cntlid);
3043
3044 if (!ctrl->identified) {
3045 unsigned int i;
3046
3047 /*
3048 * Check for quirks. Quirk can depend on firmware version,
3049 * so, in principle, the set of quirks present can change
3050 * across a reset. As a possible future enhancement, we
3051 * could re-scan for quirks every time we reinitialize
3052 * the device, but we'd have to make sure that the driver
3053 * behaves intelligently if the quirks change.
3054 */
3055 for (i = 0; i < ARRAY_SIZE(core_quirks); i++) {
3056 if (quirk_matches(id, &core_quirks[i]))
3057 ctrl->quirks |= core_quirks[i].quirks;
3058 }
3059
3060 ret = nvme_init_subsystem(ctrl, id);
3061 if (ret)
3062 goto out_free;
3063
3064 ret = nvme_init_effects(ctrl, id);
3065 if (ret)
3066 goto out_free;
3067 }
3068 memcpy(ctrl->subsys->firmware_rev, id->fr,
3069 sizeof(ctrl->subsys->firmware_rev));
3070
3071 if (force_apst && (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) {
3072 dev_warn(ctrl->device, "forcibly allowing all power states due to nvme_core.force_apst -- use at your own risk\n");
3073 ctrl->quirks &= ~NVME_QUIRK_NO_DEEPEST_PS;
3074 }
3075
3076 ctrl->crdt[0] = le16_to_cpu(id->crdt1);
3077 ctrl->crdt[1] = le16_to_cpu(id->crdt2);
3078 ctrl->crdt[2] = le16_to_cpu(id->crdt3);
3079
3080 ctrl->oacs = le16_to_cpu(id->oacs);
3081 ctrl->oncs = le16_to_cpu(id->oncs);
3082 ctrl->mtfa = le16_to_cpu(id->mtfa);
3083 ctrl->oaes = le32_to_cpu(id->oaes);
3084 ctrl->wctemp = le16_to_cpu(id->wctemp);
3085 ctrl->cctemp = le16_to_cpu(id->cctemp);
3086
3087 atomic_set(&ctrl->abort_limit, id->acl + 1);
3088 ctrl->vwc = id->vwc;
3089 if (id->mdts)
3090 max_hw_sectors = nvme_mps_to_sectors(ctrl, id->mdts);
3091 else
3092 max_hw_sectors = UINT_MAX;
3093 ctrl->max_hw_sectors =
3094 min_not_zero(ctrl->max_hw_sectors, max_hw_sectors);
3095
3096 nvme_set_queue_limits(ctrl, ctrl->admin_q);
3097 ctrl->sgls = le32_to_cpu(id->sgls);
3098 ctrl->kas = le16_to_cpu(id->kas);
3099 ctrl->max_namespaces = le32_to_cpu(id->mnan);
3100 ctrl->ctratt = le32_to_cpu(id->ctratt);
3101
3102 ctrl->cntrltype = id->cntrltype;
3103 ctrl->dctype = id->dctype;
3104
3105 if (id->rtd3e) {
3106 /* us -> s */
3107 u32 transition_time = le32_to_cpu(id->rtd3e) / USEC_PER_SEC;
3108
3109 ctrl->shutdown_timeout = clamp_t(unsigned int, transition_time,
3110 shutdown_timeout, 60);
3111
3112 if (ctrl->shutdown_timeout != shutdown_timeout)
3113 dev_info(ctrl->device,
3114 "Shutdown timeout set to %u seconds\n",
3115 ctrl->shutdown_timeout);
3116 } else
3117 ctrl->shutdown_timeout = shutdown_timeout;
3118
3119 ctrl->npss = id->npss;
3120 ctrl->apsta = id->apsta;
3121 prev_apst_enabled = ctrl->apst_enabled;
3122 if (ctrl->quirks & NVME_QUIRK_NO_APST) {
3123 if (force_apst && id->apsta) {
3124 dev_warn(ctrl->device, "forcibly allowing APST due to nvme_core.force_apst -- use at your own risk\n");
3125 ctrl->apst_enabled = true;
3126 } else {
3127 ctrl->apst_enabled = false;
3128 }
3129 } else {
3130 ctrl->apst_enabled = id->apsta;
3131 }
3132 memcpy(ctrl->psd, id->psd, sizeof(ctrl->psd));
3133
3134 if (ctrl->ops->flags & NVME_F_FABRICS) {
3135 ctrl->icdoff = le16_to_cpu(id->icdoff);
3136 ctrl->ioccsz = le32_to_cpu(id->ioccsz);
3137 ctrl->iorcsz = le32_to_cpu(id->iorcsz);
3138 ctrl->maxcmd = le16_to_cpu(id->maxcmd);
3139
3140 /*
3141 * In fabrics we need to verify the cntlid matches the
3142 * admin connect
3143 */
3144 if (ctrl->cntlid != le16_to_cpu(id->cntlid)) {
3145 dev_err(ctrl->device,
3146 "Mismatching cntlid: Connect %u vs Identify "
3147 "%u, rejecting\n",
3148 ctrl->cntlid, le16_to_cpu(id->cntlid));
3149 ret = -EINVAL;
3150 goto out_free;
3151 }
3152
3153 if (!nvme_discovery_ctrl(ctrl) && !ctrl->kas) {
3154 dev_err(ctrl->device,
3155 "keep-alive support is mandatory for fabrics\n");
3156 ret = -EINVAL;
3157 goto out_free;
3158 }
3159 } else {
3160 ctrl->hmpre = le32_to_cpu(id->hmpre);
3161 ctrl->hmmin = le32_to_cpu(id->hmmin);
3162 ctrl->hmminds = le32_to_cpu(id->hmminds);
3163 ctrl->hmmaxd = le16_to_cpu(id->hmmaxd);
3164 }
3165
3166 ret = nvme_mpath_init_identify(ctrl, id);
3167 if (ret < 0)
3168 goto out_free;
3169
3170 if (ctrl->apst_enabled && !prev_apst_enabled)
3171 dev_pm_qos_expose_latency_tolerance(ctrl->device);
3172 else if (!ctrl->apst_enabled && prev_apst_enabled)
3173 dev_pm_qos_hide_latency_tolerance(ctrl->device);
3174
3175 out_free:
3176 kfree(id);
3177 return ret;
3178 }
3179
3180 /*
3181 * Initialize the cached copies of the Identify data and various controller
3182 * register in our nvme_ctrl structure. This should be called as soon as
3183 * the admin queue is fully up and running.
3184 */
nvme_init_ctrl_finish(struct nvme_ctrl * ctrl,bool was_suspended)3185 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended)
3186 {
3187 int ret;
3188
3189 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs);
3190 if (ret) {
3191 dev_err(ctrl->device, "Reading VS failed (%d)\n", ret);
3192 return ret;
3193 }
3194
3195 ctrl->sqsize = min_t(u16, NVME_CAP_MQES(ctrl->cap), ctrl->sqsize);
3196
3197 if (ctrl->vs >= NVME_VS(1, 1, 0))
3198 ctrl->subsystem = NVME_CAP_NSSRC(ctrl->cap);
3199
3200 ret = nvme_init_identify(ctrl);
3201 if (ret)
3202 return ret;
3203
3204 ret = nvme_configure_apst(ctrl);
3205 if (ret < 0)
3206 return ret;
3207
3208 ret = nvme_configure_timestamp(ctrl);
3209 if (ret < 0)
3210 return ret;
3211
3212 ret = nvme_configure_host_options(ctrl);
3213 if (ret < 0)
3214 return ret;
3215
3216 nvme_configure_opal(ctrl, was_suspended);
3217
3218 if (!ctrl->identified && !nvme_discovery_ctrl(ctrl)) {
3219 /*
3220 * Do not return errors unless we are in a controller reset,
3221 * the controller works perfectly fine without hwmon.
3222 */
3223 ret = nvme_hwmon_init(ctrl);
3224 if (ret == -EINTR)
3225 return ret;
3226 }
3227
3228 clear_bit(NVME_CTRL_DIRTY_CAPABILITY, &ctrl->flags);
3229 ctrl->identified = true;
3230
3231 return 0;
3232 }
3233 EXPORT_SYMBOL_GPL(nvme_init_ctrl_finish);
3234
nvme_dev_open(struct inode * inode,struct file * file)3235 static int nvme_dev_open(struct inode *inode, struct file *file)
3236 {
3237 struct nvme_ctrl *ctrl =
3238 container_of(inode->i_cdev, struct nvme_ctrl, cdev);
3239
3240 switch (nvme_ctrl_state(ctrl)) {
3241 case NVME_CTRL_LIVE:
3242 break;
3243 default:
3244 return -EWOULDBLOCK;
3245 }
3246
3247 nvme_get_ctrl(ctrl);
3248 if (!try_module_get(ctrl->ops->module)) {
3249 nvme_put_ctrl(ctrl);
3250 return -EINVAL;
3251 }
3252
3253 file->private_data = ctrl;
3254 return 0;
3255 }
3256
nvme_dev_release(struct inode * inode,struct file * file)3257 static int nvme_dev_release(struct inode *inode, struct file *file)
3258 {
3259 struct nvme_ctrl *ctrl =
3260 container_of(inode->i_cdev, struct nvme_ctrl, cdev);
3261
3262 module_put(ctrl->ops->module);
3263 nvme_put_ctrl(ctrl);
3264 return 0;
3265 }
3266
3267 static const struct file_operations nvme_dev_fops = {
3268 .owner = THIS_MODULE,
3269 .open = nvme_dev_open,
3270 .release = nvme_dev_release,
3271 .unlocked_ioctl = nvme_dev_ioctl,
3272 .compat_ioctl = compat_ptr_ioctl,
3273 .uring_cmd = nvme_dev_uring_cmd,
3274 };
3275
nvme_find_ns_head(struct nvme_ctrl * ctrl,unsigned nsid)3276 static struct nvme_ns_head *nvme_find_ns_head(struct nvme_ctrl *ctrl,
3277 unsigned nsid)
3278 {
3279 struct nvme_ns_head *h;
3280
3281 lockdep_assert_held(&ctrl->subsys->lock);
3282
3283 list_for_each_entry(h, &ctrl->subsys->nsheads, entry) {
3284 /*
3285 * Private namespaces can share NSIDs under some conditions.
3286 * In that case we can't use the same ns_head for namespaces
3287 * with the same NSID.
3288 */
3289 if (h->ns_id != nsid || !nvme_is_unique_nsid(ctrl, h))
3290 continue;
3291 if (!list_empty(&h->list) && nvme_tryget_ns_head(h))
3292 return h;
3293 }
3294
3295 return NULL;
3296 }
3297
nvme_subsys_check_duplicate_ids(struct nvme_subsystem * subsys,struct nvme_ns_ids * ids)3298 static int nvme_subsys_check_duplicate_ids(struct nvme_subsystem *subsys,
3299 struct nvme_ns_ids *ids)
3300 {
3301 bool has_uuid = !uuid_is_null(&ids->uuid);
3302 bool has_nguid = memchr_inv(ids->nguid, 0, sizeof(ids->nguid));
3303 bool has_eui64 = memchr_inv(ids->eui64, 0, sizeof(ids->eui64));
3304 struct nvme_ns_head *h;
3305
3306 lockdep_assert_held(&subsys->lock);
3307
3308 list_for_each_entry(h, &subsys->nsheads, entry) {
3309 if (has_uuid && uuid_equal(&ids->uuid, &h->ids.uuid))
3310 return -EINVAL;
3311 if (has_nguid &&
3312 memcmp(&ids->nguid, &h->ids.nguid, sizeof(ids->nguid)) == 0)
3313 return -EINVAL;
3314 if (has_eui64 &&
3315 memcmp(&ids->eui64, &h->ids.eui64, sizeof(ids->eui64)) == 0)
3316 return -EINVAL;
3317 }
3318
3319 return 0;
3320 }
3321
nvme_cdev_rel(struct device * dev)3322 static void nvme_cdev_rel(struct device *dev)
3323 {
3324 ida_free(&nvme_ns_chr_minor_ida, MINOR(dev->devt));
3325 }
3326
nvme_cdev_del(struct cdev * cdev,struct device * cdev_device)3327 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device)
3328 {
3329 cdev_device_del(cdev, cdev_device);
3330 put_device(cdev_device);
3331 }
3332
nvme_cdev_add(struct cdev * cdev,struct device * cdev_device,const struct file_operations * fops,struct module * owner)3333 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device,
3334 const struct file_operations *fops, struct module *owner)
3335 {
3336 int minor, ret;
3337
3338 minor = ida_alloc(&nvme_ns_chr_minor_ida, GFP_KERNEL);
3339 if (minor < 0)
3340 return minor;
3341 cdev_device->devt = MKDEV(MAJOR(nvme_ns_chr_devt), minor);
3342 cdev_device->class = nvme_ns_chr_class;
3343 cdev_device->release = nvme_cdev_rel;
3344 device_initialize(cdev_device);
3345 cdev_init(cdev, fops);
3346 cdev->owner = owner;
3347 ret = cdev_device_add(cdev, cdev_device);
3348 if (ret)
3349 put_device(cdev_device);
3350
3351 return ret;
3352 }
3353
nvme_ns_chr_open(struct inode * inode,struct file * file)3354 static int nvme_ns_chr_open(struct inode *inode, struct file *file)
3355 {
3356 return nvme_ns_open(container_of(inode->i_cdev, struct nvme_ns, cdev));
3357 }
3358
nvme_ns_chr_release(struct inode * inode,struct file * file)3359 static int nvme_ns_chr_release(struct inode *inode, struct file *file)
3360 {
3361 nvme_ns_release(container_of(inode->i_cdev, struct nvme_ns, cdev));
3362 return 0;
3363 }
3364
3365 static const struct file_operations nvme_ns_chr_fops = {
3366 .owner = THIS_MODULE,
3367 .open = nvme_ns_chr_open,
3368 .release = nvme_ns_chr_release,
3369 .unlocked_ioctl = nvme_ns_chr_ioctl,
3370 .compat_ioctl = compat_ptr_ioctl,
3371 .uring_cmd = nvme_ns_chr_uring_cmd,
3372 .uring_cmd_iopoll = nvme_ns_chr_uring_cmd_iopoll,
3373 };
3374
nvme_add_ns_cdev(struct nvme_ns * ns)3375 static int nvme_add_ns_cdev(struct nvme_ns *ns)
3376 {
3377 int ret;
3378
3379 ns->cdev_device.parent = ns->ctrl->device;
3380 ret = dev_set_name(&ns->cdev_device, "ng%dn%d",
3381 ns->ctrl->instance, ns->head->instance);
3382 if (ret)
3383 return ret;
3384
3385 return nvme_cdev_add(&ns->cdev, &ns->cdev_device, &nvme_ns_chr_fops,
3386 ns->ctrl->ops->module);
3387 }
3388
nvme_alloc_ns_head(struct nvme_ctrl * ctrl,struct nvme_ns_info * info)3389 static struct nvme_ns_head *nvme_alloc_ns_head(struct nvme_ctrl *ctrl,
3390 struct nvme_ns_info *info)
3391 {
3392 struct nvme_ns_head *head;
3393 size_t size = sizeof(*head);
3394 int ret = -ENOMEM;
3395
3396 #ifdef CONFIG_NVME_MULTIPATH
3397 size += num_possible_nodes() * sizeof(struct nvme_ns *);
3398 #endif
3399
3400 head = kzalloc(size, GFP_KERNEL);
3401 if (!head)
3402 goto out;
3403 ret = ida_alloc_min(&ctrl->subsys->ns_ida, 1, GFP_KERNEL);
3404 if (ret < 0)
3405 goto out_free_head;
3406 head->instance = ret;
3407 INIT_LIST_HEAD(&head->list);
3408 ret = init_srcu_struct(&head->srcu);
3409 if (ret)
3410 goto out_ida_remove;
3411 head->subsys = ctrl->subsys;
3412 head->ns_id = info->nsid;
3413 head->ids = info->ids;
3414 head->shared = info->is_shared;
3415 kref_init(&head->ref);
3416
3417 if (head->ids.csi) {
3418 ret = nvme_get_effects_log(ctrl, head->ids.csi, &head->effects);
3419 if (ret)
3420 goto out_cleanup_srcu;
3421 } else
3422 head->effects = ctrl->effects;
3423
3424 ret = nvme_mpath_alloc_disk(ctrl, head);
3425 if (ret)
3426 goto out_cleanup_srcu;
3427
3428 list_add_tail(&head->entry, &ctrl->subsys->nsheads);
3429
3430 kref_get(&ctrl->subsys->ref);
3431
3432 return head;
3433 out_cleanup_srcu:
3434 cleanup_srcu_struct(&head->srcu);
3435 out_ida_remove:
3436 ida_free(&ctrl->subsys->ns_ida, head->instance);
3437 out_free_head:
3438 kfree(head);
3439 out:
3440 if (ret > 0)
3441 ret = blk_status_to_errno(nvme_error_status(ret));
3442 return ERR_PTR(ret);
3443 }
3444
nvme_global_check_duplicate_ids(struct nvme_subsystem * this,struct nvme_ns_ids * ids)3445 static int nvme_global_check_duplicate_ids(struct nvme_subsystem *this,
3446 struct nvme_ns_ids *ids)
3447 {
3448 struct nvme_subsystem *s;
3449 int ret = 0;
3450
3451 /*
3452 * Note that this check is racy as we try to avoid holding the global
3453 * lock over the whole ns_head creation. But it is only intended as
3454 * a sanity check anyway.
3455 */
3456 mutex_lock(&nvme_subsystems_lock);
3457 list_for_each_entry(s, &nvme_subsystems, entry) {
3458 if (s == this)
3459 continue;
3460 mutex_lock(&s->lock);
3461 ret = nvme_subsys_check_duplicate_ids(s, ids);
3462 mutex_unlock(&s->lock);
3463 if (ret)
3464 break;
3465 }
3466 mutex_unlock(&nvme_subsystems_lock);
3467
3468 return ret;
3469 }
3470
nvme_init_ns_head(struct nvme_ns * ns,struct nvme_ns_info * info)3471 static int nvme_init_ns_head(struct nvme_ns *ns, struct nvme_ns_info *info)
3472 {
3473 struct nvme_ctrl *ctrl = ns->ctrl;
3474 struct nvme_ns_head *head = NULL;
3475 int ret;
3476
3477 ret = nvme_global_check_duplicate_ids(ctrl->subsys, &info->ids);
3478 if (ret) {
3479 /*
3480 * We've found two different namespaces on two different
3481 * subsystems that report the same ID. This is pretty nasty
3482 * for anything that actually requires unique device
3483 * identification. In the kernel we need this for multipathing,
3484 * and in user space the /dev/disk/by-id/ links rely on it.
3485 *
3486 * If the device also claims to be multi-path capable back off
3487 * here now and refuse the probe the second device as this is a
3488 * recipe for data corruption. If not this is probably a
3489 * cheap consumer device if on the PCIe bus, so let the user
3490 * proceed and use the shiny toy, but warn that with changing
3491 * probing order (which due to our async probing could just be
3492 * device taking longer to startup) the other device could show
3493 * up at any time.
3494 */
3495 nvme_print_device_info(ctrl);
3496 if ((ns->ctrl->ops->flags & NVME_F_FABRICS) || /* !PCIe */
3497 ((ns->ctrl->subsys->cmic & NVME_CTRL_CMIC_MULTI_CTRL) &&
3498 info->is_shared)) {
3499 dev_err(ctrl->device,
3500 "ignoring nsid %d because of duplicate IDs\n",
3501 info->nsid);
3502 return ret;
3503 }
3504
3505 dev_err(ctrl->device,
3506 "clearing duplicate IDs for nsid %d\n", info->nsid);
3507 dev_err(ctrl->device,
3508 "use of /dev/disk/by-id/ may cause data corruption\n");
3509 memset(&info->ids.nguid, 0, sizeof(info->ids.nguid));
3510 memset(&info->ids.uuid, 0, sizeof(info->ids.uuid));
3511 memset(&info->ids.eui64, 0, sizeof(info->ids.eui64));
3512 ctrl->quirks |= NVME_QUIRK_BOGUS_NID;
3513 }
3514
3515 mutex_lock(&ctrl->subsys->lock);
3516 head = nvme_find_ns_head(ctrl, info->nsid);
3517 if (!head) {
3518 ret = nvme_subsys_check_duplicate_ids(ctrl->subsys, &info->ids);
3519 if (ret) {
3520 dev_err(ctrl->device,
3521 "duplicate IDs in subsystem for nsid %d\n",
3522 info->nsid);
3523 goto out_unlock;
3524 }
3525 head = nvme_alloc_ns_head(ctrl, info);
3526 if (IS_ERR(head)) {
3527 ret = PTR_ERR(head);
3528 goto out_unlock;
3529 }
3530 } else {
3531 ret = -EINVAL;
3532 if (!info->is_shared || !head->shared) {
3533 dev_err(ctrl->device,
3534 "Duplicate unshared namespace %d\n",
3535 info->nsid);
3536 goto out_put_ns_head;
3537 }
3538 if (!nvme_ns_ids_equal(&head->ids, &info->ids)) {
3539 dev_err(ctrl->device,
3540 "IDs don't match for shared namespace %d\n",
3541 info->nsid);
3542 goto out_put_ns_head;
3543 }
3544
3545 if (!multipath) {
3546 dev_warn(ctrl->device,
3547 "Found shared namespace %d, but multipathing not supported.\n",
3548 info->nsid);
3549 dev_warn_once(ctrl->device,
3550 "Support for shared namespaces without CONFIG_NVME_MULTIPATH is deprecated and will be removed in Linux 6.0.\n");
3551 }
3552 }
3553
3554 list_add_tail_rcu(&ns->siblings, &head->list);
3555 ns->head = head;
3556 mutex_unlock(&ctrl->subsys->lock);
3557 return 0;
3558
3559 out_put_ns_head:
3560 nvme_put_ns_head(head);
3561 out_unlock:
3562 mutex_unlock(&ctrl->subsys->lock);
3563 return ret;
3564 }
3565
nvme_find_get_ns(struct nvme_ctrl * ctrl,unsigned nsid)3566 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid)
3567 {
3568 struct nvme_ns *ns, *ret = NULL;
3569 int srcu_idx;
3570
3571 srcu_idx = srcu_read_lock(&ctrl->srcu);
3572 list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
3573 srcu_read_lock_held(&ctrl->srcu)) {
3574 if (ns->head->ns_id == nsid) {
3575 if (!nvme_get_ns(ns))
3576 continue;
3577 ret = ns;
3578 break;
3579 }
3580 if (ns->head->ns_id > nsid)
3581 break;
3582 }
3583 srcu_read_unlock(&ctrl->srcu, srcu_idx);
3584 return ret;
3585 }
3586 EXPORT_SYMBOL_NS_GPL(nvme_find_get_ns, NVME_TARGET_PASSTHRU);
3587
3588 /*
3589 * Add the namespace to the controller list while keeping the list ordered.
3590 */
nvme_ns_add_to_ctrl_list(struct nvme_ns * ns)3591 static void nvme_ns_add_to_ctrl_list(struct nvme_ns *ns)
3592 {
3593 struct nvme_ns *tmp;
3594
3595 list_for_each_entry_reverse(tmp, &ns->ctrl->namespaces, list) {
3596 if (tmp->head->ns_id < ns->head->ns_id) {
3597 list_add_rcu(&ns->list, &tmp->list);
3598 return;
3599 }
3600 }
3601 list_add(&ns->list, &ns->ctrl->namespaces);
3602 }
3603
nvme_alloc_ns(struct nvme_ctrl * ctrl,struct nvme_ns_info * info)3604 static void nvme_alloc_ns(struct nvme_ctrl *ctrl, struct nvme_ns_info *info)
3605 {
3606 struct nvme_ns *ns;
3607 struct gendisk *disk;
3608 int node = ctrl->numa_node;
3609
3610 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
3611 if (!ns)
3612 return;
3613
3614 disk = blk_mq_alloc_disk(ctrl->tagset, ns);
3615 if (IS_ERR(disk))
3616 goto out_free_ns;
3617 disk->fops = &nvme_bdev_ops;
3618 disk->private_data = ns;
3619
3620 ns->disk = disk;
3621 ns->queue = disk->queue;
3622
3623 if (ctrl->opts && ctrl->opts->data_digest)
3624 blk_queue_flag_set(QUEUE_FLAG_STABLE_WRITES, ns->queue);
3625
3626 blk_queue_flag_set(QUEUE_FLAG_NONROT, ns->queue);
3627 if (ctrl->ops->supports_pci_p2pdma &&
3628 ctrl->ops->supports_pci_p2pdma(ctrl))
3629 blk_queue_flag_set(QUEUE_FLAG_PCI_P2PDMA, ns->queue);
3630
3631 ns->ctrl = ctrl;
3632 kref_init(&ns->kref);
3633
3634 if (nvme_init_ns_head(ns, info))
3635 goto out_cleanup_disk;
3636
3637 /*
3638 * If multipathing is enabled, the device name for all disks and not
3639 * just those that represent shared namespaces needs to be based on the
3640 * subsystem instance. Using the controller instance for private
3641 * namespaces could lead to naming collisions between shared and private
3642 * namespaces if they don't use a common numbering scheme.
3643 *
3644 * If multipathing is not enabled, disk names must use the controller
3645 * instance as shared namespaces will show up as multiple block
3646 * devices.
3647 */
3648 if (nvme_ns_head_multipath(ns->head)) {
3649 sprintf(disk->disk_name, "nvme%dc%dn%d", ctrl->subsys->instance,
3650 ctrl->instance, ns->head->instance);
3651 disk->flags |= GENHD_FL_HIDDEN;
3652 } else if (multipath) {
3653 sprintf(disk->disk_name, "nvme%dn%d", ctrl->subsys->instance,
3654 ns->head->instance);
3655 } else {
3656 sprintf(disk->disk_name, "nvme%dn%d", ctrl->instance,
3657 ns->head->instance);
3658 }
3659
3660 if (nvme_update_ns_info(ns, info))
3661 goto out_unlink_ns;
3662
3663 mutex_lock(&ctrl->namespaces_lock);
3664 /*
3665 * Ensure that no namespaces are added to the ctrl list after the queues
3666 * are frozen, thereby avoiding a deadlock between scan and reset.
3667 */
3668 if (test_bit(NVME_CTRL_FROZEN, &ctrl->flags)) {
3669 mutex_unlock(&ctrl->namespaces_lock);
3670 goto out_unlink_ns;
3671 }
3672 nvme_ns_add_to_ctrl_list(ns);
3673 mutex_unlock(&ctrl->namespaces_lock);
3674 synchronize_srcu(&ctrl->srcu);
3675 nvme_get_ctrl(ctrl);
3676
3677 if (device_add_disk(ctrl->device, ns->disk, nvme_ns_id_attr_groups))
3678 goto out_cleanup_ns_from_list;
3679
3680 if (!nvme_ns_head_multipath(ns->head))
3681 nvme_add_ns_cdev(ns);
3682
3683 nvme_mpath_add_disk(ns, info->anagrpid);
3684 nvme_fault_inject_init(&ns->fault_inject, ns->disk->disk_name);
3685
3686 return;
3687
3688 out_cleanup_ns_from_list:
3689 nvme_put_ctrl(ctrl);
3690 mutex_lock(&ctrl->namespaces_lock);
3691 list_del_rcu(&ns->list);
3692 mutex_unlock(&ctrl->namespaces_lock);
3693 synchronize_srcu(&ctrl->srcu);
3694 out_unlink_ns:
3695 mutex_lock(&ctrl->subsys->lock);
3696 list_del_rcu(&ns->siblings);
3697 if (list_empty(&ns->head->list))
3698 list_del_init(&ns->head->entry);
3699 mutex_unlock(&ctrl->subsys->lock);
3700 nvme_put_ns_head(ns->head);
3701 out_cleanup_disk:
3702 put_disk(disk);
3703 out_free_ns:
3704 kfree(ns);
3705 }
3706
nvme_ns_remove(struct nvme_ns * ns)3707 static void nvme_ns_remove(struct nvme_ns *ns)
3708 {
3709 bool last_path = false;
3710
3711 if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags))
3712 return;
3713
3714 clear_bit(NVME_NS_READY, &ns->flags);
3715 set_capacity(ns->disk, 0);
3716 nvme_fault_inject_fini(&ns->fault_inject);
3717
3718 /*
3719 * Ensure that !NVME_NS_READY is seen by other threads to prevent
3720 * this ns going back into current_path.
3721 */
3722 synchronize_srcu(&ns->head->srcu);
3723
3724 /* wait for concurrent submissions */
3725 if (nvme_mpath_clear_current_path(ns))
3726 synchronize_srcu(&ns->head->srcu);
3727
3728 mutex_lock(&ns->ctrl->subsys->lock);
3729 list_del_rcu(&ns->siblings);
3730 if (list_empty(&ns->head->list)) {
3731 list_del_init(&ns->head->entry);
3732 last_path = true;
3733 }
3734 mutex_unlock(&ns->ctrl->subsys->lock);
3735
3736 /* guarantee not available in head->list */
3737 synchronize_srcu(&ns->head->srcu);
3738
3739 if (!nvme_ns_head_multipath(ns->head))
3740 nvme_cdev_del(&ns->cdev, &ns->cdev_device);
3741 del_gendisk(ns->disk);
3742
3743 mutex_lock(&ns->ctrl->namespaces_lock);
3744 list_del_rcu(&ns->list);
3745 mutex_unlock(&ns->ctrl->namespaces_lock);
3746 synchronize_srcu(&ns->ctrl->srcu);
3747
3748 if (last_path)
3749 nvme_mpath_shutdown_disk(ns->head);
3750 nvme_put_ns(ns);
3751 }
3752
nvme_ns_remove_by_nsid(struct nvme_ctrl * ctrl,u32 nsid)3753 static void nvme_ns_remove_by_nsid(struct nvme_ctrl *ctrl, u32 nsid)
3754 {
3755 struct nvme_ns *ns = nvme_find_get_ns(ctrl, nsid);
3756
3757 if (ns) {
3758 nvme_ns_remove(ns);
3759 nvme_put_ns(ns);
3760 }
3761 }
3762
nvme_validate_ns(struct nvme_ns * ns,struct nvme_ns_info * info)3763 static void nvme_validate_ns(struct nvme_ns *ns, struct nvme_ns_info *info)
3764 {
3765 int ret = NVME_SC_INVALID_NS | NVME_SC_DNR;
3766
3767 if (!nvme_ns_ids_equal(&ns->head->ids, &info->ids)) {
3768 dev_err(ns->ctrl->device,
3769 "identifiers changed for nsid %d\n", ns->head->ns_id);
3770 goto out;
3771 }
3772
3773 ret = nvme_update_ns_info(ns, info);
3774 out:
3775 /*
3776 * Only remove the namespace if we got a fatal error back from the
3777 * device, otherwise ignore the error and just move on.
3778 *
3779 * TODO: we should probably schedule a delayed retry here.
3780 */
3781 if (ret > 0 && (ret & NVME_SC_DNR))
3782 nvme_ns_remove(ns);
3783 }
3784
nvme_scan_ns(struct nvme_ctrl * ctrl,unsigned nsid)3785 static void nvme_scan_ns(struct nvme_ctrl *ctrl, unsigned nsid)
3786 {
3787 struct nvme_ns_info info = { .nsid = nsid };
3788 struct nvme_ns *ns;
3789 int ret;
3790
3791 if (nvme_identify_ns_descs(ctrl, &info))
3792 return;
3793
3794 if (info.ids.csi != NVME_CSI_NVM && !nvme_multi_css(ctrl)) {
3795 dev_warn(ctrl->device,
3796 "command set not reported for nsid: %d\n", nsid);
3797 return;
3798 }
3799
3800 /*
3801 * If available try to use the Command Set Idependent Identify Namespace
3802 * data structure to find all the generic information that is needed to
3803 * set up a namespace. If not fall back to the legacy version.
3804 */
3805 if ((ctrl->cap & NVME_CAP_CRMS_CRIMS) ||
3806 (info.ids.csi != NVME_CSI_NVM && info.ids.csi != NVME_CSI_ZNS))
3807 ret = nvme_ns_info_from_id_cs_indep(ctrl, &info);
3808 else
3809 ret = nvme_ns_info_from_identify(ctrl, &info);
3810
3811 if (info.is_removed)
3812 nvme_ns_remove_by_nsid(ctrl, nsid);
3813
3814 /*
3815 * Ignore the namespace if it is not ready. We will get an AEN once it
3816 * becomes ready and restart the scan.
3817 */
3818 if (ret || !info.is_ready)
3819 return;
3820
3821 ns = nvme_find_get_ns(ctrl, nsid);
3822 if (ns) {
3823 nvme_validate_ns(ns, &info);
3824 nvme_put_ns(ns);
3825 } else {
3826 nvme_alloc_ns(ctrl, &info);
3827 }
3828 }
3829
nvme_remove_invalid_namespaces(struct nvme_ctrl * ctrl,unsigned nsid)3830 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl,
3831 unsigned nsid)
3832 {
3833 struct nvme_ns *ns, *next;
3834 LIST_HEAD(rm_list);
3835
3836 mutex_lock(&ctrl->namespaces_lock);
3837 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) {
3838 if (ns->head->ns_id > nsid) {
3839 list_del_rcu(&ns->list);
3840 synchronize_srcu(&ctrl->srcu);
3841 list_add_tail_rcu(&ns->list, &rm_list);
3842 }
3843 }
3844 mutex_unlock(&ctrl->namespaces_lock);
3845
3846 list_for_each_entry_safe(ns, next, &rm_list, list)
3847 nvme_ns_remove(ns);
3848 }
3849
nvme_scan_ns_list(struct nvme_ctrl * ctrl)3850 static int nvme_scan_ns_list(struct nvme_ctrl *ctrl)
3851 {
3852 const int nr_entries = NVME_IDENTIFY_DATA_SIZE / sizeof(__le32);
3853 __le32 *ns_list;
3854 u32 prev = 0;
3855 int ret = 0, i;
3856
3857 ns_list = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL);
3858 if (!ns_list)
3859 return -ENOMEM;
3860
3861 for (;;) {
3862 struct nvme_command cmd = {
3863 .identify.opcode = nvme_admin_identify,
3864 .identify.cns = NVME_ID_CNS_NS_ACTIVE_LIST,
3865 .identify.nsid = cpu_to_le32(prev),
3866 };
3867
3868 ret = nvme_submit_sync_cmd(ctrl->admin_q, &cmd, ns_list,
3869 NVME_IDENTIFY_DATA_SIZE);
3870 if (ret) {
3871 dev_warn(ctrl->device,
3872 "Identify NS List failed (status=0x%x)\n", ret);
3873 goto free;
3874 }
3875
3876 for (i = 0; i < nr_entries; i++) {
3877 u32 nsid = le32_to_cpu(ns_list[i]);
3878
3879 if (!nsid) /* end of the list? */
3880 goto out;
3881 nvme_scan_ns(ctrl, nsid);
3882 while (++prev < nsid)
3883 nvme_ns_remove_by_nsid(ctrl, prev);
3884 }
3885 }
3886 out:
3887 nvme_remove_invalid_namespaces(ctrl, prev);
3888 free:
3889 kfree(ns_list);
3890 return ret;
3891 }
3892
nvme_scan_ns_sequential(struct nvme_ctrl * ctrl)3893 static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl)
3894 {
3895 struct nvme_id_ctrl *id;
3896 u32 nn, i;
3897
3898 if (nvme_identify_ctrl(ctrl, &id))
3899 return;
3900 nn = le32_to_cpu(id->nn);
3901 kfree(id);
3902
3903 for (i = 1; i <= nn; i++)
3904 nvme_scan_ns(ctrl, i);
3905
3906 nvme_remove_invalid_namespaces(ctrl, nn);
3907 }
3908
nvme_clear_changed_ns_log(struct nvme_ctrl * ctrl)3909 static void nvme_clear_changed_ns_log(struct nvme_ctrl *ctrl)
3910 {
3911 size_t log_size = NVME_MAX_CHANGED_NAMESPACES * sizeof(__le32);
3912 __le32 *log;
3913 int error;
3914
3915 log = kzalloc(log_size, GFP_KERNEL);
3916 if (!log)
3917 return;
3918
3919 /*
3920 * We need to read the log to clear the AEN, but we don't want to rely
3921 * on it for the changed namespace information as userspace could have
3922 * raced with us in reading the log page, which could cause us to miss
3923 * updates.
3924 */
3925 error = nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_CHANGED_NS, 0,
3926 NVME_CSI_NVM, log, log_size, 0);
3927 if (error)
3928 dev_warn(ctrl->device,
3929 "reading changed ns log failed: %d\n", error);
3930
3931 kfree(log);
3932 }
3933
nvme_scan_work(struct work_struct * work)3934 static void nvme_scan_work(struct work_struct *work)
3935 {
3936 struct nvme_ctrl *ctrl =
3937 container_of(work, struct nvme_ctrl, scan_work);
3938 int ret;
3939
3940 /* No tagset on a live ctrl means IO queues could not created */
3941 if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE || !ctrl->tagset)
3942 return;
3943
3944 /*
3945 * Identify controller limits can change at controller reset due to
3946 * new firmware download, even though it is not common we cannot ignore
3947 * such scenario. Controller's non-mdts limits are reported in the unit
3948 * of logical blocks that is dependent on the format of attached
3949 * namespace. Hence re-read the limits at the time of ns allocation.
3950 */
3951 ret = nvme_init_non_mdts_limits(ctrl);
3952 if (ret < 0) {
3953 dev_warn(ctrl->device,
3954 "reading non-mdts-limits failed: %d\n", ret);
3955 return;
3956 }
3957
3958 if (test_and_clear_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events)) {
3959 dev_info(ctrl->device, "rescanning namespaces.\n");
3960 nvme_clear_changed_ns_log(ctrl);
3961 }
3962
3963 mutex_lock(&ctrl->scan_lock);
3964 if (nvme_ctrl_limited_cns(ctrl)) {
3965 nvme_scan_ns_sequential(ctrl);
3966 } else {
3967 /*
3968 * Fall back to sequential scan if DNR is set to handle broken
3969 * devices which should support Identify NS List (as per the VS
3970 * they report) but don't actually support it.
3971 */
3972 ret = nvme_scan_ns_list(ctrl);
3973 if (ret > 0 && ret & NVME_SC_DNR)
3974 nvme_scan_ns_sequential(ctrl);
3975 }
3976 mutex_unlock(&ctrl->scan_lock);
3977 }
3978
3979 /*
3980 * This function iterates the namespace list unlocked to allow recovery from
3981 * controller failure. It is up to the caller to ensure the namespace list is
3982 * not modified by scan work while this function is executing.
3983 */
nvme_remove_namespaces(struct nvme_ctrl * ctrl)3984 void nvme_remove_namespaces(struct nvme_ctrl *ctrl)
3985 {
3986 struct nvme_ns *ns, *next;
3987 LIST_HEAD(ns_list);
3988
3989 /*
3990 * make sure to requeue I/O to all namespaces as these
3991 * might result from the scan itself and must complete
3992 * for the scan_work to make progress
3993 */
3994 nvme_mpath_clear_ctrl_paths(ctrl);
3995
3996 /*
3997 * Unquiesce io queues so any pending IO won't hang, especially
3998 * those submitted from scan work
3999 */
4000 nvme_unquiesce_io_queues(ctrl);
4001
4002 /* prevent racing with ns scanning */
4003 flush_work(&ctrl->scan_work);
4004
4005 /*
4006 * The dead states indicates the controller was not gracefully
4007 * disconnected. In that case, we won't be able to flush any data while
4008 * removing the namespaces' disks; fail all the queues now to avoid
4009 * potentially having to clean up the failed sync later.
4010 */
4011 if (nvme_ctrl_state(ctrl) == NVME_CTRL_DEAD)
4012 nvme_mark_namespaces_dead(ctrl);
4013
4014 /* this is a no-op when called from the controller reset handler */
4015 nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING_NOIO);
4016
4017 mutex_lock(&ctrl->namespaces_lock);
4018 list_splice_init_rcu(&ctrl->namespaces, &ns_list, synchronize_rcu);
4019 mutex_unlock(&ctrl->namespaces_lock);
4020 synchronize_srcu(&ctrl->srcu);
4021
4022 list_for_each_entry_safe(ns, next, &ns_list, list)
4023 nvme_ns_remove(ns);
4024 }
4025 EXPORT_SYMBOL_GPL(nvme_remove_namespaces);
4026
nvme_class_uevent(const struct device * dev,struct kobj_uevent_env * env)4027 static int nvme_class_uevent(const struct device *dev, struct kobj_uevent_env *env)
4028 {
4029 const struct nvme_ctrl *ctrl =
4030 container_of(dev, struct nvme_ctrl, ctrl_device);
4031 struct nvmf_ctrl_options *opts = ctrl->opts;
4032 int ret;
4033
4034 ret = add_uevent_var(env, "NVME_TRTYPE=%s", ctrl->ops->name);
4035 if (ret)
4036 return ret;
4037
4038 if (opts) {
4039 ret = add_uevent_var(env, "NVME_TRADDR=%s", opts->traddr);
4040 if (ret)
4041 return ret;
4042
4043 ret = add_uevent_var(env, "NVME_TRSVCID=%s",
4044 opts->trsvcid ?: "none");
4045 if (ret)
4046 return ret;
4047
4048 ret = add_uevent_var(env, "NVME_HOST_TRADDR=%s",
4049 opts->host_traddr ?: "none");
4050 if (ret)
4051 return ret;
4052
4053 ret = add_uevent_var(env, "NVME_HOST_IFACE=%s",
4054 opts->host_iface ?: "none");
4055 }
4056 return ret;
4057 }
4058
nvme_change_uevent(struct nvme_ctrl * ctrl,char * envdata)4059 static void nvme_change_uevent(struct nvme_ctrl *ctrl, char *envdata)
4060 {
4061 char *envp[2] = { envdata, NULL };
4062
4063 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp);
4064 }
4065
nvme_aen_uevent(struct nvme_ctrl * ctrl)4066 static void nvme_aen_uevent(struct nvme_ctrl *ctrl)
4067 {
4068 char *envp[2] = { NULL, NULL };
4069 u32 aen_result = ctrl->aen_result;
4070
4071 ctrl->aen_result = 0;
4072 if (!aen_result)
4073 return;
4074
4075 envp[0] = kasprintf(GFP_KERNEL, "NVME_AEN=%#08x", aen_result);
4076 if (!envp[0])
4077 return;
4078 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp);
4079 kfree(envp[0]);
4080 }
4081
nvme_async_event_work(struct work_struct * work)4082 static void nvme_async_event_work(struct work_struct *work)
4083 {
4084 struct nvme_ctrl *ctrl =
4085 container_of(work, struct nvme_ctrl, async_event_work);
4086
4087 nvme_aen_uevent(ctrl);
4088
4089 /*
4090 * The transport drivers must guarantee AER submission here is safe by
4091 * flushing ctrl async_event_work after changing the controller state
4092 * from LIVE and before freeing the admin queue.
4093 */
4094 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE)
4095 ctrl->ops->submit_async_event(ctrl);
4096 }
4097
nvme_ctrl_pp_status(struct nvme_ctrl * ctrl)4098 static bool nvme_ctrl_pp_status(struct nvme_ctrl *ctrl)
4099 {
4100
4101 u32 csts;
4102
4103 if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts))
4104 return false;
4105
4106 if (csts == ~0)
4107 return false;
4108
4109 return ((ctrl->ctrl_config & NVME_CC_ENABLE) && (csts & NVME_CSTS_PP));
4110 }
4111
nvme_get_fw_slot_info(struct nvme_ctrl * ctrl)4112 static void nvme_get_fw_slot_info(struct nvme_ctrl *ctrl)
4113 {
4114 struct nvme_fw_slot_info_log *log;
4115
4116 log = kmalloc(sizeof(*log), GFP_KERNEL);
4117 if (!log)
4118 return;
4119
4120 if (nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_FW_SLOT, 0, NVME_CSI_NVM,
4121 log, sizeof(*log), 0))
4122 dev_warn(ctrl->device, "Get FW SLOT INFO log error\n");
4123 kfree(log);
4124 }
4125
nvme_fw_act_work(struct work_struct * work)4126 static void nvme_fw_act_work(struct work_struct *work)
4127 {
4128 struct nvme_ctrl *ctrl = container_of(work,
4129 struct nvme_ctrl, fw_act_work);
4130 unsigned long fw_act_timeout;
4131
4132 nvme_auth_stop(ctrl);
4133
4134 if (ctrl->mtfa)
4135 fw_act_timeout = jiffies +
4136 msecs_to_jiffies(ctrl->mtfa * 100);
4137 else
4138 fw_act_timeout = jiffies +
4139 msecs_to_jiffies(admin_timeout * 1000);
4140
4141 nvme_quiesce_io_queues(ctrl);
4142 while (nvme_ctrl_pp_status(ctrl)) {
4143 if (time_after(jiffies, fw_act_timeout)) {
4144 dev_warn(ctrl->device,
4145 "Fw activation timeout, reset controller\n");
4146 nvme_try_sched_reset(ctrl);
4147 return;
4148 }
4149 msleep(100);
4150 }
4151
4152 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_LIVE))
4153 return;
4154
4155 nvme_unquiesce_io_queues(ctrl);
4156 /* read FW slot information to clear the AER */
4157 nvme_get_fw_slot_info(ctrl);
4158
4159 queue_work(nvme_wq, &ctrl->async_event_work);
4160 }
4161
nvme_aer_type(u32 result)4162 static u32 nvme_aer_type(u32 result)
4163 {
4164 return result & 0x7;
4165 }
4166
nvme_aer_subtype(u32 result)4167 static u32 nvme_aer_subtype(u32 result)
4168 {
4169 return (result & 0xff00) >> 8;
4170 }
4171
nvme_handle_aen_notice(struct nvme_ctrl * ctrl,u32 result)4172 static bool nvme_handle_aen_notice(struct nvme_ctrl *ctrl, u32 result)
4173 {
4174 u32 aer_notice_type = nvme_aer_subtype(result);
4175 bool requeue = true;
4176
4177 switch (aer_notice_type) {
4178 case NVME_AER_NOTICE_NS_CHANGED:
4179 set_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events);
4180 nvme_queue_scan(ctrl);
4181 break;
4182 case NVME_AER_NOTICE_FW_ACT_STARTING:
4183 /*
4184 * We are (ab)using the RESETTING state to prevent subsequent
4185 * recovery actions from interfering with the controller's
4186 * firmware activation.
4187 */
4188 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) {
4189 requeue = false;
4190 queue_work(nvme_wq, &ctrl->fw_act_work);
4191 }
4192 break;
4193 #ifdef CONFIG_NVME_MULTIPATH
4194 case NVME_AER_NOTICE_ANA:
4195 if (!ctrl->ana_log_buf)
4196 break;
4197 queue_work(nvme_wq, &ctrl->ana_work);
4198 break;
4199 #endif
4200 case NVME_AER_NOTICE_DISC_CHANGED:
4201 ctrl->aen_result = result;
4202 break;
4203 default:
4204 dev_warn(ctrl->device, "async event result %08x\n", result);
4205 }
4206 return requeue;
4207 }
4208
nvme_handle_aer_persistent_error(struct nvme_ctrl * ctrl)4209 static void nvme_handle_aer_persistent_error(struct nvme_ctrl *ctrl)
4210 {
4211 dev_warn(ctrl->device, "resetting controller due to AER\n");
4212 nvme_reset_ctrl(ctrl);
4213 }
4214
nvme_complete_async_event(struct nvme_ctrl * ctrl,__le16 status,volatile union nvme_result * res)4215 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
4216 volatile union nvme_result *res)
4217 {
4218 u32 result = le32_to_cpu(res->u32);
4219 u32 aer_type = nvme_aer_type(result);
4220 u32 aer_subtype = nvme_aer_subtype(result);
4221 bool requeue = true;
4222
4223 if (le16_to_cpu(status) >> 1 != NVME_SC_SUCCESS)
4224 return;
4225
4226 trace_nvme_async_event(ctrl, result);
4227 switch (aer_type) {
4228 case NVME_AER_NOTICE:
4229 requeue = nvme_handle_aen_notice(ctrl, result);
4230 break;
4231 case NVME_AER_ERROR:
4232 /*
4233 * For a persistent internal error, don't run async_event_work
4234 * to submit a new AER. The controller reset will do it.
4235 */
4236 if (aer_subtype == NVME_AER_ERROR_PERSIST_INT_ERR) {
4237 nvme_handle_aer_persistent_error(ctrl);
4238 return;
4239 }
4240 fallthrough;
4241 case NVME_AER_SMART:
4242 case NVME_AER_CSS:
4243 case NVME_AER_VS:
4244 ctrl->aen_result = result;
4245 break;
4246 default:
4247 break;
4248 }
4249
4250 if (requeue)
4251 queue_work(nvme_wq, &ctrl->async_event_work);
4252 }
4253 EXPORT_SYMBOL_GPL(nvme_complete_async_event);
4254
nvme_alloc_admin_tag_set(struct nvme_ctrl * ctrl,struct blk_mq_tag_set * set,const struct blk_mq_ops * ops,unsigned int cmd_size)4255 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
4256 const struct blk_mq_ops *ops, unsigned int cmd_size)
4257 {
4258 int ret;
4259
4260 memset(set, 0, sizeof(*set));
4261 set->ops = ops;
4262 set->queue_depth = NVME_AQ_MQ_TAG_DEPTH;
4263 if (ctrl->ops->flags & NVME_F_FABRICS)
4264 /* Reserved for fabric connect and keep alive */
4265 set->reserved_tags = 2;
4266 set->numa_node = ctrl->numa_node;
4267 set->flags = BLK_MQ_F_NO_SCHED;
4268 if (ctrl->ops->flags & NVME_F_BLOCKING)
4269 set->flags |= BLK_MQ_F_BLOCKING;
4270 set->cmd_size = cmd_size;
4271 set->driver_data = ctrl;
4272 set->nr_hw_queues = 1;
4273 set->timeout = NVME_ADMIN_TIMEOUT;
4274 ret = blk_mq_alloc_tag_set(set);
4275 if (ret)
4276 return ret;
4277
4278 ctrl->admin_q = blk_mq_init_queue(set);
4279 if (IS_ERR(ctrl->admin_q)) {
4280 ret = PTR_ERR(ctrl->admin_q);
4281 goto out_free_tagset;
4282 }
4283
4284 if (ctrl->ops->flags & NVME_F_FABRICS) {
4285 ctrl->fabrics_q = blk_mq_init_queue(set);
4286 if (IS_ERR(ctrl->fabrics_q)) {
4287 ret = PTR_ERR(ctrl->fabrics_q);
4288 goto out_cleanup_admin_q;
4289 }
4290 }
4291
4292 ctrl->admin_tagset = set;
4293 return 0;
4294
4295 out_cleanup_admin_q:
4296 blk_mq_destroy_queue(ctrl->admin_q);
4297 blk_put_queue(ctrl->admin_q);
4298 out_free_tagset:
4299 blk_mq_free_tag_set(set);
4300 ctrl->admin_q = NULL;
4301 ctrl->fabrics_q = NULL;
4302 return ret;
4303 }
4304 EXPORT_SYMBOL_GPL(nvme_alloc_admin_tag_set);
4305
nvme_remove_admin_tag_set(struct nvme_ctrl * ctrl)4306 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl)
4307 {
4308 blk_mq_destroy_queue(ctrl->admin_q);
4309 blk_put_queue(ctrl->admin_q);
4310 if (ctrl->ops->flags & NVME_F_FABRICS) {
4311 blk_mq_destroy_queue(ctrl->fabrics_q);
4312 blk_put_queue(ctrl->fabrics_q);
4313 }
4314 blk_mq_free_tag_set(ctrl->admin_tagset);
4315 }
4316 EXPORT_SYMBOL_GPL(nvme_remove_admin_tag_set);
4317
nvme_alloc_io_tag_set(struct nvme_ctrl * ctrl,struct blk_mq_tag_set * set,const struct blk_mq_ops * ops,unsigned int nr_maps,unsigned int cmd_size)4318 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
4319 const struct blk_mq_ops *ops, unsigned int nr_maps,
4320 unsigned int cmd_size)
4321 {
4322 int ret;
4323
4324 memset(set, 0, sizeof(*set));
4325 set->ops = ops;
4326 set->queue_depth = min_t(unsigned, ctrl->sqsize, BLK_MQ_MAX_DEPTH - 1);
4327 /*
4328 * Some Apple controllers requires tags to be unique across admin and
4329 * the (only) I/O queue, so reserve the first 32 tags of the I/O queue.
4330 */
4331 if (ctrl->quirks & NVME_QUIRK_SHARED_TAGS)
4332 set->reserved_tags = NVME_AQ_DEPTH;
4333 else if (ctrl->ops->flags & NVME_F_FABRICS)
4334 /* Reserved for fabric connect */
4335 set->reserved_tags = 1;
4336 set->numa_node = ctrl->numa_node;
4337 set->flags = BLK_MQ_F_SHOULD_MERGE;
4338 if (ctrl->ops->flags & NVME_F_BLOCKING)
4339 set->flags |= BLK_MQ_F_BLOCKING;
4340 set->cmd_size = cmd_size,
4341 set->driver_data = ctrl;
4342 set->nr_hw_queues = ctrl->queue_count - 1;
4343 set->timeout = NVME_IO_TIMEOUT;
4344 set->nr_maps = nr_maps;
4345 ret = blk_mq_alloc_tag_set(set);
4346 if (ret)
4347 return ret;
4348
4349 if (ctrl->ops->flags & NVME_F_FABRICS) {
4350 ctrl->connect_q = blk_mq_init_queue(set);
4351 if (IS_ERR(ctrl->connect_q)) {
4352 ret = PTR_ERR(ctrl->connect_q);
4353 goto out_free_tag_set;
4354 }
4355 blk_queue_flag_set(QUEUE_FLAG_SKIP_TAGSET_QUIESCE,
4356 ctrl->connect_q);
4357 }
4358
4359 ctrl->tagset = set;
4360 return 0;
4361
4362 out_free_tag_set:
4363 blk_mq_free_tag_set(set);
4364 ctrl->connect_q = NULL;
4365 return ret;
4366 }
4367 EXPORT_SYMBOL_GPL(nvme_alloc_io_tag_set);
4368
nvme_remove_io_tag_set(struct nvme_ctrl * ctrl)4369 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl)
4370 {
4371 if (ctrl->ops->flags & NVME_F_FABRICS) {
4372 blk_mq_destroy_queue(ctrl->connect_q);
4373 blk_put_queue(ctrl->connect_q);
4374 }
4375 blk_mq_free_tag_set(ctrl->tagset);
4376 }
4377 EXPORT_SYMBOL_GPL(nvme_remove_io_tag_set);
4378
nvme_stop_ctrl(struct nvme_ctrl * ctrl)4379 void nvme_stop_ctrl(struct nvme_ctrl *ctrl)
4380 {
4381 nvme_mpath_stop(ctrl);
4382 nvme_auth_stop(ctrl);
4383 nvme_stop_keep_alive(ctrl);
4384 nvme_stop_failfast_work(ctrl);
4385 flush_work(&ctrl->async_event_work);
4386 cancel_work_sync(&ctrl->fw_act_work);
4387 if (ctrl->ops->stop_ctrl)
4388 ctrl->ops->stop_ctrl(ctrl);
4389 }
4390 EXPORT_SYMBOL_GPL(nvme_stop_ctrl);
4391
nvme_start_ctrl(struct nvme_ctrl * ctrl)4392 void nvme_start_ctrl(struct nvme_ctrl *ctrl)
4393 {
4394 nvme_start_keep_alive(ctrl);
4395
4396 nvme_enable_aen(ctrl);
4397
4398 /*
4399 * persistent discovery controllers need to send indication to userspace
4400 * to re-read the discovery log page to learn about possible changes
4401 * that were missed. We identify persistent discovery controllers by
4402 * checking that they started once before, hence are reconnecting back.
4403 */
4404 if (test_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags) &&
4405 nvme_discovery_ctrl(ctrl))
4406 nvme_change_uevent(ctrl, "NVME_EVENT=rediscover");
4407
4408 if (ctrl->queue_count > 1) {
4409 nvme_queue_scan(ctrl);
4410 nvme_unquiesce_io_queues(ctrl);
4411 nvme_mpath_update(ctrl);
4412 }
4413
4414 nvme_change_uevent(ctrl, "NVME_EVENT=connected");
4415 set_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags);
4416 }
4417 EXPORT_SYMBOL_GPL(nvme_start_ctrl);
4418
nvme_uninit_ctrl(struct nvme_ctrl * ctrl)4419 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl)
4420 {
4421 nvme_hwmon_exit(ctrl);
4422 nvme_fault_inject_fini(&ctrl->fault_inject);
4423 dev_pm_qos_hide_latency_tolerance(ctrl->device);
4424 cdev_device_del(&ctrl->cdev, ctrl->device);
4425 nvme_put_ctrl(ctrl);
4426 }
4427 EXPORT_SYMBOL_GPL(nvme_uninit_ctrl);
4428
nvme_free_cels(struct nvme_ctrl * ctrl)4429 static void nvme_free_cels(struct nvme_ctrl *ctrl)
4430 {
4431 struct nvme_effects_log *cel;
4432 unsigned long i;
4433
4434 xa_for_each(&ctrl->cels, i, cel) {
4435 xa_erase(&ctrl->cels, i);
4436 kfree(cel);
4437 }
4438
4439 xa_destroy(&ctrl->cels);
4440 }
4441
nvme_free_ctrl(struct device * dev)4442 static void nvme_free_ctrl(struct device *dev)
4443 {
4444 struct nvme_ctrl *ctrl =
4445 container_of(dev, struct nvme_ctrl, ctrl_device);
4446 struct nvme_subsystem *subsys = ctrl->subsys;
4447
4448 if (!subsys || ctrl->instance != subsys->instance)
4449 ida_free(&nvme_instance_ida, ctrl->instance);
4450
4451 nvme_free_cels(ctrl);
4452 nvme_mpath_uninit(ctrl);
4453 cleanup_srcu_struct(&ctrl->srcu);
4454 nvme_auth_stop(ctrl);
4455 nvme_auth_free(ctrl);
4456 __free_page(ctrl->discard_page);
4457 free_opal_dev(ctrl->opal_dev);
4458
4459 if (subsys) {
4460 mutex_lock(&nvme_subsystems_lock);
4461 list_del(&ctrl->subsys_entry);
4462 sysfs_remove_link(&subsys->dev.kobj, dev_name(ctrl->device));
4463 mutex_unlock(&nvme_subsystems_lock);
4464 }
4465
4466 ctrl->ops->free_ctrl(ctrl);
4467
4468 if (subsys)
4469 nvme_put_subsystem(subsys);
4470 }
4471
4472 /*
4473 * Initialize a NVMe controller structures. This needs to be called during
4474 * earliest initialization so that we have the initialized structured around
4475 * during probing.
4476 */
nvme_init_ctrl(struct nvme_ctrl * ctrl,struct device * dev,const struct nvme_ctrl_ops * ops,unsigned long quirks)4477 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
4478 const struct nvme_ctrl_ops *ops, unsigned long quirks)
4479 {
4480 int ret;
4481
4482 WRITE_ONCE(ctrl->state, NVME_CTRL_NEW);
4483 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags);
4484 spin_lock_init(&ctrl->lock);
4485 mutex_init(&ctrl->namespaces_lock);
4486
4487 ret = init_srcu_struct(&ctrl->srcu);
4488 if (ret)
4489 return ret;
4490
4491 mutex_init(&ctrl->scan_lock);
4492 INIT_LIST_HEAD(&ctrl->namespaces);
4493 xa_init(&ctrl->cels);
4494 ctrl->dev = dev;
4495 ctrl->ops = ops;
4496 ctrl->quirks = quirks;
4497 ctrl->numa_node = NUMA_NO_NODE;
4498 INIT_WORK(&ctrl->scan_work, nvme_scan_work);
4499 INIT_WORK(&ctrl->async_event_work, nvme_async_event_work);
4500 INIT_WORK(&ctrl->fw_act_work, nvme_fw_act_work);
4501 INIT_WORK(&ctrl->delete_work, nvme_delete_ctrl_work);
4502 init_waitqueue_head(&ctrl->state_wq);
4503
4504 INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work);
4505 INIT_DELAYED_WORK(&ctrl->failfast_work, nvme_failfast_work);
4506 memset(&ctrl->ka_cmd, 0, sizeof(ctrl->ka_cmd));
4507 ctrl->ka_cmd.common.opcode = nvme_admin_keep_alive;
4508
4509 BUILD_BUG_ON(NVME_DSM_MAX_RANGES * sizeof(struct nvme_dsm_range) >
4510 PAGE_SIZE);
4511 ctrl->discard_page = alloc_page(GFP_KERNEL);
4512 if (!ctrl->discard_page) {
4513 ret = -ENOMEM;
4514 goto out;
4515 }
4516
4517 ret = ida_alloc(&nvme_instance_ida, GFP_KERNEL);
4518 if (ret < 0)
4519 goto out;
4520 ctrl->instance = ret;
4521
4522 device_initialize(&ctrl->ctrl_device);
4523 ctrl->device = &ctrl->ctrl_device;
4524 ctrl->device->devt = MKDEV(MAJOR(nvme_ctrl_base_chr_devt),
4525 ctrl->instance);
4526 ctrl->device->class = nvme_class;
4527 ctrl->device->parent = ctrl->dev;
4528 if (ops->dev_attr_groups)
4529 ctrl->device->groups = ops->dev_attr_groups;
4530 else
4531 ctrl->device->groups = nvme_dev_attr_groups;
4532 ctrl->device->release = nvme_free_ctrl;
4533 dev_set_drvdata(ctrl->device, ctrl);
4534 ret = dev_set_name(ctrl->device, "nvme%d", ctrl->instance);
4535 if (ret)
4536 goto out_release_instance;
4537
4538 nvme_get_ctrl(ctrl);
4539 cdev_init(&ctrl->cdev, &nvme_dev_fops);
4540 ctrl->cdev.owner = ops->module;
4541 ret = cdev_device_add(&ctrl->cdev, ctrl->device);
4542 if (ret)
4543 goto out_free_name;
4544
4545 /*
4546 * Initialize latency tolerance controls. The sysfs files won't
4547 * be visible to userspace unless the device actually supports APST.
4548 */
4549 ctrl->device->power.set_latency_tolerance = nvme_set_latency_tolerance;
4550 dev_pm_qos_update_user_latency_tolerance(ctrl->device,
4551 min(default_ps_max_latency_us, (unsigned long)S32_MAX));
4552
4553 nvme_fault_inject_init(&ctrl->fault_inject, dev_name(ctrl->device));
4554 nvme_mpath_init_ctrl(ctrl);
4555 ret = nvme_auth_init_ctrl(ctrl);
4556 if (ret)
4557 goto out_free_cdev;
4558
4559 return 0;
4560 out_free_cdev:
4561 nvme_fault_inject_fini(&ctrl->fault_inject);
4562 dev_pm_qos_hide_latency_tolerance(ctrl->device);
4563 cdev_device_del(&ctrl->cdev, ctrl->device);
4564 out_free_name:
4565 nvme_put_ctrl(ctrl);
4566 kfree_const(ctrl->device->kobj.name);
4567 out_release_instance:
4568 ida_free(&nvme_instance_ida, ctrl->instance);
4569 out:
4570 if (ctrl->discard_page)
4571 __free_page(ctrl->discard_page);
4572 cleanup_srcu_struct(&ctrl->srcu);
4573 return ret;
4574 }
4575 EXPORT_SYMBOL_GPL(nvme_init_ctrl);
4576
4577 /* let I/O to all namespaces fail in preparation for surprise removal */
nvme_mark_namespaces_dead(struct nvme_ctrl * ctrl)4578 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl)
4579 {
4580 struct nvme_ns *ns;
4581 int srcu_idx;
4582
4583 srcu_idx = srcu_read_lock(&ctrl->srcu);
4584 list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
4585 srcu_read_lock_held(&ctrl->srcu))
4586 blk_mark_disk_dead(ns->disk);
4587 srcu_read_unlock(&ctrl->srcu, srcu_idx);
4588 }
4589 EXPORT_SYMBOL_GPL(nvme_mark_namespaces_dead);
4590
nvme_unfreeze(struct nvme_ctrl * ctrl)4591 void nvme_unfreeze(struct nvme_ctrl *ctrl)
4592 {
4593 struct nvme_ns *ns;
4594 int srcu_idx;
4595
4596 srcu_idx = srcu_read_lock(&ctrl->srcu);
4597 list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
4598 srcu_read_lock_held(&ctrl->srcu))
4599 blk_mq_unfreeze_queue(ns->queue);
4600 srcu_read_unlock(&ctrl->srcu, srcu_idx);
4601 clear_bit(NVME_CTRL_FROZEN, &ctrl->flags);
4602 }
4603 EXPORT_SYMBOL_GPL(nvme_unfreeze);
4604
nvme_wait_freeze_timeout(struct nvme_ctrl * ctrl,long timeout)4605 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout)
4606 {
4607 struct nvme_ns *ns;
4608 int srcu_idx;
4609
4610 srcu_idx = srcu_read_lock(&ctrl->srcu);
4611 list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
4612 srcu_read_lock_held(&ctrl->srcu)) {
4613 timeout = blk_mq_freeze_queue_wait_timeout(ns->queue, timeout);
4614 if (timeout <= 0)
4615 break;
4616 }
4617 srcu_read_unlock(&ctrl->srcu, srcu_idx);
4618 return timeout;
4619 }
4620 EXPORT_SYMBOL_GPL(nvme_wait_freeze_timeout);
4621
nvme_wait_freeze(struct nvme_ctrl * ctrl)4622 void nvme_wait_freeze(struct nvme_ctrl *ctrl)
4623 {
4624 struct nvme_ns *ns;
4625 int srcu_idx;
4626
4627 srcu_idx = srcu_read_lock(&ctrl->srcu);
4628 list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
4629 srcu_read_lock_held(&ctrl->srcu))
4630 blk_mq_freeze_queue_wait(ns->queue);
4631 srcu_read_unlock(&ctrl->srcu, srcu_idx);
4632 }
4633 EXPORT_SYMBOL_GPL(nvme_wait_freeze);
4634
nvme_start_freeze(struct nvme_ctrl * ctrl)4635 void nvme_start_freeze(struct nvme_ctrl *ctrl)
4636 {
4637 struct nvme_ns *ns;
4638 int srcu_idx;
4639
4640 set_bit(NVME_CTRL_FROZEN, &ctrl->flags);
4641 srcu_idx = srcu_read_lock(&ctrl->srcu);
4642 list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
4643 srcu_read_lock_held(&ctrl->srcu))
4644 blk_freeze_queue_start(ns->queue);
4645 srcu_read_unlock(&ctrl->srcu, srcu_idx);
4646 }
4647 EXPORT_SYMBOL_GPL(nvme_start_freeze);
4648
nvme_quiesce_io_queues(struct nvme_ctrl * ctrl)4649 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl)
4650 {
4651 if (!ctrl->tagset)
4652 return;
4653 if (!test_and_set_bit(NVME_CTRL_STOPPED, &ctrl->flags))
4654 blk_mq_quiesce_tagset(ctrl->tagset);
4655 else
4656 blk_mq_wait_quiesce_done(ctrl->tagset);
4657 }
4658 EXPORT_SYMBOL_GPL(nvme_quiesce_io_queues);
4659
nvme_unquiesce_io_queues(struct nvme_ctrl * ctrl)4660 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl)
4661 {
4662 if (!ctrl->tagset)
4663 return;
4664 if (test_and_clear_bit(NVME_CTRL_STOPPED, &ctrl->flags))
4665 blk_mq_unquiesce_tagset(ctrl->tagset);
4666 }
4667 EXPORT_SYMBOL_GPL(nvme_unquiesce_io_queues);
4668
nvme_quiesce_admin_queue(struct nvme_ctrl * ctrl)4669 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl)
4670 {
4671 if (!test_and_set_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags))
4672 blk_mq_quiesce_queue(ctrl->admin_q);
4673 else
4674 blk_mq_wait_quiesce_done(ctrl->admin_q->tag_set);
4675 }
4676 EXPORT_SYMBOL_GPL(nvme_quiesce_admin_queue);
4677
nvme_unquiesce_admin_queue(struct nvme_ctrl * ctrl)4678 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl)
4679 {
4680 if (test_and_clear_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags))
4681 blk_mq_unquiesce_queue(ctrl->admin_q);
4682 }
4683 EXPORT_SYMBOL_GPL(nvme_unquiesce_admin_queue);
4684
nvme_sync_io_queues(struct nvme_ctrl * ctrl)4685 void nvme_sync_io_queues(struct nvme_ctrl *ctrl)
4686 {
4687 struct nvme_ns *ns;
4688 int srcu_idx;
4689
4690 srcu_idx = srcu_read_lock(&ctrl->srcu);
4691 list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
4692 srcu_read_lock_held(&ctrl->srcu))
4693 blk_sync_queue(ns->queue);
4694 srcu_read_unlock(&ctrl->srcu, srcu_idx);
4695 }
4696 EXPORT_SYMBOL_GPL(nvme_sync_io_queues);
4697
nvme_sync_queues(struct nvme_ctrl * ctrl)4698 void nvme_sync_queues(struct nvme_ctrl *ctrl)
4699 {
4700 nvme_sync_io_queues(ctrl);
4701 if (ctrl->admin_q)
4702 blk_sync_queue(ctrl->admin_q);
4703 }
4704 EXPORT_SYMBOL_GPL(nvme_sync_queues);
4705
nvme_ctrl_from_file(struct file * file)4706 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file)
4707 {
4708 if (file->f_op != &nvme_dev_fops)
4709 return NULL;
4710 return file->private_data;
4711 }
4712 EXPORT_SYMBOL_NS_GPL(nvme_ctrl_from_file, NVME_TARGET_PASSTHRU);
4713
4714 /*
4715 * Check we didn't inadvertently grow the command structure sizes:
4716 */
_nvme_check_size(void)4717 static inline void _nvme_check_size(void)
4718 {
4719 BUILD_BUG_ON(sizeof(struct nvme_common_command) != 64);
4720 BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
4721 BUILD_BUG_ON(sizeof(struct nvme_identify) != 64);
4722 BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
4723 BUILD_BUG_ON(sizeof(struct nvme_download_firmware) != 64);
4724 BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
4725 BUILD_BUG_ON(sizeof(struct nvme_dsm_cmd) != 64);
4726 BUILD_BUG_ON(sizeof(struct nvme_write_zeroes_cmd) != 64);
4727 BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
4728 BUILD_BUG_ON(sizeof(struct nvme_get_log_page_command) != 64);
4729 BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
4730 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != NVME_IDENTIFY_DATA_SIZE);
4731 BUILD_BUG_ON(sizeof(struct nvme_id_ns) != NVME_IDENTIFY_DATA_SIZE);
4732 BUILD_BUG_ON(sizeof(struct nvme_id_ns_cs_indep) !=
4733 NVME_IDENTIFY_DATA_SIZE);
4734 BUILD_BUG_ON(sizeof(struct nvme_id_ns_zns) != NVME_IDENTIFY_DATA_SIZE);
4735 BUILD_BUG_ON(sizeof(struct nvme_id_ns_nvm) != NVME_IDENTIFY_DATA_SIZE);
4736 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_zns) != NVME_IDENTIFY_DATA_SIZE);
4737 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_nvm) != NVME_IDENTIFY_DATA_SIZE);
4738 BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
4739 BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
4740 BUILD_BUG_ON(sizeof(struct nvme_dbbuf) != 64);
4741 BUILD_BUG_ON(sizeof(struct nvme_directive_cmd) != 64);
4742 BUILD_BUG_ON(sizeof(struct nvme_feat_host_behavior) != 512);
4743 }
4744
4745
nvme_core_init(void)4746 static int __init nvme_core_init(void)
4747 {
4748 int result = -ENOMEM;
4749
4750 _nvme_check_size();
4751
4752 nvme_wq = alloc_workqueue("nvme-wq",
4753 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
4754 if (!nvme_wq)
4755 goto out;
4756
4757 nvme_reset_wq = alloc_workqueue("nvme-reset-wq",
4758 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
4759 if (!nvme_reset_wq)
4760 goto destroy_wq;
4761
4762 nvme_delete_wq = alloc_workqueue("nvme-delete-wq",
4763 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
4764 if (!nvme_delete_wq)
4765 goto destroy_reset_wq;
4766
4767 result = alloc_chrdev_region(&nvme_ctrl_base_chr_devt, 0,
4768 NVME_MINORS, "nvme");
4769 if (result < 0)
4770 goto destroy_delete_wq;
4771
4772 nvme_class = class_create("nvme");
4773 if (IS_ERR(nvme_class)) {
4774 result = PTR_ERR(nvme_class);
4775 goto unregister_chrdev;
4776 }
4777 nvme_class->dev_uevent = nvme_class_uevent;
4778
4779 nvme_subsys_class = class_create("nvme-subsystem");
4780 if (IS_ERR(nvme_subsys_class)) {
4781 result = PTR_ERR(nvme_subsys_class);
4782 goto destroy_class;
4783 }
4784
4785 result = alloc_chrdev_region(&nvme_ns_chr_devt, 0, NVME_MINORS,
4786 "nvme-generic");
4787 if (result < 0)
4788 goto destroy_subsys_class;
4789
4790 nvme_ns_chr_class = class_create("nvme-generic");
4791 if (IS_ERR(nvme_ns_chr_class)) {
4792 result = PTR_ERR(nvme_ns_chr_class);
4793 goto unregister_generic_ns;
4794 }
4795
4796 result = nvme_init_auth();
4797 if (result)
4798 goto destroy_ns_chr;
4799 return 0;
4800
4801 destroy_ns_chr:
4802 class_destroy(nvme_ns_chr_class);
4803 unregister_generic_ns:
4804 unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS);
4805 destroy_subsys_class:
4806 class_destroy(nvme_subsys_class);
4807 destroy_class:
4808 class_destroy(nvme_class);
4809 unregister_chrdev:
4810 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS);
4811 destroy_delete_wq:
4812 destroy_workqueue(nvme_delete_wq);
4813 destroy_reset_wq:
4814 destroy_workqueue(nvme_reset_wq);
4815 destroy_wq:
4816 destroy_workqueue(nvme_wq);
4817 out:
4818 return result;
4819 }
4820
nvme_core_exit(void)4821 static void __exit nvme_core_exit(void)
4822 {
4823 nvme_exit_auth();
4824 class_destroy(nvme_ns_chr_class);
4825 class_destroy(nvme_subsys_class);
4826 class_destroy(nvme_class);
4827 unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS);
4828 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS);
4829 destroy_workqueue(nvme_delete_wq);
4830 destroy_workqueue(nvme_reset_wq);
4831 destroy_workqueue(nvme_wq);
4832 ida_destroy(&nvme_ns_chr_minor_ida);
4833 ida_destroy(&nvme_instance_ida);
4834 }
4835
4836 MODULE_LICENSE("GPL");
4837 MODULE_VERSION("1.0");
4838 module_init(nvme_core_init);
4839 module_exit(nvme_core_exit);
4840