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Searched defs:num_parents (Results 1 – 25 of 136) sorted by relevance

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/openbmc/linux/drivers/clk/ti/
H A Dmux.c24 int num_parents = clk_hw_get_num_parents(hw); in ti_clk_mux_get_parent() local
123 u8 num_parents, unsigned long flags, in _register_mux()
169 unsigned int num_parents; in of_mux_clk_setup() local
225 int num_parents; in ti_clk_build_component_mux() local
254 unsigned int num_parents; in of_ti_composite_mux_clk_setup() local
H A Dcomposite.c54 int num_parents; member
118 int num_parents = 0; in _register_composite() local
239 unsigned int num_parents; in ti_clk_add_component() local
/openbmc/linux/drivers/clk/socfpga/
H A Dstratix10-clk.h20 u8 num_parents; member
30 u8 num_parents; member
40 u8 num_parents; member
51 u8 num_parents; member
64 u8 num_parents; member
/openbmc/linux/drivers/clk/imx/
H A Dclk-composite-7ulp.c70 int num_parents, bool mux_present, in imx_ulp_clk_hw_composite()
151 int num_parents, bool mux_present, bool rate_present, in imx7ulp_clk_hw_composite()
159 int num_parents, bool mux_present, bool rate_present, in imx8ulp_clk_hw_composite()
H A Dclk.h148 #define imx_clk_mux(name, reg, shift, width, parents, num_parents) \ argument
151 #define imx_clk_mux_flags(name, reg, shift, width, parents, num_parents, flags) \ argument
154 #define imx_clk_mux2_flags(name, reg, shift, width, parents, num_parents, flags) \ argument
199 #define imx_clk_hw_mux2(name, reg, shift, width, parents, num_parents) \ argument
202 #define imx_clk_hw_mux(name, reg, shift, width, parents, num_parents) \ argument
205 #define imx_clk_hw_mux_flags(name, reg, shift, width, parents, num_parents, flags) \ argument
208 #define imx_clk_hw_mux_ldb(name, reg, shift, width, parents, num_parents) \ argument
211 #define imx_clk_hw_mux2_flags(name, reg, shift, width, parents, num_parents, flags) \ argument
394 int num_parents, unsigned long flags, unsigned long clk_mux_flags) in __imx_clk_hw_mux()
469 #define imx93_clk_composite(name, parent_names, num_parents, reg, domain_id) \ argument
H A Dclk-scu.h58 int num_parents, u32 rsrc_id, u8 clk_type) in imx_clk_scu2()
94 int num_parents, u32 rsrc_id, u8 gpr_id) in imx_clk_mux_gpr_scu()
/openbmc/linux/drivers/clk/
H A Dclk-composite.c239 const struct clk_parent_data *pdata, int num_parents, in __clk_hw_register_composite()
355 const char * const *parent_names, int num_parents, in clk_hw_register_composite()
371 int num_parents, in clk_hw_register_composite_pdata()
384 const char * const *parent_names, int num_parents, in clk_register_composite()
403 int num_parents, in clk_register_composite_pdata()
452 const struct clk_parent_data *pdata, int num_parents, in __devm_clk_hw_register_composite()
482 int num_parents, in devm_clk_hw_register_composite_pdata()
H A Dclk-mux.c46 int num_parents = clk_hw_get_num_parents(hw); in clk_mux_val_to_index() local
150 const char *name, u8 num_parents, in __clk_hw_register_mux()
216 const char *name, u8 num_parents, in __devm_clk_hw_register_mux()
245 const char * const *parent_names, u8 num_parents, in clk_register_mux_table()
H A Dclk-gpio.c139 static struct clk_hw *clk_register_gpio(struct device *dev, u8 num_parents, in clk_register_gpio()
174 int num_parents, in clk_hw_register_gpio_gate()
198 unsigned int num_parents; in gpio_clk_driver_probe() local
/openbmc/linux/drivers/clk/ux500/
H A Dclk-sysctrl.c121 u8 num_parents, in clk_reg_sysctrl()
188 u8 num_parents = (parent_name ? 1 : 0); in clk_reg_sysctrl_gate() local
206 u8 num_parents = (parent_name ? 1 : 0); in clk_reg_sysctrl_gate_fixed_rate() local
217 u8 num_parents, in clk_reg_sysctrl_set_parent()
/openbmc/linux/drivers/clk/st/
H A Dclkgen-mux.c19 int *num_parents) in clkgen_mux_get_parents()
58 int num_parents = 0; in st_of_clkgen_mux_setup() local
H A Dclk-flexgen.c207 const char **parent_names, u8 num_parents, in clk_register_flexgen()
279 int *num_parents) in flexgen_get_parents()
648 int num_parents, i; in st_of_flexgen_setup() local
/openbmc/linux/drivers/irqchip/
H A Dirq-loongson-htvec.c28 int num_parents; member
184 int num_parents, int parent_irq[], struct fwnode_handle *domain_handle) in htvec_init()
233 int num_parents = 0; in htvec_of_init() local
296 int num_parents, parent_irq[8]; in htvec_acpi_init() local
/openbmc/linux/drivers/clk/at91/
H A Ddt-compat.c130 unsigned int num_parents; in of_sama5d2_clk_generated_setup() local
339 unsigned int num_parents; in of_at91sam9x5_clk_main_setup() local
397 unsigned int num_parents; in of_at91_clk_master_setup() local
743 unsigned int num_parents; in of_at91_clk_prog_setup() local
807 unsigned int num_parents; in of_at91sam9260_clk_slow_setup() local
841 unsigned int num_parents; in of_at91sam9x5_clk_smd_setup() local
928 unsigned int num_parents; in of_at91sam9x5_clk_usb_setup() local
H A Dclk-usb.c29 u8 num_parents; member
224 const char **parent_names, u8 num_parents, in _at91sam9x5_clk_register_usb()
260 const char **parent_names, u8 num_parents) in at91sam9x5_clk_register_usb()
268 const char **parent_names, u8 num_parents) in sam9x60_clk_register_usb()
/openbmc/linux/drivers/clk/tegra/
H A Dclk-periph.c169 const char * const *parent_names, int num_parents, in _tegra_clk_register_periph()
217 const char * const *parent_names, int num_parents, in tegra_clk_register_periph()
226 const char * const *parent_names, int num_parents, in tegra_clk_register_periph_nodiv()
H A Dclk-super.c209 const char **parent_names, u8 num_parents, in tegra_clk_register_super_mux()
245 const char * const *parent_names, u8 num_parents, in tegra_clk_register_super_clk()
/openbmc/u-boot/drivers/clk/at91/
H A Dclk-generated.c45 u32 num_parents; member
153 u32 num_parents; in generic_clk_ofdata_to_platdata() local
/openbmc/linux/drivers/clk/renesas/
H A Dclk-div6.c107 unsigned int num_parents = clk_hw_get_num_parents(hw); in cpg_div6_clock_determine_rate() local
243 unsigned int num_parents, in cpg_div6_register()
321 unsigned int num_parents; in cpg_div6_clock_init() local
/openbmc/linux/drivers/clk/zynqmp/
H A Dclkc.c78 u32 num_parents; member
312 u8 num_parents, in zynqmp_clk_register_fixed_factor()
513 u32 *num_parents) in zynqmp_clock_get_parents()
546 const char **parent_list, u32 *num_parents) in zynqmp_get_parent_list()
587 int num_parents, in zynqmp_register_clk_topology()
/openbmc/linux/drivers/clk/rockchip/
H A Dclk.c39 const char *const *parent_names, u8 num_parents, in rockchip_clk_register_branch()
208 const char *const *parent_names, u8 num_parents, in rockchip_clk_register_frac_branch()
315 const char *const *parent_names, u8 num_parents, in rockchip_clk_register_factor_branch()
579 u8 num_parents, in rockchip_clk_register_armclk()
/openbmc/linux/drivers/clk/keystone/
H A Dsci-clk.c55 u32 num_parents; member
430 u32 num_parents = 0; in ti_sci_scan_clocks_from_fw() local
518 int num_parents; in ti_sci_scan_clocks_from_dt() local
/openbmc/linux/drivers/clk/sunxi/
H A Dclk-sun8i-mbus.c26 int num_parents = of_clk_get_parent_count(node); in sun8i_a23_mbus_setup() local
/openbmc/linux/include/linux/
H A Dclk-provider.h306 u8 num_parents; member
1008 #define clk_register_mux(dev, name, parent_names, num_parents, flags, reg, \ argument
1013 #define clk_hw_register_mux_table(dev, name, parent_names, num_parents, \ argument
1021 num_parents, flags, reg, shift, mask, \ argument
1027 #define clk_hw_register_mux(dev, name, parent_names, num_parents, flags, reg, \ argument
1033 #define clk_hw_register_mux_hws(dev, name, parent_hws, num_parents, flags, \ argument
1038 #define clk_hw_register_mux_parent_data(dev, name, parent_data, num_parents, \ argument
1045 num_parents, flags, reg, shift, \ argument
1051 #define devm_clk_hw_register_mux(dev, name, parent_names, num_parents, flags, reg, \ argument
1058 num_parents, flags, reg, shift, \ argument
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/openbmc/linux/drivers/clk/qcom/
H A Dclk-rcg.c40 int num_parents = clk_hw_get_num_parents(hw); in clk_rcg_get_parent() local
67 int num_parents = clk_hw_get_num_parents(hw); in clk_dyn_rcg_get_parent() local
568 int i, ret, num_parents = clk_hw_get_num_parents(hw); in clk_rcg_bypass2_set_rate() local
639 int i, ret, num_parents = clk_hw_get_num_parents(hw); in clk_rcg_pixel_set_rate() local
712 int i, ret, num_parents = clk_hw_get_num_parents(hw); in clk_rcg_esc_set_rate() local

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