1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * arch/arm/include/asm/glue-cache.h
4 *
5 * Copyright (C) 1999-2002 Russell King
6 */
7 #ifndef ASM_GLUE_CACHE_H
8 #define ASM_GLUE_CACHE_H
9
10 #include <asm/glue.h>
11
12 /*
13 * Cache Model
14 * ===========
15 */
16 #undef _CACHE
17 #undef MULTI_CACHE
18
19 #if defined(CONFIG_CPU_CACHE_V4)
20 # ifdef _CACHE
21 # define MULTI_CACHE 1
22 # else
23 # define _CACHE v4
24 # endif
25 #endif
26
27 #if defined(CONFIG_CPU_ARM920T) || defined(CONFIG_CPU_ARM922T) || \
28 defined(CONFIG_CPU_ARM925T) || defined(CONFIG_CPU_ARM1020) || \
29 defined(CONFIG_CPU_ARM1026)
30 # define MULTI_CACHE 1
31 #endif
32
33 #if defined(CONFIG_CPU_FA526)
34 # ifdef _CACHE
35 # define MULTI_CACHE 1
36 # else
37 # define _CACHE fa
38 # endif
39 #endif
40
41 #if defined(CONFIG_CPU_ARM926T)
42 # ifdef _CACHE
43 # define MULTI_CACHE 1
44 # else
45 # define _CACHE arm926
46 # endif
47 #endif
48
49 #if defined(CONFIG_CPU_ARM940T)
50 # ifdef _CACHE
51 # define MULTI_CACHE 1
52 # else
53 # define _CACHE arm940
54 # endif
55 #endif
56
57 #if defined(CONFIG_CPU_ARM946E)
58 # ifdef _CACHE
59 # define MULTI_CACHE 1
60 # else
61 # define _CACHE arm946
62 # endif
63 #endif
64
65 #if defined(CONFIG_CPU_CACHE_V4WB)
66 # ifdef _CACHE
67 # define MULTI_CACHE 1
68 # else
69 # define _CACHE v4wb
70 # endif
71 #endif
72
73 #if defined(CONFIG_CPU_XSCALE)
74 # ifdef _CACHE
75 # define MULTI_CACHE 1
76 # else
77 # define _CACHE xscale
78 # endif
79 #endif
80
81 #if defined(CONFIG_CPU_XSC3)
82 # ifdef _CACHE
83 # define MULTI_CACHE 1
84 # else
85 # define _CACHE xsc3
86 # endif
87 #endif
88
89 #if defined(CONFIG_CPU_MOHAWK)
90 # ifdef _CACHE
91 # define MULTI_CACHE 1
92 # else
93 # define _CACHE mohawk
94 # endif
95 #endif
96
97 #if defined(CONFIG_CPU_FEROCEON)
98 # define MULTI_CACHE 1
99 #endif
100
101 #if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K)
102 # ifdef _CACHE
103 # define MULTI_CACHE 1
104 # else
105 # define _CACHE v6
106 # endif
107 #endif
108
109 #if defined(CONFIG_CPU_V7)
110 # ifdef _CACHE
111 # define MULTI_CACHE 1
112 # else
113 # define _CACHE v7
114 # endif
115 #endif
116
117 #if defined(CONFIG_CACHE_B15_RAC)
118 # define MULTI_CACHE 1
119 #endif
120
121 #if defined(CONFIG_CPU_V7M)
122 # define MULTI_CACHE 1
123 #endif
124
125 #if !defined(_CACHE) && !defined(MULTI_CACHE)
126 #error Unknown cache maintenance model
127 #endif
128
129 #ifndef __ASSEMBLER__
nop_flush_icache_all(void)130 static inline void nop_flush_icache_all(void) { }
nop_flush_kern_cache_all(void)131 static inline void nop_flush_kern_cache_all(void) { }
nop_flush_kern_cache_louis(void)132 static inline void nop_flush_kern_cache_louis(void) { }
nop_flush_user_cache_all(void)133 static inline void nop_flush_user_cache_all(void) { }
nop_flush_user_cache_range(unsigned long a,unsigned long b,unsigned int c)134 static inline void nop_flush_user_cache_range(unsigned long a,
135 unsigned long b, unsigned int c) { }
136
nop_coherent_kern_range(unsigned long a,unsigned long b)137 static inline void nop_coherent_kern_range(unsigned long a, unsigned long b) { }
nop_coherent_user_range(unsigned long a,unsigned long b)138 static inline int nop_coherent_user_range(unsigned long a,
139 unsigned long b) { return 0; }
nop_flush_kern_dcache_area(void * a,size_t s)140 static inline void nop_flush_kern_dcache_area(void *a, size_t s) { }
141
nop_dma_flush_range(const void * a,const void * b)142 static inline void nop_dma_flush_range(const void *a, const void *b) { }
143
nop_dma_map_area(const void * s,size_t l,int f)144 static inline void nop_dma_map_area(const void *s, size_t l, int f) { }
nop_dma_unmap_area(const void * s,size_t l,int f)145 static inline void nop_dma_unmap_area(const void *s, size_t l, int f) { }
146 #endif
147
148 #ifndef MULTI_CACHE
149 #define __cpuc_flush_icache_all __glue(_CACHE,_flush_icache_all)
150 #define __cpuc_flush_kern_all __glue(_CACHE,_flush_kern_cache_all)
151 #define __cpuc_flush_kern_louis __glue(_CACHE,_flush_kern_cache_louis)
152 #define __cpuc_flush_user_all __glue(_CACHE,_flush_user_cache_all)
153 #define __cpuc_flush_user_range __glue(_CACHE,_flush_user_cache_range)
154 #define __cpuc_coherent_kern_range __glue(_CACHE,_coherent_kern_range)
155 #define __cpuc_coherent_user_range __glue(_CACHE,_coherent_user_range)
156 #define __cpuc_flush_dcache_area __glue(_CACHE,_flush_kern_dcache_area)
157
158 #define dmac_flush_range __glue(_CACHE,_dma_flush_range)
159 #endif
160
161 #endif
162