1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (c) 2019 - 2022 Beijing WangXun Technology Co., Ltd. */
3 
4 #include <linux/types.h>
5 #include <linux/module.h>
6 #include <linux/pci.h>
7 #include <linux/netdevice.h>
8 #include <linux/string.h>
9 #include <linux/etherdevice.h>
10 #include <net/ip.h>
11 #include <linux/phy.h>
12 #include <linux/if_vlan.h>
13 
14 #include "../libwx/wx_type.h"
15 #include "../libwx/wx_hw.h"
16 #include "../libwx/wx_lib.h"
17 #include "ngbe_type.h"
18 #include "ngbe_mdio.h"
19 #include "ngbe_hw.h"
20 #include "ngbe_ethtool.h"
21 
22 char ngbe_driver_name[] = "ngbe";
23 
24 /* ngbe_pci_tbl - PCI Device ID Table
25  *
26  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
27  *   Class, Class Mask, private data (not used) }
28  */
29 static const struct pci_device_id ngbe_pci_tbl[] = {
30 	{ PCI_VDEVICE(WANGXUN, NGBE_DEV_ID_EM_WX1860AL_W), 0},
31 	{ PCI_VDEVICE(WANGXUN, NGBE_DEV_ID_EM_WX1860A2), 0},
32 	{ PCI_VDEVICE(WANGXUN, NGBE_DEV_ID_EM_WX1860A2S), 0},
33 	{ PCI_VDEVICE(WANGXUN, NGBE_DEV_ID_EM_WX1860A4), 0},
34 	{ PCI_VDEVICE(WANGXUN, NGBE_DEV_ID_EM_WX1860A4S), 0},
35 	{ PCI_VDEVICE(WANGXUN, NGBE_DEV_ID_EM_WX1860AL2), 0},
36 	{ PCI_VDEVICE(WANGXUN, NGBE_DEV_ID_EM_WX1860AL2S), 0},
37 	{ PCI_VDEVICE(WANGXUN, NGBE_DEV_ID_EM_WX1860AL4), 0},
38 	{ PCI_VDEVICE(WANGXUN, NGBE_DEV_ID_EM_WX1860AL4S), 0},
39 	{ PCI_VDEVICE(WANGXUN, NGBE_DEV_ID_EM_WX1860LC), 0},
40 	{ PCI_VDEVICE(WANGXUN, NGBE_DEV_ID_EM_WX1860A1), 0},
41 	{ PCI_VDEVICE(WANGXUN, NGBE_DEV_ID_EM_WX1860A1L), 0},
42 	/* required last entry */
43 	{ .device = 0 }
44 };
45 
46 /**
47  *  ngbe_init_type_code - Initialize the shared code
48  *  @wx: pointer to hardware structure
49  **/
ngbe_init_type_code(struct wx * wx)50 static void ngbe_init_type_code(struct wx *wx)
51 {
52 	int wol_mask = 0, ncsi_mask = 0;
53 	u16 type_mask = 0, val;
54 
55 	wx->mac.type = wx_mac_em;
56 	type_mask = (u16)(wx->subsystem_device_id & NGBE_OEM_MASK);
57 	ncsi_mask = wx->subsystem_device_id & NGBE_NCSI_MASK;
58 	wol_mask = wx->subsystem_device_id & NGBE_WOL_MASK;
59 
60 	val = rd32(wx, WX_CFG_PORT_ST);
61 	wx->mac_type = (val & BIT(7)) >> 7 ?
62 		       em_mac_type_rgmii :
63 		       em_mac_type_mdi;
64 
65 	wx->wol_hw_supported = (wol_mask == NGBE_WOL_SUP) ? 1 : 0;
66 	wx->ncsi_enabled = (ncsi_mask == NGBE_NCSI_MASK ||
67 			   type_mask == NGBE_SUBID_OCP_CARD) ? 1 : 0;
68 
69 	switch (type_mask) {
70 	case NGBE_SUBID_LY_YT8521S_SFP:
71 	case NGBE_SUBID_LY_M88E1512_SFP:
72 	case NGBE_SUBID_YT8521S_SFP_GPIO:
73 	case NGBE_SUBID_INTERNAL_YT8521S_SFP_GPIO:
74 		wx->gpio_ctrl = 1;
75 		break;
76 	default:
77 		wx->gpio_ctrl = 0;
78 		break;
79 	}
80 }
81 
82 /**
83  * ngbe_init_rss_key - Initialize wx RSS key
84  * @wx: device handle
85  *
86  * Allocates and initializes the RSS key if it is not allocated.
87  **/
ngbe_init_rss_key(struct wx * wx)88 static inline int ngbe_init_rss_key(struct wx *wx)
89 {
90 	u32 *rss_key;
91 
92 	if (!wx->rss_key) {
93 		rss_key = kzalloc(WX_RSS_KEY_SIZE, GFP_KERNEL);
94 		if (unlikely(!rss_key))
95 			return -ENOMEM;
96 
97 		netdev_rss_key_fill(rss_key, WX_RSS_KEY_SIZE);
98 		wx->rss_key = rss_key;
99 	}
100 
101 	return 0;
102 }
103 
104 /**
105  * ngbe_sw_init - Initialize general software structures
106  * @wx: board private structure to initialize
107  **/
ngbe_sw_init(struct wx * wx)108 static int ngbe_sw_init(struct wx *wx)
109 {
110 	struct pci_dev *pdev = wx->pdev;
111 	u16 msix_count = 0;
112 	int err = 0;
113 
114 	wx->mac.num_rar_entries = NGBE_RAR_ENTRIES;
115 	wx->mac.max_rx_queues = NGBE_MAX_RX_QUEUES;
116 	wx->mac.max_tx_queues = NGBE_MAX_TX_QUEUES;
117 	wx->mac.mcft_size = NGBE_MC_TBL_SIZE;
118 	wx->mac.vft_size = NGBE_SP_VFT_TBL_SIZE;
119 	wx->mac.rx_pb_size = NGBE_RX_PB_SIZE;
120 	wx->mac.tx_pb_size = NGBE_TDB_PB_SZ;
121 
122 	/* PCI config space info */
123 	err = wx_sw_init(wx);
124 	if (err < 0)
125 		return err;
126 
127 	/* mac type, phy type , oem type */
128 	ngbe_init_type_code(wx);
129 
130 	/* Set common capability flags and settings */
131 	wx->max_q_vectors = NGBE_MAX_MSIX_VECTORS;
132 	err = wx_get_pcie_msix_counts(wx, &msix_count, NGBE_MAX_MSIX_VECTORS);
133 	if (err)
134 		dev_err(&pdev->dev, "Do not support MSI-X\n");
135 	wx->mac.max_msix_vectors = msix_count;
136 
137 	if (ngbe_init_rss_key(wx))
138 		return -ENOMEM;
139 
140 	/* enable itr by default in dynamic mode */
141 	wx->rx_itr_setting = 1;
142 	wx->tx_itr_setting = 1;
143 
144 	/* set default ring sizes */
145 	wx->tx_ring_count = NGBE_DEFAULT_TXD;
146 	wx->rx_ring_count = NGBE_DEFAULT_RXD;
147 
148 	/* set default work limits */
149 	wx->tx_work_limit = NGBE_DEFAULT_TX_WORK;
150 	wx->rx_work_limit = NGBE_DEFAULT_RX_WORK;
151 
152 	return 0;
153 }
154 
155 /**
156  * ngbe_irq_enable - Enable default interrupt generation settings
157  * @wx: board private structure
158  * @queues: enable all queues interrupts
159  **/
ngbe_irq_enable(struct wx * wx,bool queues)160 static void ngbe_irq_enable(struct wx *wx, bool queues)
161 {
162 	u32 mask;
163 
164 	/* enable misc interrupt */
165 	mask = NGBE_PX_MISC_IEN_MASK;
166 
167 	wr32(wx, WX_GPIO_DDR, WX_GPIO_DDR_0);
168 	wr32(wx, WX_GPIO_INTEN, WX_GPIO_INTEN_0 | WX_GPIO_INTEN_1);
169 	wr32(wx, WX_GPIO_INTTYPE_LEVEL, 0x0);
170 	wr32(wx, WX_GPIO_POLARITY, wx->gpio_ctrl ? 0 : 0x3);
171 
172 	wr32(wx, WX_PX_MISC_IEN, mask);
173 
174 	/* mask interrupt */
175 	if (queues)
176 		wx_intr_enable(wx, NGBE_INTR_ALL);
177 	else
178 		wx_intr_enable(wx, NGBE_INTR_MISC(wx));
179 }
180 
181 /**
182  * ngbe_intr - msi/legacy mode Interrupt Handler
183  * @irq: interrupt number
184  * @data: pointer to a network interface device structure
185  **/
ngbe_intr(int __always_unused irq,void * data)186 static irqreturn_t ngbe_intr(int __always_unused irq, void *data)
187 {
188 	struct wx_q_vector *q_vector;
189 	struct wx *wx  = data;
190 	struct pci_dev *pdev;
191 	u32 eicr;
192 
193 	q_vector = wx->q_vector[0];
194 	pdev = wx->pdev;
195 
196 	eicr = wx_misc_isb(wx, WX_ISB_VEC0);
197 	if (!eicr) {
198 		/* shared interrupt alert!
199 		 * the interrupt that we masked before the EICR read.
200 		 */
201 		if (netif_running(wx->netdev))
202 			ngbe_irq_enable(wx, true);
203 		return IRQ_NONE;        /* Not our interrupt */
204 	}
205 	wx->isb_mem[WX_ISB_VEC0] = 0;
206 	if (!(pdev->msi_enabled))
207 		wr32(wx, WX_PX_INTA, 1);
208 
209 	wx->isb_mem[WX_ISB_MISC] = 0;
210 	/* would disable interrupts here but it is auto disabled */
211 	napi_schedule_irqoff(&q_vector->napi);
212 
213 	if (netif_running(wx->netdev))
214 		ngbe_irq_enable(wx, false);
215 
216 	return IRQ_HANDLED;
217 }
218 
ngbe_msix_other(int __always_unused irq,void * data)219 static irqreturn_t ngbe_msix_other(int __always_unused irq, void *data)
220 {
221 	struct wx *wx = data;
222 
223 	/* re-enable the original interrupt state, no lsc, no queues */
224 	if (netif_running(wx->netdev))
225 		ngbe_irq_enable(wx, false);
226 
227 	return IRQ_HANDLED;
228 }
229 
230 /**
231  * ngbe_request_msix_irqs - Initialize MSI-X interrupts
232  * @wx: board private structure
233  *
234  * ngbe_request_msix_irqs allocates MSI-X vectors and requests
235  * interrupts from the kernel.
236  **/
ngbe_request_msix_irqs(struct wx * wx)237 static int ngbe_request_msix_irqs(struct wx *wx)
238 {
239 	struct net_device *netdev = wx->netdev;
240 	int vector, err;
241 
242 	for (vector = 0; vector < wx->num_q_vectors; vector++) {
243 		struct wx_q_vector *q_vector = wx->q_vector[vector];
244 		struct msix_entry *entry = &wx->msix_entries[vector];
245 
246 		if (q_vector->tx.ring && q_vector->rx.ring)
247 			snprintf(q_vector->name, sizeof(q_vector->name) - 1,
248 				 "%s-TxRx-%d", netdev->name, entry->entry);
249 		else
250 			/* skip this unused q_vector */
251 			continue;
252 
253 		err = request_irq(entry->vector, wx_msix_clean_rings, 0,
254 				  q_vector->name, q_vector);
255 		if (err) {
256 			wx_err(wx, "request_irq failed for MSIX interrupt %s Error: %d\n",
257 			       q_vector->name, err);
258 			goto free_queue_irqs;
259 		}
260 	}
261 
262 	err = request_irq(wx->msix_entries[vector].vector,
263 			  ngbe_msix_other, 0, netdev->name, wx);
264 
265 	if (err) {
266 		wx_err(wx, "request_irq for msix_other failed: %d\n", err);
267 		goto free_queue_irqs;
268 	}
269 
270 	return 0;
271 
272 free_queue_irqs:
273 	while (vector) {
274 		vector--;
275 		free_irq(wx->msix_entries[vector].vector,
276 			 wx->q_vector[vector]);
277 	}
278 	wx_reset_interrupt_capability(wx);
279 	return err;
280 }
281 
282 /**
283  * ngbe_request_irq - initialize interrupts
284  * @wx: board private structure
285  *
286  * Attempts to configure interrupts using the best available
287  * capabilities of the hardware and kernel.
288  **/
ngbe_request_irq(struct wx * wx)289 static int ngbe_request_irq(struct wx *wx)
290 {
291 	struct net_device *netdev = wx->netdev;
292 	struct pci_dev *pdev = wx->pdev;
293 	int err;
294 
295 	if (pdev->msix_enabled)
296 		err = ngbe_request_msix_irqs(wx);
297 	else if (pdev->msi_enabled)
298 		err = request_irq(pdev->irq, ngbe_intr, 0,
299 				  netdev->name, wx);
300 	else
301 		err = request_irq(pdev->irq, ngbe_intr, IRQF_SHARED,
302 				  netdev->name, wx);
303 
304 	if (err)
305 		wx_err(wx, "request_irq failed, Error %d\n", err);
306 
307 	return err;
308 }
309 
ngbe_disable_device(struct wx * wx)310 static void ngbe_disable_device(struct wx *wx)
311 {
312 	struct net_device *netdev = wx->netdev;
313 	u32 i;
314 
315 	/* disable all enabled rx queues */
316 	for (i = 0; i < wx->num_rx_queues; i++)
317 		/* this call also flushes the previous write */
318 		wx_disable_rx_queue(wx, wx->rx_ring[i]);
319 	/* disable receives */
320 	wx_disable_rx(wx);
321 	wx_napi_disable_all(wx);
322 	netif_tx_stop_all_queues(netdev);
323 	netif_tx_disable(netdev);
324 	if (wx->gpio_ctrl)
325 		ngbe_sfp_modules_txrx_powerctl(wx, false);
326 	wx_irq_disable(wx);
327 	/* disable transmits in the hardware now that interrupts are off */
328 	for (i = 0; i < wx->num_tx_queues; i++) {
329 		u8 reg_idx = wx->tx_ring[i]->reg_idx;
330 
331 		wr32(wx, WX_PX_TR_CFG(reg_idx), WX_PX_TR_CFG_SWFLSH);
332 	}
333 }
334 
ngbe_down(struct wx * wx)335 static void ngbe_down(struct wx *wx)
336 {
337 	phy_stop(wx->phydev);
338 	ngbe_disable_device(wx);
339 	wx_clean_all_tx_rings(wx);
340 	wx_clean_all_rx_rings(wx);
341 }
342 
ngbe_up(struct wx * wx)343 static void ngbe_up(struct wx *wx)
344 {
345 	wx_configure_vectors(wx);
346 
347 	/* make sure to complete pre-operations */
348 	smp_mb__before_atomic();
349 	wx_napi_enable_all(wx);
350 	/* enable transmits */
351 	netif_tx_start_all_queues(wx->netdev);
352 
353 	/* clear any pending interrupts, may auto mask */
354 	rd32(wx, WX_PX_IC(0));
355 	rd32(wx, WX_PX_MISC_IC);
356 	ngbe_irq_enable(wx, true);
357 	if (wx->gpio_ctrl)
358 		ngbe_sfp_modules_txrx_powerctl(wx, true);
359 
360 	phy_start(wx->phydev);
361 }
362 
363 /**
364  * ngbe_open - Called when a network interface is made active
365  * @netdev: network interface device structure
366  *
367  * Returns 0 on success, negative value on failure
368  *
369  * The open entry point is called when a network interface is made
370  * active by the system (IFF_UP).
371  **/
ngbe_open(struct net_device * netdev)372 static int ngbe_open(struct net_device *netdev)
373 {
374 	struct wx *wx = netdev_priv(netdev);
375 	int err;
376 
377 	wx_control_hw(wx, true);
378 
379 	err = wx_setup_resources(wx);
380 	if (err)
381 		return err;
382 
383 	wx_configure(wx);
384 
385 	err = ngbe_request_irq(wx);
386 	if (err)
387 		goto err_free_resources;
388 
389 	err = ngbe_phy_connect(wx);
390 	if (err)
391 		goto err_free_irq;
392 
393 	err = netif_set_real_num_tx_queues(netdev, wx->num_tx_queues);
394 	if (err)
395 		goto err_dis_phy;
396 
397 	err = netif_set_real_num_rx_queues(netdev, wx->num_rx_queues);
398 	if (err)
399 		goto err_dis_phy;
400 
401 	ngbe_up(wx);
402 
403 	return 0;
404 err_dis_phy:
405 	phy_disconnect(wx->phydev);
406 err_free_irq:
407 	wx_free_irq(wx);
408 err_free_resources:
409 	wx_free_resources(wx);
410 	return err;
411 }
412 
413 /**
414  * ngbe_close - Disables a network interface
415  * @netdev: network interface device structure
416  *
417  * Returns 0, this is not allowed to fail
418  *
419  * The close entry point is called when an interface is de-activated
420  * by the OS.  The hardware is still under the drivers control, but
421  * needs to be disabled.  A global MAC reset is issued to stop the
422  * hardware, and all transmit and receive resources are freed.
423  **/
ngbe_close(struct net_device * netdev)424 static int ngbe_close(struct net_device *netdev)
425 {
426 	struct wx *wx = netdev_priv(netdev);
427 
428 	ngbe_down(wx);
429 	wx_free_irq(wx);
430 	wx_free_resources(wx);
431 	phy_disconnect(wx->phydev);
432 	wx_control_hw(wx, false);
433 
434 	return 0;
435 }
436 
ngbe_dev_shutdown(struct pci_dev * pdev,bool * enable_wake)437 static void ngbe_dev_shutdown(struct pci_dev *pdev, bool *enable_wake)
438 {
439 	struct wx *wx = pci_get_drvdata(pdev);
440 	struct net_device *netdev;
441 	u32 wufc = wx->wol;
442 
443 	netdev = wx->netdev;
444 	rtnl_lock();
445 	netif_device_detach(netdev);
446 
447 	if (netif_running(netdev))
448 		ngbe_close(netdev);
449 	wx_clear_interrupt_scheme(wx);
450 	rtnl_unlock();
451 
452 	if (wufc) {
453 		wx_set_rx_mode(netdev);
454 		wx_configure_rx(wx);
455 		wr32(wx, NGBE_PSR_WKUP_CTL, wufc);
456 	} else {
457 		wr32(wx, NGBE_PSR_WKUP_CTL, 0);
458 	}
459 	pci_wake_from_d3(pdev, !!wufc);
460 	*enable_wake = !!wufc;
461 	wx_control_hw(wx, false);
462 
463 	pci_disable_device(pdev);
464 }
465 
ngbe_shutdown(struct pci_dev * pdev)466 static void ngbe_shutdown(struct pci_dev *pdev)
467 {
468 	struct wx *wx = pci_get_drvdata(pdev);
469 	bool wake;
470 
471 	wake = !!wx->wol;
472 
473 	ngbe_dev_shutdown(pdev, &wake);
474 
475 	if (system_state == SYSTEM_POWER_OFF) {
476 		pci_wake_from_d3(pdev, wake);
477 		pci_set_power_state(pdev, PCI_D3hot);
478 	}
479 }
480 
481 static const struct net_device_ops ngbe_netdev_ops = {
482 	.ndo_open               = ngbe_open,
483 	.ndo_stop               = ngbe_close,
484 	.ndo_change_mtu         = wx_change_mtu,
485 	.ndo_start_xmit         = wx_xmit_frame,
486 	.ndo_set_rx_mode        = wx_set_rx_mode,
487 	.ndo_set_features       = wx_set_features,
488 	.ndo_validate_addr      = eth_validate_addr,
489 	.ndo_set_mac_address    = wx_set_mac,
490 	.ndo_get_stats64        = wx_get_stats64,
491 	.ndo_vlan_rx_add_vid    = wx_vlan_rx_add_vid,
492 	.ndo_vlan_rx_kill_vid   = wx_vlan_rx_kill_vid,
493 };
494 
495 /**
496  * ngbe_probe - Device Initialization Routine
497  * @pdev: PCI device information struct
498  * @ent: entry in ngbe_pci_tbl
499  *
500  * Returns 0 on success, negative on failure
501  *
502  * ngbe_probe initializes an wx identified by a pci_dev structure.
503  * The OS initialization, configuring of the wx private structure,
504  * and a hardware reset occur.
505  **/
ngbe_probe(struct pci_dev * pdev,const struct pci_device_id __always_unused * ent)506 static int ngbe_probe(struct pci_dev *pdev,
507 		      const struct pci_device_id __always_unused *ent)
508 {
509 	struct net_device *netdev;
510 	u32 e2rom_cksum_cap = 0;
511 	struct wx *wx = NULL;
512 	static int func_nums;
513 	u16 e2rom_ver = 0;
514 	u32 etrack_id = 0;
515 	u32 saved_ver = 0;
516 	int err;
517 
518 	err = pci_enable_device_mem(pdev);
519 	if (err)
520 		return err;
521 
522 	err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
523 	if (err) {
524 		dev_err(&pdev->dev,
525 			"No usable DMA configuration, aborting\n");
526 		goto err_pci_disable_dev;
527 	}
528 
529 	err = pci_request_selected_regions(pdev,
530 					   pci_select_bars(pdev, IORESOURCE_MEM),
531 					   ngbe_driver_name);
532 	if (err) {
533 		dev_err(&pdev->dev,
534 			"pci_request_selected_regions failed %d\n", err);
535 		goto err_pci_disable_dev;
536 	}
537 
538 	pci_set_master(pdev);
539 
540 	netdev = devm_alloc_etherdev_mqs(&pdev->dev,
541 					 sizeof(struct wx),
542 					 NGBE_MAX_TX_QUEUES,
543 					 NGBE_MAX_RX_QUEUES);
544 	if (!netdev) {
545 		err = -ENOMEM;
546 		goto err_pci_release_regions;
547 	}
548 
549 	SET_NETDEV_DEV(netdev, &pdev->dev);
550 
551 	wx = netdev_priv(netdev);
552 	wx->netdev = netdev;
553 	wx->pdev = pdev;
554 	wx->msg_enable = BIT(3) - 1;
555 
556 	wx->hw_addr = devm_ioremap(&pdev->dev,
557 				   pci_resource_start(pdev, 0),
558 				   pci_resource_len(pdev, 0));
559 	if (!wx->hw_addr) {
560 		err = -EIO;
561 		goto err_pci_release_regions;
562 	}
563 
564 	wx->driver_name = ngbe_driver_name;
565 	ngbe_set_ethtool_ops(netdev);
566 	netdev->netdev_ops = &ngbe_netdev_ops;
567 
568 	netdev->features = NETIF_F_SG | NETIF_F_IP_CSUM |
569 			   NETIF_F_TSO | NETIF_F_TSO6 |
570 			   NETIF_F_RXHASH | NETIF_F_RXCSUM;
571 	netdev->features |= NETIF_F_SCTP_CRC | NETIF_F_TSO_MANGLEID;
572 	netdev->vlan_features |= netdev->features;
573 	netdev->features |= NETIF_F_IPV6_CSUM | NETIF_F_VLAN_FEATURES;
574 	/* copy netdev features into list of user selectable features */
575 	netdev->hw_features |= netdev->features | NETIF_F_RXALL;
576 	netdev->hw_features |= NETIF_F_NTUPLE | NETIF_F_HW_TC;
577 	netdev->features |= NETIF_F_HIGHDMA;
578 	netdev->hw_features |= NETIF_F_GRO;
579 	netdev->features |= NETIF_F_GRO;
580 
581 	netdev->priv_flags |= IFF_UNICAST_FLT;
582 	netdev->priv_flags |= IFF_SUPP_NOFCS;
583 
584 	netdev->min_mtu = ETH_MIN_MTU;
585 	netdev->max_mtu = WX_MAX_JUMBO_FRAME_SIZE -
586 			  (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN);
587 
588 	wx->bd_number = func_nums;
589 	/* setup the private structure */
590 	err = ngbe_sw_init(wx);
591 	if (err)
592 		goto err_free_mac_table;
593 
594 	/* check if flash load is done after hw power up */
595 	err = wx_check_flash_load(wx, NGBE_SPI_ILDR_STATUS_PERST);
596 	if (err)
597 		goto err_free_mac_table;
598 	err = wx_check_flash_load(wx, NGBE_SPI_ILDR_STATUS_PWRRST);
599 	if (err)
600 		goto err_free_mac_table;
601 
602 	err = wx_mng_present(wx);
603 	if (err) {
604 		dev_err(&pdev->dev, "Management capability is not present\n");
605 		goto err_free_mac_table;
606 	}
607 
608 	err = ngbe_reset_hw(wx);
609 	if (err) {
610 		dev_err(&pdev->dev, "HW Init failed: %d\n", err);
611 		goto err_free_mac_table;
612 	}
613 
614 	if (wx->bus.func == 0) {
615 		wr32(wx, NGBE_CALSUM_CAP_STATUS, 0x0);
616 		wr32(wx, NGBE_EEPROM_VERSION_STORE_REG, 0x0);
617 	} else {
618 		e2rom_cksum_cap = rd32(wx, NGBE_CALSUM_CAP_STATUS);
619 		saved_ver = rd32(wx, NGBE_EEPROM_VERSION_STORE_REG);
620 	}
621 
622 	wx_init_eeprom_params(wx);
623 	if (wx->bus.func == 0 || e2rom_cksum_cap == 0) {
624 		/* make sure the EEPROM is ready */
625 		err = ngbe_eeprom_chksum_hostif(wx);
626 		if (err) {
627 			dev_err(&pdev->dev, "The EEPROM Checksum Is Not Valid\n");
628 			err = -EIO;
629 			goto err_free_mac_table;
630 		}
631 	}
632 
633 	wx->wol = 0;
634 	if (wx->wol_hw_supported)
635 		wx->wol = NGBE_PSR_WKUP_CTL_MAG;
636 
637 	netdev->wol_enabled = !!(wx->wol);
638 	wr32(wx, NGBE_PSR_WKUP_CTL, wx->wol);
639 	device_set_wakeup_enable(&pdev->dev, wx->wol);
640 
641 	/* Save off EEPROM version number and Option Rom version which
642 	 * together make a unique identify for the eeprom
643 	 */
644 	if (saved_ver) {
645 		etrack_id = saved_ver;
646 	} else {
647 		wx_read_ee_hostif(wx,
648 				  wx->eeprom.sw_region_offset + NGBE_EEPROM_VERSION_H,
649 				  &e2rom_ver);
650 		etrack_id = e2rom_ver << 16;
651 		wx_read_ee_hostif(wx,
652 				  wx->eeprom.sw_region_offset + NGBE_EEPROM_VERSION_L,
653 				  &e2rom_ver);
654 		etrack_id |= e2rom_ver;
655 		wr32(wx, NGBE_EEPROM_VERSION_STORE_REG, etrack_id);
656 	}
657 	snprintf(wx->eeprom_id, sizeof(wx->eeprom_id),
658 		 "0x%08x", etrack_id);
659 
660 	eth_hw_addr_set(netdev, wx->mac.perm_addr);
661 	wx_mac_set_default_filter(wx, wx->mac.perm_addr);
662 
663 	err = wx_init_interrupt_scheme(wx);
664 	if (err)
665 		goto err_free_mac_table;
666 
667 	/* phy Interface Configuration */
668 	err = ngbe_mdio_init(wx);
669 	if (err)
670 		goto err_clear_interrupt_scheme;
671 
672 	err = register_netdev(netdev);
673 	if (err)
674 		goto err_register;
675 
676 	pci_set_drvdata(pdev, wx);
677 
678 	netif_info(wx, probe, netdev,
679 		   "PHY: %s, PBA No: Wang Xun GbE Family Controller\n",
680 		   wx->mac_type == em_mac_type_mdi ? "Internal" : "External");
681 	netif_info(wx, probe, netdev, "%pM\n", netdev->dev_addr);
682 
683 	return 0;
684 
685 err_register:
686 	wx_control_hw(wx, false);
687 err_clear_interrupt_scheme:
688 	wx_clear_interrupt_scheme(wx);
689 err_free_mac_table:
690 	kfree(wx->mac_table);
691 err_pci_release_regions:
692 	pci_release_selected_regions(pdev,
693 				     pci_select_bars(pdev, IORESOURCE_MEM));
694 err_pci_disable_dev:
695 	pci_disable_device(pdev);
696 	return err;
697 }
698 
699 /**
700  * ngbe_remove - Device Removal Routine
701  * @pdev: PCI device information struct
702  *
703  * ngbe_remove is called by the PCI subsystem to alert the driver
704  * that it should release a PCI device.  The could be caused by a
705  * Hot-Plug event, or because the driver is going to be removed from
706  * memory.
707  **/
ngbe_remove(struct pci_dev * pdev)708 static void ngbe_remove(struct pci_dev *pdev)
709 {
710 	struct wx *wx = pci_get_drvdata(pdev);
711 	struct net_device *netdev;
712 
713 	netdev = wx->netdev;
714 	unregister_netdev(netdev);
715 	pci_release_selected_regions(pdev,
716 				     pci_select_bars(pdev, IORESOURCE_MEM));
717 
718 	kfree(wx->mac_table);
719 	wx_clear_interrupt_scheme(wx);
720 
721 	pci_disable_device(pdev);
722 }
723 
ngbe_suspend(struct pci_dev * pdev,pm_message_t state)724 static int ngbe_suspend(struct pci_dev *pdev, pm_message_t state)
725 {
726 	bool wake;
727 
728 	ngbe_dev_shutdown(pdev, &wake);
729 	device_set_wakeup_enable(&pdev->dev, wake);
730 
731 	return 0;
732 }
733 
ngbe_resume(struct pci_dev * pdev)734 static int ngbe_resume(struct pci_dev *pdev)
735 {
736 	struct net_device *netdev;
737 	struct wx *wx;
738 	u32 err;
739 
740 	wx = pci_get_drvdata(pdev);
741 	netdev = wx->netdev;
742 
743 	err = pci_enable_device_mem(pdev);
744 	if (err) {
745 		wx_err(wx, "Cannot enable PCI device from suspend\n");
746 		return err;
747 	}
748 	pci_set_master(pdev);
749 	device_wakeup_disable(&pdev->dev);
750 
751 	ngbe_reset_hw(wx);
752 	rtnl_lock();
753 	err = wx_init_interrupt_scheme(wx);
754 	if (!err && netif_running(netdev))
755 		err = ngbe_open(netdev);
756 	if (!err)
757 		netif_device_attach(netdev);
758 	rtnl_unlock();
759 
760 	return 0;
761 }
762 
763 static struct pci_driver ngbe_driver = {
764 	.name     = ngbe_driver_name,
765 	.id_table = ngbe_pci_tbl,
766 	.probe    = ngbe_probe,
767 	.remove   = ngbe_remove,
768 	.suspend  = ngbe_suspend,
769 	.resume   = ngbe_resume,
770 	.shutdown = ngbe_shutdown,
771 };
772 
773 module_pci_driver(ngbe_driver);
774 
775 MODULE_DEVICE_TABLE(pci, ngbe_pci_tbl);
776 MODULE_AUTHOR("Beijing WangXun Technology Co., Ltd, <software@net-swift.com>");
777 MODULE_DESCRIPTION("WangXun(R) Gigabit PCI Express Network Driver");
778 MODULE_LICENSE("GPL");
779