xref: /openbmc/linux/drivers/net/ethernet/intel/ice/ice.h (revision 0f9b4c3ca5fdf3e177266ef994071b1a03f07318)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) 2018, Intel Corporation. */
3 
4 #ifndef _ICE_H_
5 #define _ICE_H_
6 
7 #include <linux/types.h>
8 #include <linux/errno.h>
9 #include <linux/kernel.h>
10 #include <linux/module.h>
11 #include <linux/firmware.h>
12 #include <linux/netdevice.h>
13 #include <linux/compiler.h>
14 #include <linux/etherdevice.h>
15 #include <linux/skbuff.h>
16 #include <linux/cpumask.h>
17 #include <linux/rtnetlink.h>
18 #include <linux/if_vlan.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/pci.h>
21 #include <linux/workqueue.h>
22 #include <linux/wait.h>
23 #include <linux/interrupt.h>
24 #include <linux/ethtool.h>
25 #include <linux/timer.h>
26 #include <linux/delay.h>
27 #include <linux/bitmap.h>
28 #include <linux/log2.h>
29 #include <linux/ip.h>
30 #include <linux/sctp.h>
31 #include <linux/ipv6.h>
32 #include <linux/pkt_sched.h>
33 #include <linux/if_bridge.h>
34 #include <linux/ctype.h>
35 #include <linux/linkmode.h>
36 #include <linux/bpf.h>
37 #include <linux/btf.h>
38 #include <linux/auxiliary_bus.h>
39 #include <linux/avf/virtchnl.h>
40 #include <linux/cpu_rmap.h>
41 #include <linux/dim.h>
42 #include <linux/gnss.h>
43 #include <net/pkt_cls.h>
44 #include <net/pkt_sched.h>
45 #include <net/tc_act/tc_mirred.h>
46 #include <net/tc_act/tc_gact.h>
47 #include <net/ip.h>
48 #include <net/devlink.h>
49 #include <net/ipv6.h>
50 #include <net/xdp_sock.h>
51 #include <net/xdp_sock_drv.h>
52 #include <net/geneve.h>
53 #include <net/gre.h>
54 #include <net/udp_tunnel.h>
55 #include <net/vxlan.h>
56 #include <net/gtp.h>
57 #include <linux/ppp_defs.h>
58 #include "ice_devids.h"
59 #include "ice_type.h"
60 #include "ice_txrx.h"
61 #include "ice_dcb.h"
62 #include "ice_switch.h"
63 #include "ice_common.h"
64 #include "ice_flow.h"
65 #include "ice_sched.h"
66 #include "ice_idc_int.h"
67 #include "ice_sriov.h"
68 #include "ice_vf_mbx.h"
69 #include "ice_ptp.h"
70 #include "ice_fdir.h"
71 #include "ice_xsk.h"
72 #include "ice_arfs.h"
73 #include "ice_repr.h"
74 #include "ice_eswitch.h"
75 #include "ice_lag.h"
76 #include "ice_vsi_vlan_ops.h"
77 #include "ice_gnss.h"
78 #include "ice_irq.h"
79 
80 #define ICE_BAR0		0
81 #define ICE_REQ_DESC_MULTIPLE	32
82 #define ICE_MIN_NUM_DESC	64
83 #define ICE_MAX_NUM_DESC	8160
84 #define ICE_DFLT_MIN_RX_DESC	512
85 #define ICE_DFLT_NUM_TX_DESC	256
86 #define ICE_DFLT_NUM_RX_DESC	2048
87 
88 #define ICE_DFLT_TRAFFIC_CLASS	BIT(0)
89 #define ICE_INT_NAME_STR_LEN	(IFNAMSIZ + 16)
90 #define ICE_AQ_LEN		192
91 #define ICE_MBXSQ_LEN		64
92 #define ICE_SBQ_LEN		64
93 #define ICE_MIN_LAN_TXRX_MSIX	1
94 #define ICE_MIN_LAN_OICR_MSIX	1
95 #define ICE_MIN_MSIX		(ICE_MIN_LAN_TXRX_MSIX + ICE_MIN_LAN_OICR_MSIX)
96 #define ICE_FDIR_MSIX		2
97 #define ICE_RDMA_NUM_AEQ_MSIX	4
98 #define ICE_MIN_RDMA_MSIX	2
99 #define ICE_ESWITCH_MSIX	1
100 #define ICE_NO_VSI		0xffff
101 #define ICE_VSI_MAP_CONTIG	0
102 #define ICE_VSI_MAP_SCATTER	1
103 #define ICE_MAX_SCATTER_TXQS	16
104 #define ICE_MAX_SCATTER_RXQS	16
105 #define ICE_Q_WAIT_RETRY_LIMIT	10
106 #define ICE_Q_WAIT_MAX_RETRY	(5 * ICE_Q_WAIT_RETRY_LIMIT)
107 #define ICE_MAX_LG_RSS_QS	256
108 #define ICE_INVAL_Q_INDEX	0xffff
109 
110 #define ICE_MAX_RXQS_PER_TC		256	/* Used when setting VSI context per TC Rx queues */
111 
112 #define ICE_CHNL_START_TC		1
113 
114 #define ICE_MAX_RESET_WAIT		20
115 
116 #define ICE_VSIQF_HKEY_ARRAY_SIZE	((VSIQF_HKEY_MAX_INDEX + 1) *	4)
117 
118 #define ICE_DFLT_NETIF_M (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK)
119 
120 #define ICE_MAX_MTU	(ICE_AQ_SET_MAC_FRAME_SIZE_MAX - ICE_ETH_PKT_HDR_PAD)
121 
122 #define ICE_MAX_TSO_SIZE 131072
123 
124 #define ICE_UP_TABLE_TRANSLATE(val, i) \
125 		(((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \
126 		  ICE_AQ_VSI_UP_TABLE_UP##i##_M)
127 
128 #define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i]))
129 #define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i]))
130 #define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i]))
131 #define ICE_TX_FDIRDESC(R, i) (&(((struct ice_fltr_desc *)((R)->desc))[i]))
132 
133 /* Minimum BW limit is 500 Kbps for any scheduler node */
134 #define ICE_MIN_BW_LIMIT		500
135 /* User can specify BW in either Kbit/Mbit/Gbit and OS converts it in bytes.
136  * use it to convert user specified BW limit into Kbps
137  */
138 #define ICE_BW_KBPS_DIVISOR		125
139 
140 /* Default recipes have priority 4 and below, hence priority values between 5..7
141  * can be used as filter priority for advanced switch filter (advanced switch
142  * filters need new recipe to be created for specified extraction sequence
143  * because default recipe extraction sequence does not represent custom
144  * extraction)
145  */
146 #define ICE_SWITCH_FLTR_PRIO_QUEUE	7
147 /* prio 6 is reserved for future use (e.g. switch filter with L3 fields +
148  * (Optional: IP TOS/TTL) + L4 fields + (optionally: TCP fields such as
149  * SYN/FIN/RST))
150  */
151 #define ICE_SWITCH_FLTR_PRIO_RSVD	6
152 #define ICE_SWITCH_FLTR_PRIO_VSI	5
153 #define ICE_SWITCH_FLTR_PRIO_QGRP	ICE_SWITCH_FLTR_PRIO_VSI
154 
155 /* Macro for each VSI in a PF */
156 #define ice_for_each_vsi(pf, i) \
157 	for ((i) = 0; (i) < (pf)->num_alloc_vsi; (i)++)
158 
159 /* Macros for each Tx/Xdp/Rx ring in a VSI */
160 #define ice_for_each_txq(vsi, i) \
161 	for ((i) = 0; (i) < (vsi)->num_txq; (i)++)
162 
163 #define ice_for_each_xdp_txq(vsi, i) \
164 	for ((i) = 0; (i) < (vsi)->num_xdp_txq; (i)++)
165 
166 #define ice_for_each_rxq(vsi, i) \
167 	for ((i) = 0; (i) < (vsi)->num_rxq; (i)++)
168 
169 /* Macros for each allocated Tx/Rx ring whether used or not in a VSI */
170 #define ice_for_each_alloc_txq(vsi, i) \
171 	for ((i) = 0; (i) < (vsi)->alloc_txq; (i)++)
172 
173 #define ice_for_each_alloc_rxq(vsi, i) \
174 	for ((i) = 0; (i) < (vsi)->alloc_rxq; (i)++)
175 
176 #define ice_for_each_q_vector(vsi, i) \
177 	for ((i) = 0; (i) < (vsi)->num_q_vectors; (i)++)
178 
179 #define ice_for_each_chnl_tc(i)	\
180 	for ((i) = ICE_CHNL_START_TC; (i) < ICE_CHNL_MAX_TC; (i)++)
181 
182 #define ICE_UCAST_PROMISC_BITS (ICE_PROMISC_UCAST_TX | ICE_PROMISC_UCAST_RX)
183 
184 #define ICE_UCAST_VLAN_PROMISC_BITS (ICE_PROMISC_UCAST_TX | \
185 				     ICE_PROMISC_UCAST_RX | \
186 				     ICE_PROMISC_VLAN_TX  | \
187 				     ICE_PROMISC_VLAN_RX)
188 
189 #define ICE_MCAST_PROMISC_BITS (ICE_PROMISC_MCAST_TX | ICE_PROMISC_MCAST_RX)
190 
191 #define ICE_MCAST_VLAN_PROMISC_BITS (ICE_PROMISC_MCAST_TX | \
192 				     ICE_PROMISC_MCAST_RX | \
193 				     ICE_PROMISC_VLAN_TX  | \
194 				     ICE_PROMISC_VLAN_RX)
195 
196 #define ice_pf_to_dev(pf) (&((pf)->pdev->dev))
197 
198 enum ice_feature {
199 	ICE_F_DSCP,
200 	ICE_F_PTP_EXTTS,
201 	ICE_F_SMA_CTRL,
202 	ICE_F_GNSS,
203 	ICE_F_ROCE_LAG,
204 	ICE_F_SRIOV_LAG,
205 	ICE_F_MBX_LIMIT,
206 	ICE_F_MAX
207 };
208 
209 DECLARE_STATIC_KEY_FALSE(ice_xdp_locking_key);
210 
211 struct ice_channel {
212 	struct list_head list;
213 	u8 type;
214 	u16 sw_id;
215 	u16 base_q;
216 	u16 num_rxq;
217 	u16 num_txq;
218 	u16 vsi_num;
219 	u8 ena_tc;
220 	struct ice_aqc_vsi_props info;
221 	u64 max_tx_rate;
222 	u64 min_tx_rate;
223 	atomic_t num_sb_fltr;
224 	struct ice_vsi *ch_vsi;
225 };
226 
227 struct ice_txq_meta {
228 	u32 q_teid;	/* Tx-scheduler element identifier */
229 	u16 q_id;	/* Entry in VSI's txq_map bitmap */
230 	u16 q_handle;	/* Relative index of Tx queue within TC */
231 	u16 vsi_idx;	/* VSI index that Tx queue belongs to */
232 	u8 tc;		/* TC number that Tx queue belongs to */
233 };
234 
235 struct ice_tc_info {
236 	u16 qoffset;
237 	u16 qcount_tx;
238 	u16 qcount_rx;
239 	u8 netdev_tc;
240 };
241 
242 struct ice_tc_cfg {
243 	u8 numtc; /* Total number of enabled TCs */
244 	u16 ena_tc; /* Tx map */
245 	struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS];
246 };
247 
248 struct ice_qs_cfg {
249 	struct mutex *qs_mutex;  /* will be assigned to &pf->avail_q_mutex */
250 	unsigned long *pf_map;
251 	unsigned long pf_map_size;
252 	unsigned int q_count;
253 	unsigned int scatter_count;
254 	u16 *vsi_map;
255 	u16 vsi_map_offset;
256 	u8 mapping_mode;
257 };
258 
259 struct ice_sw {
260 	struct ice_pf *pf;
261 	u16 sw_id;		/* switch ID for this switch */
262 	u16 bridge_mode;	/* VEB/VEPA/Port Virtualizer */
263 };
264 
265 enum ice_pf_state {
266 	ICE_TESTING,
267 	ICE_DOWN,
268 	ICE_NEEDS_RESTART,
269 	ICE_PREPARED_FOR_RESET,	/* set by driver when prepared */
270 	ICE_RESET_OICR_RECV,		/* set by driver after rcv reset OICR */
271 	ICE_PFR_REQ,		/* set by driver */
272 	ICE_CORER_REQ,		/* set by driver */
273 	ICE_GLOBR_REQ,		/* set by driver */
274 	ICE_CORER_RECV,		/* set by OICR handler */
275 	ICE_GLOBR_RECV,		/* set by OICR handler */
276 	ICE_EMPR_RECV,		/* set by OICR handler */
277 	ICE_SUSPENDED,		/* set on module remove path */
278 	ICE_RESET_FAILED,		/* set by reset/rebuild */
279 	/* When checking for the PF to be in a nominal operating state, the
280 	 * bits that are grouped at the beginning of the list need to be
281 	 * checked. Bits occurring before ICE_STATE_NOMINAL_CHECK_BITS will
282 	 * be checked. If you need to add a bit into consideration for nominal
283 	 * operating state, it must be added before
284 	 * ICE_STATE_NOMINAL_CHECK_BITS. Do not move this entry's position
285 	 * without appropriate consideration.
286 	 */
287 	ICE_STATE_NOMINAL_CHECK_BITS,
288 	ICE_ADMINQ_EVENT_PENDING,
289 	ICE_MAILBOXQ_EVENT_PENDING,
290 	ICE_SIDEBANDQ_EVENT_PENDING,
291 	ICE_MDD_EVENT_PENDING,
292 	ICE_VFLR_EVENT_PENDING,
293 	ICE_FLTR_OVERFLOW_PROMISC,
294 	ICE_VF_DIS,
295 	ICE_CFG_BUSY,
296 	ICE_SERVICE_SCHED,
297 	ICE_SERVICE_DIS,
298 	ICE_FD_FLUSH_REQ,
299 	ICE_OICR_INTR_DIS,		/* Global OICR interrupt disabled */
300 	ICE_MDD_VF_PRINT_PENDING,	/* set when MDD event handle */
301 	ICE_VF_RESETS_DISABLED,	/* disable resets during ice_remove */
302 	ICE_LINK_DEFAULT_OVERRIDE_PENDING,
303 	ICE_PHY_INIT_COMPLETE,
304 	ICE_FD_VF_FLUSH_CTX,		/* set at FD Rx IRQ or timeout */
305 	ICE_AUX_ERR_PENDING,
306 	ICE_STATE_NBITS		/* must be last */
307 };
308 
309 enum ice_vsi_state {
310 	ICE_VSI_DOWN,
311 	ICE_VSI_NEEDS_RESTART,
312 	ICE_VSI_NETDEV_ALLOCD,
313 	ICE_VSI_NETDEV_REGISTERED,
314 	ICE_VSI_UMAC_FLTR_CHANGED,
315 	ICE_VSI_MMAC_FLTR_CHANGED,
316 	ICE_VSI_PROMISC_CHANGED,
317 	ICE_VSI_REBUILD_PENDING,
318 	ICE_VSI_STATE_NBITS		/* must be last */
319 };
320 
321 struct ice_vsi_stats {
322 	struct ice_ring_stats **tx_ring_stats;  /* Tx ring stats array */
323 	struct ice_ring_stats **rx_ring_stats;  /* Rx ring stats array */
324 };
325 
326 /* struct that defines a VSI, associated with a dev */
327 struct ice_vsi {
328 	struct net_device *netdev;
329 	struct ice_sw *vsw;		 /* switch this VSI is on */
330 	struct ice_pf *back;		 /* back pointer to PF */
331 	struct ice_port_info *port_info; /* back pointer to port_info */
332 	struct ice_rx_ring **rx_rings;	 /* Rx ring array */
333 	struct ice_tx_ring **tx_rings;	 /* Tx ring array */
334 	struct ice_q_vector **q_vectors; /* q_vector array */
335 
336 	irqreturn_t (*irq_handler)(int irq, void *data);
337 
338 	u64 tx_linearize;
339 	DECLARE_BITMAP(state, ICE_VSI_STATE_NBITS);
340 	unsigned int current_netdev_flags;
341 	u32 tx_restart;
342 	u32 tx_busy;
343 	u32 rx_buf_failed;
344 	u32 rx_page_failed;
345 	u16 num_q_vectors;
346 	/* tell if only dynamic irq allocation is allowed */
347 	bool irq_dyn_alloc;
348 
349 	enum ice_vsi_type type;
350 	u16 vsi_num;			/* HW (absolute) index of this VSI */
351 	u16 idx;			/* software index in pf->vsi[] */
352 
353 	struct ice_vf *vf;		/* VF associated with this VSI */
354 
355 	u16 num_gfltr;
356 	u16 num_bfltr;
357 
358 	/* RSS config */
359 	u16 rss_table_size;	/* HW RSS table size */
360 	u16 rss_size;		/* Allocated RSS queues */
361 	u8 *rss_hkey_user;	/* User configured hash keys */
362 	u8 *rss_lut_user;	/* User configured lookup table entries */
363 	u8 rss_lut_type;	/* used to configure Get/Set RSS LUT AQ call */
364 
365 	/* aRFS members only allocated for the PF VSI */
366 #define ICE_MAX_ARFS_LIST	1024
367 #define ICE_ARFS_LST_MASK	(ICE_MAX_ARFS_LIST - 1)
368 	struct hlist_head *arfs_fltr_list;
369 	struct ice_arfs_active_fltr_cntrs *arfs_fltr_cntrs;
370 	spinlock_t arfs_lock;	/* protects aRFS hash table and filter state */
371 	atomic_t *arfs_last_fltr_id;
372 
373 	u16 max_frame;
374 	u16 rx_buf_len;
375 
376 	struct ice_aqc_vsi_props info;	 /* VSI properties */
377 	struct ice_vsi_vlan_info vlan_info;	/* vlan config to be restored */
378 
379 	/* VSI stats */
380 	struct rtnl_link_stats64 net_stats;
381 	struct rtnl_link_stats64 net_stats_prev;
382 	struct ice_eth_stats eth_stats;
383 	struct ice_eth_stats eth_stats_prev;
384 
385 	struct list_head tmp_sync_list;		/* MAC filters to be synced */
386 	struct list_head tmp_unsync_list;	/* MAC filters to be unsynced */
387 
388 	u8 irqs_ready:1;
389 	u8 current_isup:1;		 /* Sync 'link up' logging */
390 	u8 stat_offsets_loaded:1;
391 	struct ice_vsi_vlan_ops inner_vlan_ops;
392 	struct ice_vsi_vlan_ops outer_vlan_ops;
393 	u16 num_vlan;
394 
395 	/* queue information */
396 	u8 tx_mapping_mode;		 /* ICE_MAP_MODE_[CONTIG|SCATTER] */
397 	u8 rx_mapping_mode;		 /* ICE_MAP_MODE_[CONTIG|SCATTER] */
398 	u16 *txq_map;			 /* index in pf->avail_txqs */
399 	u16 *rxq_map;			 /* index in pf->avail_rxqs */
400 	u16 alloc_txq;			 /* Allocated Tx queues */
401 	u16 num_txq;			 /* Used Tx queues */
402 	u16 alloc_rxq;			 /* Allocated Rx queues */
403 	u16 num_rxq;			 /* Used Rx queues */
404 	u16 req_txq;			 /* User requested Tx queues */
405 	u16 req_rxq;			 /* User requested Rx queues */
406 	u16 num_rx_desc;
407 	u16 num_tx_desc;
408 	u16 qset_handle[ICE_MAX_TRAFFIC_CLASS];
409 	struct ice_tc_cfg tc_cfg;
410 	struct bpf_prog *xdp_prog;
411 	struct ice_tx_ring **xdp_rings;	 /* XDP ring array */
412 	u16 num_xdp_txq;		 /* Used XDP queues */
413 	u8 xdp_mapping_mode;		 /* ICE_MAP_MODE_[CONTIG|SCATTER] */
414 	struct mutex xdp_state_lock;
415 
416 	struct net_device **target_netdevs;
417 
418 	struct tc_mqprio_qopt_offload mqprio_qopt; /* queue parameters */
419 
420 	/* Channel Specific Fields */
421 	struct ice_vsi *tc_map_vsi[ICE_CHNL_MAX_TC];
422 	u16 cnt_q_avail;
423 	u16 next_base_q;	/* next queue to be used for channel setup */
424 	struct list_head ch_list;
425 	u16 num_chnl_rxq;
426 	u16 num_chnl_txq;
427 	u16 ch_rss_size;
428 	u16 num_chnl_fltr;
429 	/* store away rss size info before configuring ADQ channels so that,
430 	 * it can be used after tc-qdisc delete, to get back RSS setting as
431 	 * they were before
432 	 */
433 	u16 orig_rss_size;
434 	/* this keeps tracks of all enabled TC with and without DCB
435 	 * and inclusive of ADQ, vsi->mqprio_opt keeps track of queue
436 	 * information
437 	 */
438 	u8 all_numtc;
439 	u16 all_enatc;
440 
441 	/* store away TC info, to be used for rebuild logic */
442 	u8 old_numtc;
443 	u16 old_ena_tc;
444 
445 	struct ice_channel *ch;
446 
447 	/* setup back reference, to which aggregator node this VSI
448 	 * corresponds to
449 	 */
450 	struct ice_agg_node *agg_node;
451 } ____cacheline_internodealigned_in_smp;
452 
453 /* struct that defines an interrupt vector */
454 struct ice_q_vector {
455 	struct ice_vsi *vsi;
456 
457 	u16 v_idx;			/* index in the vsi->q_vector array. */
458 	u16 reg_idx;
459 	u8 num_ring_rx;			/* total number of Rx rings in vector */
460 	u8 num_ring_tx;			/* total number of Tx rings in vector */
461 	u8 wb_on_itr:1;			/* if true, WB on ITR is enabled */
462 	/* in usecs, need to use ice_intrl_to_usecs_reg() before writing this
463 	 * value to the device
464 	 */
465 	u8 intrl;
466 
467 	struct napi_struct napi;
468 
469 	struct ice_ring_container rx;
470 	struct ice_ring_container tx;
471 
472 	cpumask_t affinity_mask;
473 	struct irq_affinity_notify affinity_notify;
474 
475 	struct ice_channel *ch;
476 
477 	char name[ICE_INT_NAME_STR_LEN];
478 
479 	u16 total_events;	/* net_dim(): number of interrupts processed */
480 	struct msi_map irq;
481 } ____cacheline_internodealigned_in_smp;
482 
483 enum ice_pf_flags {
484 	ICE_FLAG_FLTR_SYNC,
485 	ICE_FLAG_RDMA_ENA,
486 	ICE_FLAG_RSS_ENA,
487 	ICE_FLAG_SRIOV_ENA,
488 	ICE_FLAG_SRIOV_CAPABLE,
489 	ICE_FLAG_DCB_CAPABLE,
490 	ICE_FLAG_DCB_ENA,
491 	ICE_FLAG_FD_ENA,
492 	ICE_FLAG_PTP_SUPPORTED,		/* PTP is supported by NVM */
493 	ICE_FLAG_PTP,			/* PTP is enabled by software */
494 	ICE_FLAG_ADV_FEATURES,
495 	ICE_FLAG_TC_MQPRIO,		/* support for Multi queue TC */
496 	ICE_FLAG_CLS_FLOWER,
497 	ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA,
498 	ICE_FLAG_TOTAL_PORT_SHUTDOWN_ENA,
499 	ICE_FLAG_NO_MEDIA,
500 	ICE_FLAG_FW_LLDP_AGENT,
501 	ICE_FLAG_MOD_POWER_UNSUPPORTED,
502 	ICE_FLAG_PHY_FW_LOAD_FAILED,
503 	ICE_FLAG_ETHTOOL_CTXT,		/* set when ethtool holds RTNL lock */
504 	ICE_FLAG_LEGACY_RX,
505 	ICE_FLAG_VF_TRUE_PROMISC_ENA,
506 	ICE_FLAG_MDD_AUTO_RESET_VF,
507 	ICE_FLAG_VF_VLAN_PRUNING,
508 	ICE_FLAG_LINK_LENIENT_MODE_ENA,
509 	ICE_FLAG_PLUG_AUX_DEV,
510 	ICE_FLAG_UNPLUG_AUX_DEV,
511 	ICE_FLAG_MTU_CHANGED,
512 	ICE_FLAG_GNSS,			/* GNSS successfully initialized */
513 	ICE_PF_FLAGS_NBITS		/* must be last */
514 };
515 
516 enum ice_misc_thread_tasks {
517 	ICE_MISC_THREAD_EXTTS_EVENT,
518 	ICE_MISC_THREAD_TX_TSTAMP,
519 	ICE_MISC_THREAD_NBITS		/* must be last */
520 };
521 
522 struct ice_eswitch {
523 	struct ice_vsi *control_vsi;
524 	struct ice_vsi *uplink_vsi;
525 	struct ice_esw_br_offloads *br_offloads;
526 	bool is_running;
527 };
528 
529 struct ice_agg_node {
530 	u32 agg_id;
531 #define ICE_MAX_VSIS_IN_AGG_NODE	64
532 	u32 num_vsis;
533 	u8 valid;
534 };
535 
536 struct ice_pf {
537 	struct pci_dev *pdev;
538 
539 	struct devlink_region *nvm_region;
540 	struct devlink_region *sram_region;
541 	struct devlink_region *devcaps_region;
542 
543 	/* devlink port data */
544 	struct devlink_port devlink_port;
545 
546 	/* OS reserved IRQ details */
547 	struct msix_entry *msix_entries;
548 	struct ice_irq_tracker irq_tracker;
549 	/* First MSIX vector used by SR-IOV VFs. Calculated by subtracting the
550 	 * number of MSIX vectors needed for all SR-IOV VFs from the number of
551 	 * MSIX vectors allowed on this PF.
552 	 */
553 	u16 sriov_base_vector;
554 
555 	u16 ctrl_vsi_idx;		/* control VSI index in pf->vsi array */
556 
557 	struct ice_vsi **vsi;		/* VSIs created by the driver */
558 	struct ice_vsi_stats **vsi_stats;
559 	struct ice_sw *first_sw;	/* first switch created by firmware */
560 	u16 eswitch_mode;		/* current mode of eswitch */
561 	struct ice_vfs vfs;
562 	DECLARE_BITMAP(features, ICE_F_MAX);
563 	DECLARE_BITMAP(state, ICE_STATE_NBITS);
564 	DECLARE_BITMAP(flags, ICE_PF_FLAGS_NBITS);
565 	DECLARE_BITMAP(misc_thread, ICE_MISC_THREAD_NBITS);
566 	unsigned long *avail_txqs;	/* bitmap to track PF Tx queue usage */
567 	unsigned long *avail_rxqs;	/* bitmap to track PF Rx queue usage */
568 	unsigned long serv_tmr_period;
569 	unsigned long serv_tmr_prev;
570 	struct timer_list serv_tmr;
571 	struct work_struct serv_task;
572 	struct mutex avail_q_mutex;	/* protects access to avail_[rx|tx]qs */
573 	struct mutex sw_mutex;		/* lock for protecting VSI alloc flow */
574 	struct mutex tc_mutex;		/* lock to protect TC changes */
575 	struct mutex adev_mutex;	/* lock to protect aux device access */
576 	struct mutex lag_mutex;		/* protect ice_lag struct in PF */
577 	u32 msg_enable;
578 	struct ice_ptp ptp;
579 	struct gnss_serial *gnss_serial;
580 	struct gnss_device *gnss_dev;
581 	u16 num_rdma_msix;		/* Total MSIX vectors for RDMA driver */
582 	u16 rdma_base_vector;
583 
584 	/* spinlock to protect the AdminQ wait list */
585 	spinlock_t aq_wait_lock;
586 	struct hlist_head aq_wait_list;
587 	wait_queue_head_t aq_wait_queue;
588 	bool fw_emp_reset_disabled;
589 
590 	wait_queue_head_t reset_wait_queue;
591 
592 	u32 hw_csum_rx_error;
593 	u32 oicr_err_reg;
594 	struct msi_map oicr_irq;	/* Other interrupt cause MSIX vector */
595 	u16 max_pf_txqs;	/* Total Tx queues PF wide */
596 	u16 max_pf_rxqs;	/* Total Rx queues PF wide */
597 	u16 num_lan_msix;	/* Total MSIX vectors for base driver */
598 	u16 num_lan_tx;		/* num LAN Tx queues setup */
599 	u16 num_lan_rx;		/* num LAN Rx queues setup */
600 	u16 next_vsi;		/* Next free slot in pf->vsi[] - 0-based! */
601 	u16 num_alloc_vsi;
602 	u16 corer_count;	/* Core reset count */
603 	u16 globr_count;	/* Global reset count */
604 	u16 empr_count;		/* EMP reset count */
605 	u16 pfr_count;		/* PF reset count */
606 
607 	u8 wol_ena : 1;		/* software state of WoL */
608 	u32 wakeup_reason;	/* last wakeup reason */
609 	struct ice_hw_port_stats stats;
610 	struct ice_hw_port_stats stats_prev;
611 	struct ice_hw hw;
612 	u8 stat_prev_loaded:1; /* has previous stats been loaded */
613 	u8 rdma_mode;
614 	u16 dcbx_cap;
615 	u32 tx_timeout_count;
616 	unsigned long tx_timeout_last_recovery;
617 	u32 tx_timeout_recovery_level;
618 	char int_name[ICE_INT_NAME_STR_LEN];
619 	struct auxiliary_device *adev;
620 	int aux_idx;
621 	u32 sw_int_count;
622 	/* count of tc_flower filters specific to channel (aka where filter
623 	 * action is "hw_tc <tc_num>")
624 	 */
625 	u16 num_dmac_chnl_fltrs;
626 	struct hlist_head tc_flower_fltr_list;
627 
628 	u64 supported_rxdids;
629 
630 	__le64 nvm_phy_type_lo; /* NVM PHY type low */
631 	__le64 nvm_phy_type_hi; /* NVM PHY type high */
632 	struct ice_link_default_override_tlv link_dflt_override;
633 	struct ice_lag *lag; /* Link Aggregation information */
634 
635 	struct ice_eswitch eswitch;
636 	struct ice_esw_br_port *br_port;
637 
638 #define ICE_INVALID_AGG_NODE_ID		0
639 #define ICE_PF_AGG_NODE_ID_START	1
640 #define ICE_MAX_PF_AGG_NODES		32
641 	struct ice_agg_node pf_agg_node[ICE_MAX_PF_AGG_NODES];
642 #define ICE_VF_AGG_NODE_ID_START	65
643 #define ICE_MAX_VF_AGG_NODES		32
644 	struct ice_agg_node vf_agg_node[ICE_MAX_VF_AGG_NODES];
645 };
646 
647 extern struct workqueue_struct *ice_lag_wq;
648 
649 struct ice_netdev_priv {
650 	struct ice_vsi *vsi;
651 	struct ice_repr *repr;
652 	/* indirect block callbacks on registered higher level devices
653 	 * (e.g. tunnel devices)
654 	 *
655 	 * tc_indr_block_cb_priv_list is used to look up indirect callback
656 	 * private data
657 	 */
658 	struct list_head tc_indr_block_priv_list;
659 };
660 
661 /**
662  * ice_vector_ch_enabled
663  * @qv: pointer to q_vector, can be NULL
664  *
665  * This function returns true if vector is channel enabled otherwise false
666  */
ice_vector_ch_enabled(struct ice_q_vector * qv)667 static inline bool ice_vector_ch_enabled(struct ice_q_vector *qv)
668 {
669 	return !!qv->ch; /* Enable it to run with TC */
670 }
671 
672 /**
673  * ice_irq_dynamic_ena - Enable default interrupt generation settings
674  * @hw: pointer to HW struct
675  * @vsi: pointer to VSI struct, can be NULL
676  * @q_vector: pointer to q_vector, can be NULL
677  */
678 static inline void
ice_irq_dynamic_ena(struct ice_hw * hw,struct ice_vsi * vsi,struct ice_q_vector * q_vector)679 ice_irq_dynamic_ena(struct ice_hw *hw, struct ice_vsi *vsi,
680 		    struct ice_q_vector *q_vector)
681 {
682 	u32 vector = (vsi && q_vector) ? q_vector->reg_idx :
683 				((struct ice_pf *)hw->back)->oicr_irq.index;
684 	int itr = ICE_ITR_NONE;
685 	u32 val;
686 
687 	/* clear the PBA here, as this function is meant to clean out all
688 	 * previous interrupts and enable the interrupt
689 	 */
690 	val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M |
691 	      (itr << GLINT_DYN_CTL_ITR_INDX_S);
692 	if (vsi)
693 		if (test_bit(ICE_VSI_DOWN, vsi->state))
694 			return;
695 	wr32(hw, GLINT_DYN_CTL(vector), val);
696 }
697 
698 /**
699  * ice_netdev_to_pf - Retrieve the PF struct associated with a netdev
700  * @netdev: pointer to the netdev struct
701  */
ice_netdev_to_pf(struct net_device * netdev)702 static inline struct ice_pf *ice_netdev_to_pf(struct net_device *netdev)
703 {
704 	struct ice_netdev_priv *np = netdev_priv(netdev);
705 
706 	return np->vsi->back;
707 }
708 
ice_is_xdp_ena_vsi(struct ice_vsi * vsi)709 static inline bool ice_is_xdp_ena_vsi(struct ice_vsi *vsi)
710 {
711 	return !!READ_ONCE(vsi->xdp_prog);
712 }
713 
ice_set_ring_xdp(struct ice_tx_ring * ring)714 static inline void ice_set_ring_xdp(struct ice_tx_ring *ring)
715 {
716 	ring->flags |= ICE_TX_FLAGS_RING_XDP;
717 }
718 
719 /**
720  * ice_get_xp_from_qid - get ZC XSK buffer pool bound to a queue ID
721  * @vsi: pointer to VSI
722  * @qid: index of a queue to look at XSK buff pool presence
723  *
724  * Return: A pointer to xsk_buff_pool structure if there is a buffer pool
725  * attached and configured as zero-copy, NULL otherwise.
726  */
ice_get_xp_from_qid(struct ice_vsi * vsi,u16 qid)727 static inline struct xsk_buff_pool *ice_get_xp_from_qid(struct ice_vsi *vsi,
728 							u16 qid)
729 {
730 	struct xsk_buff_pool *pool = xsk_get_pool_from_qid(vsi->netdev, qid);
731 
732 	if (!ice_is_xdp_ena_vsi(vsi))
733 		return NULL;
734 
735 	return (pool && pool->dev) ? pool : NULL;
736 }
737 
738 /**
739  * ice_xsk_pool - get XSK buffer pool bound to a ring
740  * @ring: Rx ring to use
741  *
742  * Returns a pointer to xsk_buff_pool structure if there is a buffer pool
743  * present, NULL otherwise.
744  */
ice_xsk_pool(struct ice_rx_ring * ring)745 static inline struct xsk_buff_pool *ice_xsk_pool(struct ice_rx_ring *ring)
746 {
747 	struct ice_vsi *vsi = ring->vsi;
748 	u16 qid = ring->q_index;
749 
750 	return ice_get_xp_from_qid(vsi, qid);
751 }
752 
753 /**
754  * ice_tx_xsk_pool - assign XSK buff pool to XDP ring
755  * @vsi: pointer to VSI
756  * @qid: index of a queue to look at XSK buff pool presence
757  *
758  * Sets XSK buff pool pointer on XDP ring.
759  *
760  * XDP ring is picked from Rx ring, whereas Rx ring is picked based on provided
761  * queue id. Reason for doing so is that queue vectors might have assigned more
762  * than one XDP ring, e.g. when user reduced the queue count on netdev; Rx ring
763  * carries a pointer to one of these XDP rings for its own purposes, such as
764  * handling XDP_TX action, therefore we can piggyback here on the
765  * rx_ring->xdp_ring assignment that was done during XDP rings initialization.
766  */
ice_tx_xsk_pool(struct ice_vsi * vsi,u16 qid)767 static inline void ice_tx_xsk_pool(struct ice_vsi *vsi, u16 qid)
768 {
769 	struct ice_tx_ring *ring;
770 
771 	ring = vsi->rx_rings[qid]->xdp_ring;
772 	if (!ring)
773 		return;
774 
775 	ring->xsk_pool = ice_get_xp_from_qid(vsi, qid);
776 }
777 
778 /**
779  * ice_get_main_vsi - Get the PF VSI
780  * @pf: PF instance
781  *
782  * returns pf->vsi[0], which by definition is the PF VSI
783  */
ice_get_main_vsi(struct ice_pf * pf)784 static inline struct ice_vsi *ice_get_main_vsi(struct ice_pf *pf)
785 {
786 	if (pf->vsi)
787 		return pf->vsi[0];
788 
789 	return NULL;
790 }
791 
792 /**
793  * ice_get_netdev_priv_vsi - return VSI associated with netdev priv.
794  * @np: private netdev structure
795  */
ice_get_netdev_priv_vsi(struct ice_netdev_priv * np)796 static inline struct ice_vsi *ice_get_netdev_priv_vsi(struct ice_netdev_priv *np)
797 {
798 	/* In case of port representor return source port VSI. */
799 	if (np->repr)
800 		return np->repr->src_vsi;
801 	else
802 		return np->vsi;
803 }
804 
805 /**
806  * ice_get_ctrl_vsi - Get the control VSI
807  * @pf: PF instance
808  */
ice_get_ctrl_vsi(struct ice_pf * pf)809 static inline struct ice_vsi *ice_get_ctrl_vsi(struct ice_pf *pf)
810 {
811 	/* if pf->ctrl_vsi_idx is ICE_NO_VSI, control VSI was not set up */
812 	if (!pf->vsi || pf->ctrl_vsi_idx == ICE_NO_VSI)
813 		return NULL;
814 
815 	return pf->vsi[pf->ctrl_vsi_idx];
816 }
817 
818 /**
819  * ice_find_vsi - Find the VSI from VSI ID
820  * @pf: The PF pointer to search in
821  * @vsi_num: The VSI ID to search for
822  */
ice_find_vsi(struct ice_pf * pf,u16 vsi_num)823 static inline struct ice_vsi *ice_find_vsi(struct ice_pf *pf, u16 vsi_num)
824 {
825 	int i;
826 
827 	ice_for_each_vsi(pf, i)
828 		if (pf->vsi[i] && pf->vsi[i]->vsi_num == vsi_num)
829 			return  pf->vsi[i];
830 	return NULL;
831 }
832 
833 /**
834  * ice_is_switchdev_running - check if switchdev is configured
835  * @pf: pointer to PF structure
836  *
837  * Returns true if eswitch mode is set to DEVLINK_ESWITCH_MODE_SWITCHDEV
838  * and switchdev is configured, false otherwise.
839  */
ice_is_switchdev_running(struct ice_pf * pf)840 static inline bool ice_is_switchdev_running(struct ice_pf *pf)
841 {
842 	return pf->eswitch.is_running;
843 }
844 
845 #define ICE_FD_STAT_CTR_BLOCK_COUNT	256
846 #define ICE_FD_STAT_PF_IDX(base_idx) \
847 			((base_idx) * ICE_FD_STAT_CTR_BLOCK_COUNT)
848 #define ICE_FD_SB_STAT_IDX(base_idx) ICE_FD_STAT_PF_IDX(base_idx)
849 #define ICE_FD_STAT_CH			1
850 #define ICE_FD_CH_STAT_IDX(base_idx) \
851 			(ICE_FD_STAT_PF_IDX(base_idx) + ICE_FD_STAT_CH)
852 
853 /**
854  * ice_is_adq_active - any active ADQs
855  * @pf: pointer to PF
856  *
857  * This function returns true if there are any ADQs configured (which is
858  * determined by looking at VSI type (which should be VSI_PF), numtc, and
859  * TC_MQPRIO flag) otherwise return false
860  */
ice_is_adq_active(struct ice_pf * pf)861 static inline bool ice_is_adq_active(struct ice_pf *pf)
862 {
863 	struct ice_vsi *vsi;
864 
865 	vsi = ice_get_main_vsi(pf);
866 	if (!vsi)
867 		return false;
868 
869 	/* is ADQ configured */
870 	if (vsi->tc_cfg.numtc > ICE_CHNL_START_TC &&
871 	    test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))
872 		return true;
873 
874 	return false;
875 }
876 
877 bool netif_is_ice(const struct net_device *dev);
878 int ice_vsi_setup_tx_rings(struct ice_vsi *vsi);
879 int ice_vsi_setup_rx_rings(struct ice_vsi *vsi);
880 int ice_vsi_open_ctrl(struct ice_vsi *vsi);
881 int ice_vsi_open(struct ice_vsi *vsi);
882 void ice_set_ethtool_ops(struct net_device *netdev);
883 void ice_set_ethtool_repr_ops(struct net_device *netdev);
884 void ice_set_ethtool_safe_mode_ops(struct net_device *netdev);
885 u16 ice_get_avail_txq_count(struct ice_pf *pf);
886 u16 ice_get_avail_rxq_count(struct ice_pf *pf);
887 int ice_vsi_recfg_qs(struct ice_vsi *vsi, int new_rx, int new_tx, bool locked);
888 void ice_update_vsi_stats(struct ice_vsi *vsi);
889 void ice_update_pf_stats(struct ice_pf *pf);
890 void
891 ice_fetch_u64_stats_per_ring(struct u64_stats_sync *syncp,
892 			     struct ice_q_stats stats, u64 *pkts, u64 *bytes);
893 int ice_up(struct ice_vsi *vsi);
894 int ice_down(struct ice_vsi *vsi);
895 int ice_down_up(struct ice_vsi *vsi);
896 int ice_vsi_cfg_lan(struct ice_vsi *vsi);
897 struct ice_vsi *ice_lb_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi);
898 
899 enum ice_xdp_cfg {
900 	ICE_XDP_CFG_FULL,	/* Fully apply new config in .ndo_bpf() */
901 	ICE_XDP_CFG_PART,	/* Save/use part of config in VSI rebuild */
902 };
903 
904 int ice_vsi_determine_xdp_res(struct ice_vsi *vsi);
905 int ice_prepare_xdp_rings(struct ice_vsi *vsi, struct bpf_prog *prog,
906 			  enum ice_xdp_cfg cfg_type);
907 int ice_destroy_xdp_rings(struct ice_vsi *vsi, enum ice_xdp_cfg cfg_type);
908 int
909 ice_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames,
910 	     u32 flags);
911 int ice_set_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size);
912 int ice_get_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size);
913 int ice_set_rss_key(struct ice_vsi *vsi, u8 *seed);
914 int ice_get_rss_key(struct ice_vsi *vsi, u8 *seed);
915 void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size);
916 int ice_schedule_reset(struct ice_pf *pf, enum ice_reset_req reset);
917 void ice_print_link_msg(struct ice_vsi *vsi, bool isup);
918 int ice_plug_aux_dev(struct ice_pf *pf);
919 void ice_unplug_aux_dev(struct ice_pf *pf);
920 int ice_init_rdma(struct ice_pf *pf);
921 void ice_deinit_rdma(struct ice_pf *pf);
922 const char *ice_aq_str(enum ice_aq_err aq_err);
923 bool ice_is_wol_supported(struct ice_hw *hw);
924 void ice_fdir_del_all_fltrs(struct ice_vsi *vsi);
925 int
926 ice_fdir_write_fltr(struct ice_pf *pf, struct ice_fdir_fltr *input, bool add,
927 		    bool is_tun);
928 void ice_vsi_manage_fdir(struct ice_vsi *vsi, bool ena);
929 int ice_add_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd);
930 int ice_del_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd);
931 int ice_get_ethtool_fdir_entry(struct ice_hw *hw, struct ethtool_rxnfc *cmd);
932 int
933 ice_get_fdir_fltr_ids(struct ice_hw *hw, struct ethtool_rxnfc *cmd,
934 		      u32 *rule_locs);
935 void ice_fdir_rem_adq_chnl(struct ice_hw *hw, u16 vsi_idx);
936 void ice_fdir_release_flows(struct ice_hw *hw);
937 void ice_fdir_replay_flows(struct ice_hw *hw);
938 void ice_fdir_replay_fltrs(struct ice_pf *pf);
939 int ice_fdir_create_dflt_rules(struct ice_pf *pf);
940 
941 enum ice_aq_task_state {
942 	ICE_AQ_TASK_NOT_PREPARED,
943 	ICE_AQ_TASK_WAITING,
944 	ICE_AQ_TASK_COMPLETE,
945 	ICE_AQ_TASK_CANCELED,
946 };
947 
948 struct ice_aq_task {
949 	struct hlist_node entry;
950 	struct ice_rq_event_info event;
951 	enum ice_aq_task_state state;
952 	u16 opcode;
953 };
954 
955 void ice_aq_prep_for_event(struct ice_pf *pf, struct ice_aq_task *task,
956 			   u16 opcode);
957 int ice_aq_wait_for_event(struct ice_pf *pf, struct ice_aq_task *task,
958 			  unsigned long timeout);
959 int ice_open(struct net_device *netdev);
960 int ice_open_internal(struct net_device *netdev);
961 int ice_stop(struct net_device *netdev);
962 void ice_service_task_schedule(struct ice_pf *pf);
963 int ice_load(struct ice_pf *pf);
964 void ice_unload(struct ice_pf *pf);
965 
966 /**
967  * ice_set_rdma_cap - enable RDMA support
968  * @pf: PF struct
969  */
ice_set_rdma_cap(struct ice_pf * pf)970 static inline void ice_set_rdma_cap(struct ice_pf *pf)
971 {
972 	if (pf->hw.func_caps.common_cap.rdma && pf->num_rdma_msix) {
973 		set_bit(ICE_FLAG_RDMA_ENA, pf->flags);
974 		set_bit(ICE_FLAG_PLUG_AUX_DEV, pf->flags);
975 	}
976 }
977 
978 /**
979  * ice_clear_rdma_cap - disable RDMA support
980  * @pf: PF struct
981  */
ice_clear_rdma_cap(struct ice_pf * pf)982 static inline void ice_clear_rdma_cap(struct ice_pf *pf)
983 {
984 	/* defer unplug to service task to avoid RTNL lock and
985 	 * clear PLUG bit so that pending plugs don't interfere
986 	 */
987 	clear_bit(ICE_FLAG_PLUG_AUX_DEV, pf->flags);
988 	set_bit(ICE_FLAG_UNPLUG_AUX_DEV, pf->flags);
989 	clear_bit(ICE_FLAG_RDMA_ENA, pf->flags);
990 }
991 #endif /* _ICE_H_ */
992