1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Bluewater Systems Snapper 9260/9G20 modules
4 *
5 * (C) Copyright 2011 Bluewater Systems
6 * Author: Andre Renaud <andre@bluewatersys.com>
7 * Author: Ryan Mallon <ryan@bluewatersys.com>
8 */
9
10 #include <common.h>
11 #include <dm.h>
12 #include <asm/io.h>
13 #include <asm/gpio.h>
14 #include <asm/mach-types.h>
15 #include <asm/arch/at91sam9260_matrix.h>
16 #include <asm/arch/at91sam9_smc.h>
17 #include <asm/arch/at91_common.h>
18 #include <asm/arch/clk.h>
19 #include <asm/arch/gpio.h>
20 #include <asm/arch/atmel_serial.h>
21 #include <net.h>
22 #include <netdev.h>
23 #include <i2c.h>
24 #include <pca953x.h>
25
26 DECLARE_GLOBAL_DATA_PTR;
27
28 /* IO Expander pins */
29 #define IO_EXP_ETH_RESET (0 << 1)
30 #define IO_EXP_ETH_POWER (1 << 1)
31
macb_hw_init(void)32 static void macb_hw_init(void)
33 {
34 struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA;
35
36 at91_periph_clk_enable(ATMEL_ID_EMAC0);
37
38 /* Disable pull-ups to prevent PHY going into test mode */
39 writel(pin_to_mask(AT91_PIN_PA14) |
40 pin_to_mask(AT91_PIN_PA15) |
41 pin_to_mask(AT91_PIN_PA18),
42 &pioa->pudr);
43
44 /* Power down ethernet */
45 pca953x_set_dir(0x28, IO_EXP_ETH_POWER, PCA953X_DIR_OUT);
46 pca953x_set_val(0x28, IO_EXP_ETH_POWER, 1);
47
48 /* Hold ethernet in reset */
49 pca953x_set_dir(0x28, IO_EXP_ETH_RESET, PCA953X_DIR_OUT);
50 pca953x_set_val(0x28, IO_EXP_ETH_RESET, 0);
51
52 /* Enable ethernet power */
53 pca953x_set_val(0x28, IO_EXP_ETH_POWER, 0);
54
55 at91_phy_reset();
56
57 /* Bring the ethernet out of reset */
58 pca953x_set_val(0x28, IO_EXP_ETH_RESET, 1);
59
60 /* The phy internal reset take 21ms */
61 udelay(21 * 1000);
62
63 /* Re-enable pull-up */
64 writel(pin_to_mask(AT91_PIN_PA14) |
65 pin_to_mask(AT91_PIN_PA15) |
66 pin_to_mask(AT91_PIN_PA18),
67 &pioa->puer);
68
69 at91_macb_hw_init();
70 }
71
nand_hw_init(void)72 static void nand_hw_init(void)
73 {
74 struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
75 struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
76 unsigned long csa;
77
78 /* Enable CS3 as NAND/SmartMedia */
79 csa = readl(&matrix->ebicsa);
80 csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
81 writel(csa, &matrix->ebicsa);
82
83 /* Configure SMC CS3 for NAND/SmartMedia */
84 writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) |
85 AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0),
86 &smc->cs[3].setup);
87 writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(4) |
88 AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(4),
89 &smc->cs[3].pulse);
90 writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(7),
91 &smc->cs[3].cycle);
92 writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
93 AT91_SMC_MODE_EXNW_DISABLE |
94 AT91_SMC_MODE_DBW_8 |
95 AT91_SMC_MODE_TDF_CYCLE(3),
96 &smc->cs[3].mode);
97
98 /* Configure RDY/BSY */
99 gpio_request(CONFIG_SYS_NAND_READY_PIN, "nand_rdy");
100 gpio_direction_input(CONFIG_SYS_NAND_READY_PIN);
101
102 /* Enable NandFlash */
103 gpio_request(CONFIG_SYS_NAND_ENABLE_PIN, "nand_ce");
104 gpio_direction_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
105 }
106
board_init(void)107 int board_init(void)
108 {
109 at91_periph_clk_enable(ATMEL_ID_PIOA);
110 at91_periph_clk_enable(ATMEL_ID_PIOB);
111 at91_periph_clk_enable(ATMEL_ID_PIOC);
112
113 /* The mach-type is the same for both Snapper 9260 and 9G20 */
114 gd->bd->bi_arch_number = MACH_TYPE_SNAPPER_9260;
115
116 /* Address of boot parameters */
117 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
118
119 /* Initialise peripherals */
120 at91_seriald_hw_init();
121 i2c_set_bus_num(0);
122 nand_hw_init();
123 macb_hw_init();
124
125 return 0;
126 }
127
board_eth_init(bd_t * bis)128 int board_eth_init(bd_t *bis)
129 {
130 return macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x1f);
131 }
132
dram_init(void)133 int dram_init(void)
134 {
135 gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
136 CONFIG_SYS_SDRAM_SIZE);
137 return 0;
138 }
139
reset_phy(void)140 void reset_phy(void)
141 {
142 }
143
144 static struct atmel_serial_platdata at91sam9260_serial_plat = {
145 .base_addr = ATMEL_BASE_DBGU,
146 };
147
148 U_BOOT_DEVICE(at91sam9260_serial) = {
149 .name = "serial_atmel",
150 .platdata = &at91sam9260_serial_plat,
151 };
152