xref: /openbmc/qemu/include/hw/usb/hcd-musb.h (revision 7a5951f6)
1 /*
2  * "Inventra" High-speed Dual-Role Controller (MUSB-HDRC), Mentor Graphics,
3  * USB2.0 OTG compliant core used in various chips.
4  *
5  * Only host-mode and non-DMA accesses are currently supported.
6  *
7  * Copyright (C) 2008 Nokia Corporation
8  * Written by Andrzej Zaborowski <balrog@zabor.org>
9  *
10  * SPDX-License-Identifier: GPL-2.0-or-later
11  */
12 
13 #ifndef HW_USB_HCD_MUSB_H
14 #define HW_USB_HCD_MUSB_H
15 
16 #include "exec/hwaddr.h"
17 
18 enum musb_irq_source_e {
19     musb_irq_suspend = 0,
20     musb_irq_resume,
21     musb_irq_rst_babble,
22     musb_irq_sof,
23     musb_irq_connect,
24     musb_irq_disconnect,
25     musb_irq_vbus_request,
26     musb_irq_vbus_error,
27     musb_irq_rx,
28     musb_irq_tx,
29     musb_set_vbus,
30     musb_set_session,
31     /* Add new interrupts here */
32     musb_irq_max /* total number of interrupts defined */
33 };
34 
35 /* TODO convert hcd-musb to QOM/qdev and remove MUSBReadFunc/MUSBWriteFunc */
36 typedef void MUSBWriteFunc(void *opaque, hwaddr addr, uint32_t value);
37 typedef uint32_t MUSBReadFunc(void *opaque, hwaddr addr);
38 extern MUSBReadFunc * const musb_read[];
39 extern MUSBWriteFunc * const musb_write[];
40 
41 typedef struct MUSBState MUSBState;
42 
43 MUSBState *musb_init(DeviceState *parent_device, int gpio_base);
44 void musb_reset(MUSBState *s);
45 uint32_t musb_core_intr_get(MUSBState *s);
46 void musb_core_intr_clear(MUSBState *s, uint32_t mask);
47 void musb_set_size(MUSBState *s, int epnum, int size, int is_tx);
48 
49 #endif
50