1 /*
2 * QEMU 16550A multi UART emulation
3 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Copyright (c) 2003-2004 Fabrice Bellard
7 * Copyright (c) 2008 Citrix Systems, Inc.
8 *
9 * Permission is hereby granted, free of charge, to any person obtaining a copy
10 * of this software and associated documentation files (the "Software"), to deal
11 * in the Software without restriction, including without limitation the rights
12 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
13 * copies of the Software, and to permit persons to whom the Software is
14 * furnished to do so, subject to the following conditions:
15 *
16 * The above copyright notice and this permission notice shall be included in
17 * all copies or substantial portions of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
24 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 * THE SOFTWARE.
26 */
27
28 /* see docs/specs/pci-serial.rst */
29
30 #include "qemu/osdep.h"
31 #include "qapi/error.h"
32 #include "hw/char/serial.h"
33 #include "hw/irq.h"
34 #include "hw/pci/pci_device.h"
35 #include "hw/qdev-properties.h"
36 #include "hw/qdev-properties-system.h"
37 #include "migration/vmstate.h"
38
39 #define PCI_SERIAL_MAX_PORTS 4
40
41 typedef struct PCIMultiSerialState {
42 PCIDevice dev;
43 MemoryRegion iobar;
44 uint32_t ports;
45 char *name[PCI_SERIAL_MAX_PORTS];
46 SerialState state[PCI_SERIAL_MAX_PORTS];
47 uint32_t level[PCI_SERIAL_MAX_PORTS];
48 IRQState irqs[PCI_SERIAL_MAX_PORTS];
49 uint8_t prog_if;
50 } PCIMultiSerialState;
51
multi_serial_pci_exit(PCIDevice * dev)52 static void multi_serial_pci_exit(PCIDevice *dev)
53 {
54 PCIMultiSerialState *pci = DO_UPCAST(PCIMultiSerialState, dev, dev);
55 SerialState *s;
56 int i;
57
58 for (i = 0; i < pci->ports; i++) {
59 s = pci->state + i;
60 qdev_unrealize(DEVICE(s));
61 memory_region_del_subregion(&pci->iobar, &s->io);
62 g_free(pci->name[i]);
63 }
64 }
65
multi_serial_irq_mux(void * opaque,int n,int level)66 static void multi_serial_irq_mux(void *opaque, int n, int level)
67 {
68 PCIMultiSerialState *pci = opaque;
69 int i, pending = 0;
70
71 pci->level[n] = level;
72 for (i = 0; i < pci->ports; i++) {
73 if (pci->level[i]) {
74 pending = 1;
75 }
76 }
77 pci_set_irq(&pci->dev, pending);
78 }
79
multi_serial_get_port_count(PCIDeviceClass * pc)80 static size_t multi_serial_get_port_count(PCIDeviceClass *pc)
81 {
82 switch (pc->device_id) {
83 case 0x0003:
84 return 2;
85 case 0x0004:
86 return 4;
87 }
88
89 g_assert_not_reached();
90 }
91
92
multi_serial_pci_realize(PCIDevice * dev,Error ** errp)93 static void multi_serial_pci_realize(PCIDevice *dev, Error **errp)
94 {
95 PCIDeviceClass *pc = PCI_DEVICE_GET_CLASS(dev);
96 PCIMultiSerialState *pci = DO_UPCAST(PCIMultiSerialState, dev, dev);
97 SerialState *s;
98 size_t i, nports = multi_serial_get_port_count(pc);
99
100 pci->dev.config[PCI_CLASS_PROG] = pci->prog_if;
101 pci->dev.config[PCI_INTERRUPT_PIN] = 0x01;
102 memory_region_init(&pci->iobar, OBJECT(pci), "multiserial", 8 * nports);
103 pci_register_bar(&pci->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &pci->iobar);
104
105 for (i = 0; i < nports; i++) {
106 s = pci->state + i;
107 if (!qdev_realize(DEVICE(s), NULL, errp)) {
108 multi_serial_pci_exit(dev);
109 return;
110 }
111 s->irq = &pci->irqs[i];
112 pci->name[i] = g_strdup_printf("uart #%zu", i + 1);
113 memory_region_init_io(&s->io, OBJECT(pci), &serial_io_ops, s,
114 pci->name[i], 8);
115 memory_region_add_subregion(&pci->iobar, 8 * i, &s->io);
116 pci->ports++;
117 }
118 }
119
120 static const VMStateDescription vmstate_pci_multi_serial = {
121 .name = "pci-serial-multi",
122 .version_id = 1,
123 .minimum_version_id = 1,
124 .fields = (const VMStateField[]) {
125 VMSTATE_PCI_DEVICE(dev, PCIMultiSerialState),
126 VMSTATE_STRUCT_ARRAY(state, PCIMultiSerialState, PCI_SERIAL_MAX_PORTS,
127 0, vmstate_serial, SerialState),
128 VMSTATE_UINT32_ARRAY(level, PCIMultiSerialState, PCI_SERIAL_MAX_PORTS),
129 VMSTATE_END_OF_LIST()
130 }
131 };
132
133 static const Property multi_2x_serial_pci_properties[] = {
134 DEFINE_PROP_CHR("chardev1", PCIMultiSerialState, state[0].chr),
135 DEFINE_PROP_CHR("chardev2", PCIMultiSerialState, state[1].chr),
136 DEFINE_PROP_UINT8("prog_if", PCIMultiSerialState, prog_if, 0x02),
137 };
138
139 static const Property multi_4x_serial_pci_properties[] = {
140 DEFINE_PROP_CHR("chardev1", PCIMultiSerialState, state[0].chr),
141 DEFINE_PROP_CHR("chardev2", PCIMultiSerialState, state[1].chr),
142 DEFINE_PROP_CHR("chardev3", PCIMultiSerialState, state[2].chr),
143 DEFINE_PROP_CHR("chardev4", PCIMultiSerialState, state[3].chr),
144 DEFINE_PROP_UINT8("prog_if", PCIMultiSerialState, prog_if, 0x02),
145 };
146
multi_2x_serial_pci_class_initfn(ObjectClass * klass,void * data)147 static void multi_2x_serial_pci_class_initfn(ObjectClass *klass, void *data)
148 {
149 DeviceClass *dc = DEVICE_CLASS(klass);
150 PCIDeviceClass *pc = PCI_DEVICE_CLASS(klass);
151 pc->realize = multi_serial_pci_realize;
152 pc->exit = multi_serial_pci_exit;
153 pc->vendor_id = PCI_VENDOR_ID_REDHAT;
154 pc->device_id = PCI_DEVICE_ID_REDHAT_SERIAL2;
155 pc->revision = 1;
156 pc->class_id = PCI_CLASS_COMMUNICATION_SERIAL;
157 dc->vmsd = &vmstate_pci_multi_serial;
158 device_class_set_props(dc, multi_2x_serial_pci_properties);
159 set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
160 }
161
multi_4x_serial_pci_class_initfn(ObjectClass * klass,void * data)162 static void multi_4x_serial_pci_class_initfn(ObjectClass *klass, void *data)
163 {
164 DeviceClass *dc = DEVICE_CLASS(klass);
165 PCIDeviceClass *pc = PCI_DEVICE_CLASS(klass);
166 pc->realize = multi_serial_pci_realize;
167 pc->exit = multi_serial_pci_exit;
168 pc->vendor_id = PCI_VENDOR_ID_REDHAT;
169 pc->device_id = PCI_DEVICE_ID_REDHAT_SERIAL4;
170 pc->revision = 1;
171 pc->class_id = PCI_CLASS_COMMUNICATION_SERIAL;
172 dc->vmsd = &vmstate_pci_multi_serial;
173 device_class_set_props(dc, multi_4x_serial_pci_properties);
174 set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
175 }
176
multi_serial_init(Object * o)177 static void multi_serial_init(Object *o)
178 {
179 PCIDevice *dev = PCI_DEVICE(o);
180 PCIMultiSerialState *pms = DO_UPCAST(PCIMultiSerialState, dev, dev);
181 size_t i, nports = multi_serial_get_port_count(PCI_DEVICE_GET_CLASS(dev));
182
183 for (i = 0; i < nports; i++) {
184 qemu_init_irq(&pms->irqs[i], multi_serial_irq_mux, pms, i);
185 object_initialize_child(o, "serial[*]", &pms->state[i], TYPE_SERIAL);
186 }
187 }
188
189 static const TypeInfo multi_2x_serial_pci_info = {
190 .name = "pci-serial-2x",
191 .parent = TYPE_PCI_DEVICE,
192 .instance_size = sizeof(PCIMultiSerialState),
193 .instance_init = multi_serial_init,
194 .class_init = multi_2x_serial_pci_class_initfn,
195 .interfaces = (InterfaceInfo[]) {
196 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
197 { },
198 },
199 };
200
201 static const TypeInfo multi_4x_serial_pci_info = {
202 .name = "pci-serial-4x",
203 .parent = TYPE_PCI_DEVICE,
204 .instance_size = sizeof(PCIMultiSerialState),
205 .instance_init = multi_serial_init,
206 .class_init = multi_4x_serial_pci_class_initfn,
207 .interfaces = (InterfaceInfo[]) {
208 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
209 { },
210 },
211 };
212
multi_serial_pci_register_types(void)213 static void multi_serial_pci_register_types(void)
214 {
215 type_register_static(&multi_2x_serial_pci_info);
216 type_register_static(&multi_4x_serial_pci_info);
217 }
218
219 type_init(multi_serial_pci_register_types)
220