1 // SPDX-License-Identifier: ISC
2 /*
3 * Copyright (C) 2022 MediaTek Inc.
4 */
5
6 #include <linux/firmware.h>
7 #include <linux/fs.h>
8 #include "mt7996.h"
9 #include "mcu.h"
10 #include "mac.h"
11 #include "eeprom.h"
12
13 struct mt7996_patch_hdr {
14 char build_date[16];
15 char platform[4];
16 __be32 hw_sw_ver;
17 __be32 patch_ver;
18 __be16 checksum;
19 u16 reserved;
20 struct {
21 __be32 patch_ver;
22 __be32 subsys;
23 __be32 feature;
24 __be32 n_region;
25 __be32 crc;
26 u32 reserved[11];
27 } desc;
28 } __packed;
29
30 struct mt7996_patch_sec {
31 __be32 type;
32 __be32 offs;
33 __be32 size;
34 union {
35 __be32 spec[13];
36 struct {
37 __be32 addr;
38 __be32 len;
39 __be32 sec_key_idx;
40 __be32 align_len;
41 u32 reserved[9];
42 } info;
43 };
44 } __packed;
45
46 struct mt7996_fw_trailer {
47 u8 chip_id;
48 u8 eco_code;
49 u8 n_region;
50 u8 format_ver;
51 u8 format_flag;
52 u8 reserved[2];
53 char fw_ver[10];
54 char build_date[15];
55 u32 crc;
56 } __packed;
57
58 struct mt7996_fw_region {
59 __le32 decomp_crc;
60 __le32 decomp_len;
61 __le32 decomp_blk_sz;
62 u8 reserved[4];
63 __le32 addr;
64 __le32 len;
65 u8 feature_set;
66 u8 reserved1[15];
67 } __packed;
68
69 #define MCU_PATCH_ADDRESS 0x200000
70
71 #define HE_PHY(p, c) u8_get_bits(c, IEEE80211_HE_PHY_##p)
72 #define HE_MAC(m, c) u8_get_bits(c, IEEE80211_HE_MAC_##m)
73 #define EHT_PHY(p, c) u8_get_bits(c, IEEE80211_EHT_PHY_##p)
74
75 static bool sr_scene_detect = true;
76 module_param(sr_scene_detect, bool, 0644);
77 MODULE_PARM_DESC(sr_scene_detect, "Enable firmware scene detection algorithm");
78
79 static u8
mt7996_mcu_get_sta_nss(u16 mcs_map)80 mt7996_mcu_get_sta_nss(u16 mcs_map)
81 {
82 u8 nss;
83
84 for (nss = 8; nss > 0; nss--) {
85 u8 nss_mcs = (mcs_map >> (2 * (nss - 1))) & 3;
86
87 if (nss_mcs != IEEE80211_VHT_MCS_NOT_SUPPORTED)
88 break;
89 }
90
91 return nss - 1;
92 }
93
94 static void
mt7996_mcu_set_sta_he_mcs(struct ieee80211_sta * sta,__le16 * he_mcs,u16 mcs_map)95 mt7996_mcu_set_sta_he_mcs(struct ieee80211_sta *sta, __le16 *he_mcs,
96 u16 mcs_map)
97 {
98 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv;
99 enum nl80211_band band = msta->vif->phy->mt76->chandef.chan->band;
100 const u16 *mask = msta->vif->bitrate_mask.control[band].he_mcs;
101 int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss;
102
103 for (nss = 0; nss < max_nss; nss++) {
104 int mcs;
105
106 switch ((mcs_map >> (2 * nss)) & 0x3) {
107 case IEEE80211_HE_MCS_SUPPORT_0_11:
108 mcs = GENMASK(11, 0);
109 break;
110 case IEEE80211_HE_MCS_SUPPORT_0_9:
111 mcs = GENMASK(9, 0);
112 break;
113 case IEEE80211_HE_MCS_SUPPORT_0_7:
114 mcs = GENMASK(7, 0);
115 break;
116 default:
117 mcs = 0;
118 }
119
120 mcs = mcs ? fls(mcs & mask[nss]) - 1 : -1;
121
122 switch (mcs) {
123 case 0 ... 7:
124 mcs = IEEE80211_HE_MCS_SUPPORT_0_7;
125 break;
126 case 8 ... 9:
127 mcs = IEEE80211_HE_MCS_SUPPORT_0_9;
128 break;
129 case 10 ... 11:
130 mcs = IEEE80211_HE_MCS_SUPPORT_0_11;
131 break;
132 default:
133 mcs = IEEE80211_HE_MCS_NOT_SUPPORTED;
134 break;
135 }
136 mcs_map &= ~(0x3 << (nss * 2));
137 mcs_map |= mcs << (nss * 2);
138 }
139
140 *he_mcs = cpu_to_le16(mcs_map);
141 }
142
143 static void
mt7996_mcu_set_sta_vht_mcs(struct ieee80211_sta * sta,__le16 * vht_mcs,const u16 * mask)144 mt7996_mcu_set_sta_vht_mcs(struct ieee80211_sta *sta, __le16 *vht_mcs,
145 const u16 *mask)
146 {
147 u16 mcs, mcs_map = le16_to_cpu(sta->deflink.vht_cap.vht_mcs.rx_mcs_map);
148 int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss;
149
150 for (nss = 0; nss < max_nss; nss++, mcs_map >>= 2) {
151 switch (mcs_map & 0x3) {
152 case IEEE80211_VHT_MCS_SUPPORT_0_9:
153 mcs = GENMASK(9, 0);
154 break;
155 case IEEE80211_VHT_MCS_SUPPORT_0_8:
156 mcs = GENMASK(8, 0);
157 break;
158 case IEEE80211_VHT_MCS_SUPPORT_0_7:
159 mcs = GENMASK(7, 0);
160 break;
161 default:
162 mcs = 0;
163 }
164
165 vht_mcs[nss] = cpu_to_le16(mcs & mask[nss]);
166 }
167 }
168
169 static void
mt7996_mcu_set_sta_ht_mcs(struct ieee80211_sta * sta,u8 * ht_mcs,const u8 * mask)170 mt7996_mcu_set_sta_ht_mcs(struct ieee80211_sta *sta, u8 *ht_mcs,
171 const u8 *mask)
172 {
173 int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss;
174
175 for (nss = 0; nss < max_nss; nss++)
176 ht_mcs[nss] = sta->deflink.ht_cap.mcs.rx_mask[nss] & mask[nss];
177 }
178
179 static int
mt7996_mcu_parse_response(struct mt76_dev * mdev,int cmd,struct sk_buff * skb,int seq)180 mt7996_mcu_parse_response(struct mt76_dev *mdev, int cmd,
181 struct sk_buff *skb, int seq)
182 {
183 struct mt7996_mcu_rxd *rxd;
184 struct mt7996_mcu_uni_event *event;
185 int mcu_cmd = FIELD_GET(__MCU_CMD_FIELD_ID, cmd);
186 int ret = 0;
187
188 if (!skb) {
189 dev_err(mdev->dev, "Message %08x (seq %d) timeout\n",
190 cmd, seq);
191 return -ETIMEDOUT;
192 }
193
194 rxd = (struct mt7996_mcu_rxd *)skb->data;
195 if (seq != rxd->seq)
196 return -EAGAIN;
197
198 if (cmd == MCU_CMD(PATCH_SEM_CONTROL)) {
199 skb_pull(skb, sizeof(*rxd) - 4);
200 ret = *skb->data;
201 } else if ((rxd->option & MCU_UNI_CMD_EVENT) &&
202 rxd->eid == MCU_UNI_EVENT_RESULT) {
203 skb_pull(skb, sizeof(*rxd));
204 event = (struct mt7996_mcu_uni_event *)skb->data;
205 ret = le32_to_cpu(event->status);
206 /* skip invalid event */
207 if (mcu_cmd != event->cid)
208 ret = -EAGAIN;
209 } else {
210 skb_pull(skb, sizeof(struct mt7996_mcu_rxd));
211 }
212
213 return ret;
214 }
215
216 static int
mt7996_mcu_send_message(struct mt76_dev * mdev,struct sk_buff * skb,int cmd,int * wait_seq)217 mt7996_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb,
218 int cmd, int *wait_seq)
219 {
220 struct mt7996_dev *dev = container_of(mdev, struct mt7996_dev, mt76);
221 int txd_len, mcu_cmd = FIELD_GET(__MCU_CMD_FIELD_ID, cmd);
222 struct mt76_connac2_mcu_uni_txd *uni_txd;
223 struct mt76_connac2_mcu_txd *mcu_txd;
224 enum mt76_mcuq_id qid;
225 __le32 *txd;
226 u32 val;
227 u8 seq;
228
229 mdev->mcu.timeout = 20 * HZ;
230
231 seq = ++dev->mt76.mcu.msg_seq & 0xf;
232 if (!seq)
233 seq = ++dev->mt76.mcu.msg_seq & 0xf;
234
235 if (cmd == MCU_CMD(FW_SCATTER)) {
236 qid = MT_MCUQ_FWDL;
237 goto exit;
238 }
239
240 txd_len = cmd & __MCU_CMD_FIELD_UNI ? sizeof(*uni_txd) : sizeof(*mcu_txd);
241 txd = (__le32 *)skb_push(skb, txd_len);
242 if (test_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state))
243 qid = MT_MCUQ_WA;
244 else
245 qid = MT_MCUQ_WM;
246
247 val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len) |
248 FIELD_PREP(MT_TXD0_PKT_FMT, MT_TX_TYPE_CMD) |
249 FIELD_PREP(MT_TXD0_Q_IDX, MT_TX_MCU_PORT_RX_Q0);
250 txd[0] = cpu_to_le32(val);
251
252 val = FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_CMD);
253 txd[1] = cpu_to_le32(val);
254
255 if (cmd & __MCU_CMD_FIELD_UNI) {
256 uni_txd = (struct mt76_connac2_mcu_uni_txd *)txd;
257 uni_txd->len = cpu_to_le16(skb->len - sizeof(uni_txd->txd));
258 uni_txd->cid = cpu_to_le16(mcu_cmd);
259 uni_txd->s2d_index = MCU_S2D_H2CN;
260 uni_txd->pkt_type = MCU_PKT_ID;
261 uni_txd->seq = seq;
262
263 if (cmd & __MCU_CMD_FIELD_QUERY)
264 uni_txd->option = MCU_CMD_UNI_QUERY_ACK;
265 else
266 uni_txd->option = MCU_CMD_UNI_EXT_ACK;
267
268 if ((cmd & __MCU_CMD_FIELD_WA) && (cmd & __MCU_CMD_FIELD_WM))
269 uni_txd->s2d_index = MCU_S2D_H2CN;
270 else if (cmd & __MCU_CMD_FIELD_WA)
271 uni_txd->s2d_index = MCU_S2D_H2C;
272 else if (cmd & __MCU_CMD_FIELD_WM)
273 uni_txd->s2d_index = MCU_S2D_H2N;
274
275 goto exit;
276 }
277
278 mcu_txd = (struct mt76_connac2_mcu_txd *)txd;
279 mcu_txd->len = cpu_to_le16(skb->len - sizeof(mcu_txd->txd));
280 mcu_txd->pq_id = cpu_to_le16(MCU_PQ_ID(MT_TX_PORT_IDX_MCU,
281 MT_TX_MCU_PORT_RX_Q0));
282 mcu_txd->pkt_type = MCU_PKT_ID;
283 mcu_txd->seq = seq;
284
285 mcu_txd->cid = FIELD_GET(__MCU_CMD_FIELD_ID, cmd);
286 mcu_txd->set_query = MCU_Q_NA;
287 mcu_txd->ext_cid = FIELD_GET(__MCU_CMD_FIELD_EXT_ID, cmd);
288 if (mcu_txd->ext_cid) {
289 mcu_txd->ext_cid_ack = 1;
290
291 if (cmd & __MCU_CMD_FIELD_QUERY)
292 mcu_txd->set_query = MCU_Q_QUERY;
293 else
294 mcu_txd->set_query = MCU_Q_SET;
295 }
296
297 if (cmd & __MCU_CMD_FIELD_WA)
298 mcu_txd->s2d_index = MCU_S2D_H2C;
299 else
300 mcu_txd->s2d_index = MCU_S2D_H2N;
301
302 exit:
303 if (wait_seq)
304 *wait_seq = seq;
305
306 return mt76_tx_queue_skb_raw(dev, mdev->q_mcu[qid], skb, 0);
307 }
308
mt7996_mcu_wa_cmd(struct mt7996_dev * dev,int cmd,u32 a1,u32 a2,u32 a3)309 int mt7996_mcu_wa_cmd(struct mt7996_dev *dev, int cmd, u32 a1, u32 a2, u32 a3)
310 {
311 struct {
312 __le32 args[3];
313 } req = {
314 .args = {
315 cpu_to_le32(a1),
316 cpu_to_le32(a2),
317 cpu_to_le32(a3),
318 },
319 };
320
321 return mt76_mcu_send_msg(&dev->mt76, cmd, &req, sizeof(req), false);
322 }
323
324 static void
mt7996_mcu_csa_finish(void * priv,u8 * mac,struct ieee80211_vif * vif)325 mt7996_mcu_csa_finish(void *priv, u8 *mac, struct ieee80211_vif *vif)
326 {
327 if (vif->bss_conf.csa_active)
328 ieee80211_csa_finish(vif);
329 }
330
331 static void
mt7996_mcu_rx_radar_detected(struct mt7996_dev * dev,struct sk_buff * skb)332 mt7996_mcu_rx_radar_detected(struct mt7996_dev *dev, struct sk_buff *skb)
333 {
334 struct mt76_phy *mphy = &dev->mt76.phy;
335 struct mt7996_mcu_rdd_report *r;
336
337 r = (struct mt7996_mcu_rdd_report *)skb->data;
338
339 if (r->band_idx >= ARRAY_SIZE(dev->mt76.phys))
340 return;
341
342 if (r->band_idx == MT_RX_SEL2 && !dev->rdd2_phy)
343 return;
344
345 if (r->band_idx == MT_RX_SEL2)
346 mphy = dev->rdd2_phy->mt76;
347 else
348 mphy = dev->mt76.phys[r->band_idx];
349
350 if (!mphy)
351 return;
352
353 if (r->band_idx == MT_RX_SEL2)
354 cfg80211_background_radar_event(mphy->hw->wiphy,
355 &dev->rdd2_chandef,
356 GFP_ATOMIC);
357 else
358 ieee80211_radar_detected(mphy->hw);
359 dev->hw_pattern++;
360 }
361
362 static void
mt7996_mcu_rx_log_message(struct mt7996_dev * dev,struct sk_buff * skb)363 mt7996_mcu_rx_log_message(struct mt7996_dev *dev, struct sk_buff *skb)
364 {
365 #define UNI_EVENT_FW_LOG_FORMAT 0
366 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data;
367 const char *data = (char *)&rxd[1] + 4, *type;
368 struct tlv *tlv = (struct tlv *)data;
369 int len;
370
371 if (!(rxd->option & MCU_UNI_CMD_EVENT)) {
372 len = skb->len - sizeof(*rxd);
373 data = (char *)&rxd[1];
374 goto out;
375 }
376
377 if (le16_to_cpu(tlv->tag) != UNI_EVENT_FW_LOG_FORMAT)
378 return;
379
380 data += sizeof(*tlv) + 4;
381 len = le16_to_cpu(tlv->len) - sizeof(*tlv) - 4;
382
383 out:
384 switch (rxd->s2d_index) {
385 case 0:
386 if (mt7996_debugfs_rx_log(dev, data, len))
387 return;
388
389 type = "WM";
390 break;
391 case 2:
392 type = "WA";
393 break;
394 default:
395 type = "unknown";
396 break;
397 }
398
399 wiphy_info(mt76_hw(dev)->wiphy, "%s: %.*s", type, len, data);
400 }
401
402 static void
mt7996_mcu_cca_finish(void * priv,u8 * mac,struct ieee80211_vif * vif)403 mt7996_mcu_cca_finish(void *priv, u8 *mac, struct ieee80211_vif *vif)
404 {
405 if (!vif->bss_conf.color_change_active)
406 return;
407
408 ieee80211_color_change_finish(vif);
409 }
410
411 static void
mt7996_mcu_ie_countdown(struct mt7996_dev * dev,struct sk_buff * skb)412 mt7996_mcu_ie_countdown(struct mt7996_dev *dev, struct sk_buff *skb)
413 {
414 #define UNI_EVENT_IE_COUNTDOWN_CSA 0
415 #define UNI_EVENT_IE_COUNTDOWN_BCC 1
416 struct header {
417 u8 band;
418 u8 rsv[3];
419 };
420 struct mt76_phy *mphy = &dev->mt76.phy;
421 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data;
422 const char *data = (char *)&rxd[1], *tail;
423 struct header *hdr = (struct header *)data;
424 struct tlv *tlv = (struct tlv *)(data + 4);
425
426 if (hdr->band >= ARRAY_SIZE(dev->mt76.phys))
427 return;
428
429 if (hdr->band && dev->mt76.phys[hdr->band])
430 mphy = dev->mt76.phys[hdr->band];
431
432 tail = skb->data + skb->len;
433 data += sizeof(struct header);
434 while (data + sizeof(struct tlv) < tail && le16_to_cpu(tlv->len)) {
435 switch (le16_to_cpu(tlv->tag)) {
436 case UNI_EVENT_IE_COUNTDOWN_CSA:
437 ieee80211_iterate_active_interfaces_atomic(mphy->hw,
438 IEEE80211_IFACE_ITER_RESUME_ALL,
439 mt7996_mcu_csa_finish, mphy->hw);
440 break;
441 case UNI_EVENT_IE_COUNTDOWN_BCC:
442 ieee80211_iterate_active_interfaces_atomic(mphy->hw,
443 IEEE80211_IFACE_ITER_RESUME_ALL,
444 mt7996_mcu_cca_finish, mphy->hw);
445 break;
446 }
447
448 data += le16_to_cpu(tlv->len);
449 tlv = (struct tlv *)data;
450 }
451 }
452
453 static void
mt7996_mcu_rx_ext_event(struct mt7996_dev * dev,struct sk_buff * skb)454 mt7996_mcu_rx_ext_event(struct mt7996_dev *dev, struct sk_buff *skb)
455 {
456 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data;
457
458 switch (rxd->ext_eid) {
459 case MCU_EXT_EVENT_FW_LOG_2_HOST:
460 mt7996_mcu_rx_log_message(dev, skb);
461 break;
462 default:
463 break;
464 }
465 }
466
467 static void
mt7996_mcu_rx_unsolicited_event(struct mt7996_dev * dev,struct sk_buff * skb)468 mt7996_mcu_rx_unsolicited_event(struct mt7996_dev *dev, struct sk_buff *skb)
469 {
470 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data;
471
472 switch (rxd->eid) {
473 case MCU_EVENT_EXT:
474 mt7996_mcu_rx_ext_event(dev, skb);
475 break;
476 default:
477 break;
478 }
479 dev_kfree_skb(skb);
480 }
481
482 static void
mt7996_mcu_uni_rx_unsolicited_event(struct mt7996_dev * dev,struct sk_buff * skb)483 mt7996_mcu_uni_rx_unsolicited_event(struct mt7996_dev *dev, struct sk_buff *skb)
484 {
485 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data;
486
487 switch (rxd->eid) {
488 case MCU_UNI_EVENT_FW_LOG_2_HOST:
489 mt7996_mcu_rx_log_message(dev, skb);
490 break;
491 case MCU_UNI_EVENT_IE_COUNTDOWN:
492 mt7996_mcu_ie_countdown(dev, skb);
493 break;
494 case MCU_UNI_EVENT_RDD_REPORT:
495 mt7996_mcu_rx_radar_detected(dev, skb);
496 break;
497 default:
498 break;
499 }
500 dev_kfree_skb(skb);
501 }
502
mt7996_mcu_rx_event(struct mt7996_dev * dev,struct sk_buff * skb)503 void mt7996_mcu_rx_event(struct mt7996_dev *dev, struct sk_buff *skb)
504 {
505 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data;
506
507 if (rxd->option & MCU_UNI_CMD_UNSOLICITED_EVENT) {
508 mt7996_mcu_uni_rx_unsolicited_event(dev, skb);
509 return;
510 }
511
512 /* WA still uses legacy event*/
513 if (rxd->ext_eid == MCU_EXT_EVENT_FW_LOG_2_HOST ||
514 !rxd->seq)
515 mt7996_mcu_rx_unsolicited_event(dev, skb);
516 else
517 mt76_mcu_rx_event(&dev->mt76, skb);
518 }
519
520 static struct tlv *
mt7996_mcu_add_uni_tlv(struct sk_buff * skb,u16 tag,u16 len)521 mt7996_mcu_add_uni_tlv(struct sk_buff *skb, u16 tag, u16 len)
522 {
523 struct tlv *ptlv = skb_put_zero(skb, len);
524
525 ptlv->tag = cpu_to_le16(tag);
526 ptlv->len = cpu_to_le16(len);
527
528 return ptlv;
529 }
530
531 static void
mt7996_mcu_bss_rfch_tlv(struct sk_buff * skb,struct ieee80211_vif * vif,struct mt7996_phy * phy)532 mt7996_mcu_bss_rfch_tlv(struct sk_buff *skb, struct ieee80211_vif *vif,
533 struct mt7996_phy *phy)
534 {
535 static const u8 rlm_ch_band[] = {
536 [NL80211_BAND_2GHZ] = 1,
537 [NL80211_BAND_5GHZ] = 2,
538 [NL80211_BAND_6GHZ] = 3,
539 };
540 struct cfg80211_chan_def *chandef = &phy->mt76->chandef;
541 struct bss_rlm_tlv *ch;
542 struct tlv *tlv;
543 int freq1 = chandef->center_freq1;
544
545 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_RLM, sizeof(*ch));
546
547 ch = (struct bss_rlm_tlv *)tlv;
548 ch->control_channel = chandef->chan->hw_value;
549 ch->center_chan = ieee80211_frequency_to_channel(freq1);
550 ch->bw = mt76_connac_chan_bw(chandef);
551 ch->tx_streams = hweight8(phy->mt76->antenna_mask);
552 ch->rx_streams = hweight8(phy->mt76->antenna_mask);
553 ch->band = rlm_ch_band[chandef->chan->band];
554
555 if (chandef->width == NL80211_CHAN_WIDTH_80P80) {
556 int freq2 = chandef->center_freq2;
557
558 ch->center_chan2 = ieee80211_frequency_to_channel(freq2);
559 }
560 }
561
562 static void
mt7996_mcu_bss_ra_tlv(struct sk_buff * skb,struct ieee80211_vif * vif,struct mt7996_phy * phy)563 mt7996_mcu_bss_ra_tlv(struct sk_buff *skb, struct ieee80211_vif *vif,
564 struct mt7996_phy *phy)
565 {
566 struct bss_ra_tlv *ra;
567 struct tlv *tlv;
568
569 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_RA, sizeof(*ra));
570
571 ra = (struct bss_ra_tlv *)tlv;
572 ra->short_preamble = true;
573 }
574
575 static void
mt7996_mcu_bss_he_tlv(struct sk_buff * skb,struct ieee80211_vif * vif,struct mt7996_phy * phy)576 mt7996_mcu_bss_he_tlv(struct sk_buff *skb, struct ieee80211_vif *vif,
577 struct mt7996_phy *phy)
578 {
579 #define DEFAULT_HE_PE_DURATION 4
580 #define DEFAULT_HE_DURATION_RTS_THRES 1023
581 const struct ieee80211_sta_he_cap *cap;
582 struct bss_info_uni_he *he;
583 struct tlv *tlv;
584
585 cap = mt76_connac_get_he_phy_cap(phy->mt76, vif);
586
587 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_HE_BASIC, sizeof(*he));
588
589 he = (struct bss_info_uni_he *)tlv;
590 he->he_pe_duration = vif->bss_conf.htc_trig_based_pkt_ext;
591 if (!he->he_pe_duration)
592 he->he_pe_duration = DEFAULT_HE_PE_DURATION;
593
594 he->he_rts_thres = cpu_to_le16(vif->bss_conf.frame_time_rts_th);
595 if (!he->he_rts_thres)
596 he->he_rts_thres = cpu_to_le16(DEFAULT_HE_DURATION_RTS_THRES);
597
598 he->max_nss_mcs[CMD_HE_MCS_BW80] = cap->he_mcs_nss_supp.tx_mcs_80;
599 he->max_nss_mcs[CMD_HE_MCS_BW160] = cap->he_mcs_nss_supp.tx_mcs_160;
600 he->max_nss_mcs[CMD_HE_MCS_BW8080] = cap->he_mcs_nss_supp.tx_mcs_80p80;
601 }
602
603 static void
mt7996_mcu_bss_bmc_tlv(struct sk_buff * skb,struct ieee80211_vif * vif,struct mt7996_phy * phy)604 mt7996_mcu_bss_bmc_tlv(struct sk_buff *skb, struct ieee80211_vif *vif,
605 struct mt7996_phy *phy)
606 {
607 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
608 struct bss_rate_tlv *bmc;
609 struct cfg80211_chan_def *chandef = &phy->mt76->chandef;
610 enum nl80211_band band = chandef->chan->band;
611 struct tlv *tlv;
612 u8 idx = mvif->mcast_rates_idx ?
613 mvif->mcast_rates_idx : mvif->basic_rates_idx;
614
615 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_RATE, sizeof(*bmc));
616
617 bmc = (struct bss_rate_tlv *)tlv;
618
619 bmc->short_preamble = (band == NL80211_BAND_2GHZ);
620 bmc->bc_fixed_rate = idx;
621 bmc->mc_fixed_rate = idx;
622 }
623
624 static void
mt7996_mcu_bss_txcmd_tlv(struct sk_buff * skb,bool en)625 mt7996_mcu_bss_txcmd_tlv(struct sk_buff *skb, bool en)
626 {
627 struct bss_txcmd_tlv *txcmd;
628 struct tlv *tlv;
629
630 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_TXCMD, sizeof(*txcmd));
631
632 txcmd = (struct bss_txcmd_tlv *)tlv;
633 txcmd->txcmd_mode = en;
634 }
635
636 static void
mt7996_mcu_bss_mld_tlv(struct sk_buff * skb,struct ieee80211_vif * vif)637 mt7996_mcu_bss_mld_tlv(struct sk_buff *skb, struct ieee80211_vif *vif)
638 {
639 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
640 struct bss_mld_tlv *mld;
641 struct tlv *tlv;
642
643 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_MLD, sizeof(*mld));
644
645 mld = (struct bss_mld_tlv *)tlv;
646 mld->group_mld_id = 0xff;
647 mld->own_mld_id = mvif->mt76.idx;
648 mld->remap_idx = 0xff;
649 }
650
651 static void
mt7996_mcu_bss_sec_tlv(struct sk_buff * skb,struct ieee80211_vif * vif)652 mt7996_mcu_bss_sec_tlv(struct sk_buff *skb, struct ieee80211_vif *vif)
653 {
654 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
655 struct bss_sec_tlv *sec;
656 struct tlv *tlv;
657
658 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_SEC, sizeof(*sec));
659
660 sec = (struct bss_sec_tlv *)tlv;
661 sec->cipher = mvif->cipher;
662 }
663
664 static int
mt7996_mcu_muar_config(struct mt7996_phy * phy,struct ieee80211_vif * vif,bool bssid,bool enable)665 mt7996_mcu_muar_config(struct mt7996_phy *phy, struct ieee80211_vif *vif,
666 bool bssid, bool enable)
667 {
668 #define UNI_MUAR_ENTRY 2
669 struct mt7996_dev *dev = phy->dev;
670 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
671 u32 idx = mvif->mt76.omac_idx - REPEATER_BSSID_START;
672 const u8 *addr = vif->addr;
673
674 struct {
675 struct {
676 u8 band;
677 u8 __rsv[3];
678 } hdr;
679
680 __le16 tag;
681 __le16 len;
682
683 bool smesh;
684 u8 bssid;
685 u8 index;
686 u8 entry_add;
687 u8 addr[ETH_ALEN];
688 u8 __rsv[2];
689 } __packed req = {
690 .hdr.band = phy->mt76->band_idx,
691 .tag = cpu_to_le16(UNI_MUAR_ENTRY),
692 .len = cpu_to_le16(sizeof(req) - sizeof(req.hdr)),
693 .smesh = false,
694 .index = idx * 2 + bssid,
695 .entry_add = true,
696 };
697
698 if (bssid)
699 addr = vif->bss_conf.bssid;
700
701 if (enable)
702 memcpy(req.addr, addr, ETH_ALEN);
703
704 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(REPT_MUAR), &req,
705 sizeof(req), true);
706 }
707
708 static void
mt7996_mcu_bss_ifs_timing_tlv(struct sk_buff * skb,struct ieee80211_vif * vif)709 mt7996_mcu_bss_ifs_timing_tlv(struct sk_buff *skb, struct ieee80211_vif *vif)
710 {
711 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
712 struct mt7996_phy *phy = mvif->phy;
713 struct bss_ifs_time_tlv *ifs_time;
714 struct tlv *tlv;
715 bool is_2ghz = phy->mt76->chandef.chan->band == NL80211_BAND_2GHZ;
716
717 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_IFS_TIME, sizeof(*ifs_time));
718
719 ifs_time = (struct bss_ifs_time_tlv *)tlv;
720 ifs_time->slot_valid = true;
721 ifs_time->sifs_valid = true;
722 ifs_time->rifs_valid = true;
723 ifs_time->eifs_valid = true;
724
725 ifs_time->slot_time = cpu_to_le16(phy->slottime);
726 ifs_time->sifs_time = cpu_to_le16(10);
727 ifs_time->rifs_time = cpu_to_le16(2);
728 ifs_time->eifs_time = cpu_to_le16(is_2ghz ? 78 : 84);
729
730 if (is_2ghz) {
731 ifs_time->eifs_cck_valid = true;
732 ifs_time->eifs_cck_time = cpu_to_le16(314);
733 }
734 }
735
736 static int
mt7996_mcu_bss_basic_tlv(struct sk_buff * skb,struct ieee80211_vif * vif,struct ieee80211_sta * sta,struct mt76_phy * phy,u16 wlan_idx,bool enable)737 mt7996_mcu_bss_basic_tlv(struct sk_buff *skb,
738 struct ieee80211_vif *vif,
739 struct ieee80211_sta *sta,
740 struct mt76_phy *phy, u16 wlan_idx,
741 bool enable)
742 {
743 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
744 struct cfg80211_chan_def *chandef = &phy->chandef;
745 struct mt76_connac_bss_basic_tlv *bss;
746 u32 type = CONNECTION_INFRA_AP;
747 u16 sta_wlan_idx = wlan_idx;
748 struct tlv *tlv;
749 int idx;
750
751 switch (vif->type) {
752 case NL80211_IFTYPE_MESH_POINT:
753 case NL80211_IFTYPE_AP:
754 case NL80211_IFTYPE_MONITOR:
755 break;
756 case NL80211_IFTYPE_STATION:
757 if (enable) {
758 rcu_read_lock();
759 if (!sta)
760 sta = ieee80211_find_sta(vif,
761 vif->bss_conf.bssid);
762 /* TODO: enable BSS_INFO_UAPSD & BSS_INFO_PM */
763 if (sta) {
764 struct mt76_wcid *wcid;
765
766 wcid = (struct mt76_wcid *)sta->drv_priv;
767 sta_wlan_idx = wcid->idx;
768 }
769 rcu_read_unlock();
770 }
771 type = CONNECTION_INFRA_STA;
772 break;
773 case NL80211_IFTYPE_ADHOC:
774 type = CONNECTION_IBSS_ADHOC;
775 break;
776 default:
777 WARN_ON(1);
778 break;
779 }
780
781 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_BASIC, sizeof(*bss));
782
783 bss = (struct mt76_connac_bss_basic_tlv *)tlv;
784 bss->bcn_interval = cpu_to_le16(vif->bss_conf.beacon_int);
785 bss->dtim_period = vif->bss_conf.dtim_period;
786 bss->bmc_tx_wlan_idx = cpu_to_le16(wlan_idx);
787 bss->sta_idx = cpu_to_le16(sta_wlan_idx);
788 bss->conn_type = cpu_to_le32(type);
789 bss->omac_idx = mvif->omac_idx;
790 bss->band_idx = mvif->band_idx;
791 bss->wmm_idx = mvif->wmm_idx;
792 bss->conn_state = !enable;
793 bss->active = enable;
794
795 idx = mvif->omac_idx > EXT_BSSID_START ? HW_BSSID_0 : mvif->omac_idx;
796 bss->hw_bss_idx = idx;
797
798 if (vif->type == NL80211_IFTYPE_MONITOR) {
799 memcpy(bss->bssid, phy->macaddr, ETH_ALEN);
800 return 0;
801 }
802
803 memcpy(bss->bssid, vif->bss_conf.bssid, ETH_ALEN);
804 bss->bcn_interval = cpu_to_le16(vif->bss_conf.beacon_int);
805 bss->dtim_period = vif->bss_conf.dtim_period;
806 bss->phymode = mt76_connac_get_phy_mode(phy, vif,
807 chandef->chan->band, NULL);
808 bss->phymode_ext = mt76_connac_get_phy_mode_ext(phy, vif,
809 chandef->chan->band);
810
811 return 0;
812 }
813
814 static struct sk_buff *
__mt7996_mcu_alloc_bss_req(struct mt76_dev * dev,struct mt76_vif * mvif,int len)815 __mt7996_mcu_alloc_bss_req(struct mt76_dev *dev, struct mt76_vif *mvif, int len)
816 {
817 struct bss_req_hdr hdr = {
818 .bss_idx = mvif->idx,
819 };
820 struct sk_buff *skb;
821
822 skb = mt76_mcu_msg_alloc(dev, NULL, len);
823 if (!skb)
824 return ERR_PTR(-ENOMEM);
825
826 skb_put_data(skb, &hdr, sizeof(hdr));
827
828 return skb;
829 }
830
mt7996_mcu_add_bss_info(struct mt7996_phy * phy,struct ieee80211_vif * vif,int enable)831 int mt7996_mcu_add_bss_info(struct mt7996_phy *phy,
832 struct ieee80211_vif *vif, int enable)
833 {
834 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
835 struct mt7996_dev *dev = phy->dev;
836 struct sk_buff *skb;
837
838 if (mvif->mt76.omac_idx >= REPEATER_BSSID_START) {
839 mt7996_mcu_muar_config(phy, vif, false, enable);
840 mt7996_mcu_muar_config(phy, vif, true, enable);
841 }
842
843 skb = __mt7996_mcu_alloc_bss_req(&dev->mt76, &mvif->mt76,
844 MT7996_BSS_UPDATE_MAX_SIZE);
845 if (IS_ERR(skb))
846 return PTR_ERR(skb);
847
848 /* bss_basic must be first */
849 mt7996_mcu_bss_basic_tlv(skb, vif, NULL, phy->mt76,
850 mvif->sta.wcid.idx, enable);
851 mt7996_mcu_bss_sec_tlv(skb, vif);
852
853 if (vif->type == NL80211_IFTYPE_MONITOR)
854 goto out;
855
856 if (enable) {
857 mt7996_mcu_bss_rfch_tlv(skb, vif, phy);
858 mt7996_mcu_bss_bmc_tlv(skb, vif, phy);
859 mt7996_mcu_bss_ra_tlv(skb, vif, phy);
860 mt7996_mcu_bss_txcmd_tlv(skb, true);
861 mt7996_mcu_bss_ifs_timing_tlv(skb, vif);
862
863 if (vif->bss_conf.he_support)
864 mt7996_mcu_bss_he_tlv(skb, vif, phy);
865
866 /* this tag is necessary no matter if the vif is MLD */
867 mt7996_mcu_bss_mld_tlv(skb, vif);
868 }
869 out:
870 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
871 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true);
872 }
873
mt7996_mcu_set_timing(struct mt7996_phy * phy,struct ieee80211_vif * vif)874 int mt7996_mcu_set_timing(struct mt7996_phy *phy, struct ieee80211_vif *vif)
875 {
876 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
877 struct mt7996_dev *dev = phy->dev;
878 struct sk_buff *skb;
879
880 skb = __mt7996_mcu_alloc_bss_req(&dev->mt76, &mvif->mt76,
881 MT7996_BSS_UPDATE_MAX_SIZE);
882 if (IS_ERR(skb))
883 return PTR_ERR(skb);
884
885 mt7996_mcu_bss_ifs_timing_tlv(skb, vif);
886
887 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
888 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true);
889 }
890
891 static int
mt7996_mcu_sta_ba(struct mt76_dev * dev,struct mt76_vif * mvif,struct ieee80211_ampdu_params * params,bool enable,bool tx)892 mt7996_mcu_sta_ba(struct mt76_dev *dev, struct mt76_vif *mvif,
893 struct ieee80211_ampdu_params *params,
894 bool enable, bool tx)
895 {
896 struct mt76_wcid *wcid = (struct mt76_wcid *)params->sta->drv_priv;
897 struct sta_rec_ba_uni *ba;
898 struct sk_buff *skb;
899 struct tlv *tlv;
900
901 skb = __mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid,
902 MT7996_STA_UPDATE_MAX_SIZE);
903 if (IS_ERR(skb))
904 return PTR_ERR(skb);
905
906 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BA, sizeof(*ba));
907
908 ba = (struct sta_rec_ba_uni *)tlv;
909 ba->ba_type = tx ? MT_BA_TYPE_ORIGINATOR : MT_BA_TYPE_RECIPIENT;
910 ba->winsize = cpu_to_le16(params->buf_size);
911 ba->ssn = cpu_to_le16(params->ssn);
912 ba->ba_en = enable << params->tid;
913 ba->amsdu = params->amsdu;
914 ba->tid = params->tid;
915
916 return mt76_mcu_skb_send_msg(dev, skb,
917 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true);
918 }
919
920 /** starec & wtbl **/
mt7996_mcu_add_tx_ba(struct mt7996_dev * dev,struct ieee80211_ampdu_params * params,bool enable)921 int mt7996_mcu_add_tx_ba(struct mt7996_dev *dev,
922 struct ieee80211_ampdu_params *params,
923 bool enable)
924 {
925 struct mt7996_sta *msta = (struct mt7996_sta *)params->sta->drv_priv;
926 struct mt7996_vif *mvif = msta->vif;
927
928 if (enable && !params->amsdu)
929 msta->wcid.amsdu = false;
930
931 return mt7996_mcu_sta_ba(&dev->mt76, &mvif->mt76, params,
932 enable, true);
933 }
934
mt7996_mcu_add_rx_ba(struct mt7996_dev * dev,struct ieee80211_ampdu_params * params,bool enable)935 int mt7996_mcu_add_rx_ba(struct mt7996_dev *dev,
936 struct ieee80211_ampdu_params *params,
937 bool enable)
938 {
939 struct mt7996_sta *msta = (struct mt7996_sta *)params->sta->drv_priv;
940 struct mt7996_vif *mvif = msta->vif;
941
942 return mt7996_mcu_sta_ba(&dev->mt76, &mvif->mt76, params,
943 enable, false);
944 }
945
946 static void
mt7996_mcu_sta_he_tlv(struct sk_buff * skb,struct ieee80211_sta * sta)947 mt7996_mcu_sta_he_tlv(struct sk_buff *skb, struct ieee80211_sta *sta)
948 {
949 struct ieee80211_he_cap_elem *elem = &sta->deflink.he_cap.he_cap_elem;
950 struct ieee80211_he_mcs_nss_supp mcs_map;
951 struct sta_rec_he_v2 *he;
952 struct tlv *tlv;
953 int i = 0;
954
955 if (!sta->deflink.he_cap.has_he)
956 return;
957
958 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE_V2, sizeof(*he));
959
960 he = (struct sta_rec_he_v2 *)tlv;
961 for (i = 0; i < 11; i++) {
962 if (i < 6)
963 he->he_mac_cap[i] = elem->mac_cap_info[i];
964 he->he_phy_cap[i] = elem->phy_cap_info[i];
965 }
966
967 mcs_map = sta->deflink.he_cap.he_mcs_nss_supp;
968 switch (sta->deflink.bandwidth) {
969 case IEEE80211_STA_RX_BW_160:
970 if (elem->phy_cap_info[0] &
971 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G)
972 mt7996_mcu_set_sta_he_mcs(sta,
973 &he->max_nss_mcs[CMD_HE_MCS_BW8080],
974 le16_to_cpu(mcs_map.rx_mcs_80p80));
975
976 mt7996_mcu_set_sta_he_mcs(sta,
977 &he->max_nss_mcs[CMD_HE_MCS_BW160],
978 le16_to_cpu(mcs_map.rx_mcs_160));
979 fallthrough;
980 default:
981 mt7996_mcu_set_sta_he_mcs(sta,
982 &he->max_nss_mcs[CMD_HE_MCS_BW80],
983 le16_to_cpu(mcs_map.rx_mcs_80));
984 break;
985 }
986
987 he->pkt_ext = 2;
988 }
989
990 static void
mt7996_mcu_sta_he_6g_tlv(struct sk_buff * skb,struct ieee80211_sta * sta)991 mt7996_mcu_sta_he_6g_tlv(struct sk_buff *skb, struct ieee80211_sta *sta)
992 {
993 struct sta_rec_he_6g_capa *he_6g;
994 struct tlv *tlv;
995
996 if (!sta->deflink.he_6ghz_capa.capa)
997 return;
998
999 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE_6G, sizeof(*he_6g));
1000
1001 he_6g = (struct sta_rec_he_6g_capa *)tlv;
1002 he_6g->capa = sta->deflink.he_6ghz_capa.capa;
1003 }
1004
1005 static void
mt7996_mcu_sta_eht_tlv(struct sk_buff * skb,struct ieee80211_sta * sta)1006 mt7996_mcu_sta_eht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta)
1007 {
1008 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv;
1009 struct ieee80211_vif *vif = container_of((void *)msta->vif,
1010 struct ieee80211_vif, drv_priv);
1011 struct ieee80211_eht_mcs_nss_supp *mcs_map;
1012 struct ieee80211_eht_cap_elem_fixed *elem;
1013 struct sta_rec_eht *eht;
1014 struct tlv *tlv;
1015
1016 if (!sta->deflink.eht_cap.has_eht)
1017 return;
1018
1019 mcs_map = &sta->deflink.eht_cap.eht_mcs_nss_supp;
1020 elem = &sta->deflink.eht_cap.eht_cap_elem;
1021
1022 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_EHT, sizeof(*eht));
1023
1024 eht = (struct sta_rec_eht *)tlv;
1025 eht->tid_bitmap = 0xff;
1026 eht->mac_cap = cpu_to_le16(*(u16 *)elem->mac_cap_info);
1027 eht->phy_cap = cpu_to_le64(*(u64 *)elem->phy_cap_info);
1028 eht->phy_cap_ext = cpu_to_le64(elem->phy_cap_info[8]);
1029
1030 if (vif->type != NL80211_IFTYPE_STATION &&
1031 (sta->deflink.he_cap.he_cap_elem.phy_cap_info[0] &
1032 (IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G |
1033 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G |
1034 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G |
1035 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G)) == 0) {
1036 memcpy(eht->mcs_map_bw20, &mcs_map->only_20mhz,
1037 sizeof(eht->mcs_map_bw20));
1038 return;
1039 }
1040
1041 memcpy(eht->mcs_map_bw80, &mcs_map->bw._80, sizeof(eht->mcs_map_bw80));
1042 memcpy(eht->mcs_map_bw160, &mcs_map->bw._160, sizeof(eht->mcs_map_bw160));
1043 memcpy(eht->mcs_map_bw320, &mcs_map->bw._320, sizeof(eht->mcs_map_bw320));
1044 }
1045
1046 static void
mt7996_mcu_sta_ht_tlv(struct sk_buff * skb,struct ieee80211_sta * sta)1047 mt7996_mcu_sta_ht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta)
1048 {
1049 struct sta_rec_ht *ht;
1050 struct tlv *tlv;
1051
1052 if (!sta->deflink.ht_cap.ht_supported)
1053 return;
1054
1055 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HT, sizeof(*ht));
1056
1057 ht = (struct sta_rec_ht *)tlv;
1058 ht->ht_cap = cpu_to_le16(sta->deflink.ht_cap.cap);
1059 }
1060
1061 static void
mt7996_mcu_sta_vht_tlv(struct sk_buff * skb,struct ieee80211_sta * sta)1062 mt7996_mcu_sta_vht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta)
1063 {
1064 struct sta_rec_vht *vht;
1065 struct tlv *tlv;
1066
1067 /* For 6G band, this tlv is necessary to let hw work normally */
1068 if (!sta->deflink.he_6ghz_capa.capa && !sta->deflink.vht_cap.vht_supported)
1069 return;
1070
1071 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_VHT, sizeof(*vht));
1072
1073 vht = (struct sta_rec_vht *)tlv;
1074 vht->vht_cap = cpu_to_le32(sta->deflink.vht_cap.cap);
1075 vht->vht_rx_mcs_map = sta->deflink.vht_cap.vht_mcs.rx_mcs_map;
1076 vht->vht_tx_mcs_map = sta->deflink.vht_cap.vht_mcs.tx_mcs_map;
1077 }
1078
1079 static void
mt7996_mcu_sta_amsdu_tlv(struct mt7996_dev * dev,struct sk_buff * skb,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1080 mt7996_mcu_sta_amsdu_tlv(struct mt7996_dev *dev, struct sk_buff *skb,
1081 struct ieee80211_vif *vif, struct ieee80211_sta *sta)
1082 {
1083 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv;
1084 struct sta_rec_amsdu *amsdu;
1085 struct tlv *tlv;
1086
1087 if (vif->type != NL80211_IFTYPE_STATION &&
1088 vif->type != NL80211_IFTYPE_MESH_POINT &&
1089 vif->type != NL80211_IFTYPE_AP)
1090 return;
1091
1092 if (!sta->deflink.agg.max_amsdu_len)
1093 return;
1094
1095 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HW_AMSDU, sizeof(*amsdu));
1096 amsdu = (struct sta_rec_amsdu *)tlv;
1097 amsdu->max_amsdu_num = 8;
1098 amsdu->amsdu_en = true;
1099 msta->wcid.amsdu = true;
1100
1101 switch (sta->deflink.agg.max_amsdu_len) {
1102 case IEEE80211_MAX_MPDU_LEN_VHT_11454:
1103 amsdu->max_mpdu_size =
1104 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454;
1105 return;
1106 case IEEE80211_MAX_MPDU_LEN_HT_7935:
1107 case IEEE80211_MAX_MPDU_LEN_VHT_7991:
1108 amsdu->max_mpdu_size = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991;
1109 return;
1110 default:
1111 amsdu->max_mpdu_size = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895;
1112 return;
1113 }
1114 }
1115
1116 static void
mt7996_mcu_sta_muru_tlv(struct mt7996_dev * dev,struct sk_buff * skb,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1117 mt7996_mcu_sta_muru_tlv(struct mt7996_dev *dev, struct sk_buff *skb,
1118 struct ieee80211_vif *vif, struct ieee80211_sta *sta)
1119 {
1120 struct ieee80211_he_cap_elem *elem = &sta->deflink.he_cap.he_cap_elem;
1121 struct sta_rec_muru *muru;
1122 struct tlv *tlv;
1123
1124 if (vif->type != NL80211_IFTYPE_STATION &&
1125 vif->type != NL80211_IFTYPE_AP)
1126 return;
1127
1128 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_MURU, sizeof(*muru));
1129
1130 muru = (struct sta_rec_muru *)tlv;
1131 muru->cfg.mimo_dl_en = vif->bss_conf.eht_mu_beamformer ||
1132 vif->bss_conf.he_mu_beamformer ||
1133 vif->bss_conf.vht_mu_beamformer ||
1134 vif->bss_conf.vht_mu_beamformee;
1135 muru->cfg.ofdma_dl_en = true;
1136
1137 if (sta->deflink.vht_cap.vht_supported)
1138 muru->mimo_dl.vht_mu_bfee =
1139 !!(sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE);
1140
1141 if (!sta->deflink.he_cap.has_he)
1142 return;
1143
1144 muru->mimo_dl.partial_bw_dl_mimo =
1145 HE_PHY(CAP6_PARTIAL_BANDWIDTH_DL_MUMIMO, elem->phy_cap_info[6]);
1146
1147 muru->mimo_ul.full_ul_mimo =
1148 HE_PHY(CAP2_UL_MU_FULL_MU_MIMO, elem->phy_cap_info[2]);
1149 muru->mimo_ul.partial_ul_mimo =
1150 HE_PHY(CAP2_UL_MU_PARTIAL_MU_MIMO, elem->phy_cap_info[2]);
1151
1152 muru->ofdma_dl.punc_pream_rx =
1153 HE_PHY(CAP1_PREAMBLE_PUNC_RX_MASK, elem->phy_cap_info[1]);
1154 muru->ofdma_dl.he_20m_in_40m_2g =
1155 HE_PHY(CAP8_20MHZ_IN_40MHZ_HE_PPDU_IN_2G, elem->phy_cap_info[8]);
1156 muru->ofdma_dl.he_20m_in_160m =
1157 HE_PHY(CAP8_20MHZ_IN_160MHZ_HE_PPDU, elem->phy_cap_info[8]);
1158 muru->ofdma_dl.he_80m_in_160m =
1159 HE_PHY(CAP8_80MHZ_IN_160MHZ_HE_PPDU, elem->phy_cap_info[8]);
1160
1161 muru->ofdma_ul.t_frame_dur =
1162 HE_MAC(CAP1_TF_MAC_PAD_DUR_MASK, elem->mac_cap_info[1]);
1163 muru->ofdma_ul.mu_cascading =
1164 HE_MAC(CAP2_MU_CASCADING, elem->mac_cap_info[2]);
1165 muru->ofdma_ul.uo_ra =
1166 HE_MAC(CAP3_OFDMA_RA, elem->mac_cap_info[3]);
1167 }
1168
1169 static inline bool
mt7996_is_ebf_supported(struct mt7996_phy * phy,struct ieee80211_vif * vif,struct ieee80211_sta * sta,bool bfee)1170 mt7996_is_ebf_supported(struct mt7996_phy *phy, struct ieee80211_vif *vif,
1171 struct ieee80211_sta *sta, bool bfee)
1172 {
1173 int sts = hweight16(phy->mt76->chainmask);
1174
1175 if (vif->type != NL80211_IFTYPE_STATION &&
1176 vif->type != NL80211_IFTYPE_AP)
1177 return false;
1178
1179 if (!bfee && sts < 2)
1180 return false;
1181
1182 if (sta->deflink.eht_cap.has_eht) {
1183 struct ieee80211_sta_eht_cap *pc = &sta->deflink.eht_cap;
1184 struct ieee80211_eht_cap_elem_fixed *pe = &pc->eht_cap_elem;
1185
1186 if (bfee)
1187 return vif->bss_conf.eht_su_beamformee &&
1188 EHT_PHY(CAP0_SU_BEAMFORMER, pe->phy_cap_info[0]);
1189 else
1190 return vif->bss_conf.eht_su_beamformer &&
1191 EHT_PHY(CAP0_SU_BEAMFORMEE, pe->phy_cap_info[0]);
1192 }
1193
1194 if (sta->deflink.he_cap.has_he) {
1195 struct ieee80211_he_cap_elem *pe = &sta->deflink.he_cap.he_cap_elem;
1196
1197 if (bfee)
1198 return vif->bss_conf.he_su_beamformee &&
1199 HE_PHY(CAP3_SU_BEAMFORMER, pe->phy_cap_info[3]);
1200 else
1201 return vif->bss_conf.he_su_beamformer &&
1202 HE_PHY(CAP4_SU_BEAMFORMEE, pe->phy_cap_info[4]);
1203 }
1204
1205 if (sta->deflink.vht_cap.vht_supported) {
1206 u32 cap = sta->deflink.vht_cap.cap;
1207
1208 if (bfee)
1209 return vif->bss_conf.vht_su_beamformee &&
1210 (cap & IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE);
1211 else
1212 return vif->bss_conf.vht_su_beamformer &&
1213 (cap & IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE);
1214 }
1215
1216 return false;
1217 }
1218
1219 static void
mt7996_mcu_sta_sounding_rate(struct sta_rec_bf * bf)1220 mt7996_mcu_sta_sounding_rate(struct sta_rec_bf *bf)
1221 {
1222 bf->sounding_phy = MT_PHY_TYPE_OFDM;
1223 bf->ndp_rate = 0; /* mcs0 */
1224 bf->ndpa_rate = MT7996_CFEND_RATE_DEFAULT; /* ofdm 24m */
1225 bf->rept_poll_rate = MT7996_CFEND_RATE_DEFAULT; /* ofdm 24m */
1226 }
1227
1228 static void
mt7996_mcu_sta_bfer_ht(struct ieee80211_sta * sta,struct mt7996_phy * phy,struct sta_rec_bf * bf)1229 mt7996_mcu_sta_bfer_ht(struct ieee80211_sta *sta, struct mt7996_phy *phy,
1230 struct sta_rec_bf *bf)
1231 {
1232 struct ieee80211_mcs_info *mcs = &sta->deflink.ht_cap.mcs;
1233 u8 n = 0;
1234
1235 bf->tx_mode = MT_PHY_TYPE_HT;
1236
1237 if ((mcs->tx_params & IEEE80211_HT_MCS_TX_RX_DIFF) &&
1238 (mcs->tx_params & IEEE80211_HT_MCS_TX_DEFINED))
1239 n = FIELD_GET(IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK,
1240 mcs->tx_params);
1241 else if (mcs->rx_mask[3])
1242 n = 3;
1243 else if (mcs->rx_mask[2])
1244 n = 2;
1245 else if (mcs->rx_mask[1])
1246 n = 1;
1247
1248 bf->nrow = hweight8(phy->mt76->antenna_mask) - 1;
1249 bf->ncol = min_t(u8, bf->nrow, n);
1250 bf->ibf_ncol = n;
1251 }
1252
1253 static void
mt7996_mcu_sta_bfer_vht(struct ieee80211_sta * sta,struct mt7996_phy * phy,struct sta_rec_bf * bf,bool explicit)1254 mt7996_mcu_sta_bfer_vht(struct ieee80211_sta *sta, struct mt7996_phy *phy,
1255 struct sta_rec_bf *bf, bool explicit)
1256 {
1257 struct ieee80211_sta_vht_cap *pc = &sta->deflink.vht_cap;
1258 struct ieee80211_sta_vht_cap *vc = &phy->mt76->sband_5g.sband.vht_cap;
1259 u16 mcs_map = le16_to_cpu(pc->vht_mcs.rx_mcs_map);
1260 u8 nss_mcs = mt7996_mcu_get_sta_nss(mcs_map);
1261 u8 tx_ant = hweight8(phy->mt76->antenna_mask) - 1;
1262
1263 bf->tx_mode = MT_PHY_TYPE_VHT;
1264
1265 if (explicit) {
1266 u8 sts, snd_dim;
1267
1268 mt7996_mcu_sta_sounding_rate(bf);
1269
1270 sts = FIELD_GET(IEEE80211_VHT_CAP_BEAMFORMEE_STS_MASK,
1271 pc->cap);
1272 snd_dim = FIELD_GET(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK,
1273 vc->cap);
1274 bf->nrow = min_t(u8, min_t(u8, snd_dim, sts), tx_ant);
1275 bf->ncol = min_t(u8, nss_mcs, bf->nrow);
1276 bf->ibf_ncol = bf->ncol;
1277
1278 if (sta->deflink.bandwidth == IEEE80211_STA_RX_BW_160)
1279 bf->nrow = 1;
1280 } else {
1281 bf->nrow = tx_ant;
1282 bf->ncol = min_t(u8, nss_mcs, bf->nrow);
1283 bf->ibf_ncol = nss_mcs;
1284
1285 if (sta->deflink.bandwidth == IEEE80211_STA_RX_BW_160)
1286 bf->ibf_nrow = 1;
1287 }
1288 }
1289
1290 static void
mt7996_mcu_sta_bfer_he(struct ieee80211_sta * sta,struct ieee80211_vif * vif,struct mt7996_phy * phy,struct sta_rec_bf * bf)1291 mt7996_mcu_sta_bfer_he(struct ieee80211_sta *sta, struct ieee80211_vif *vif,
1292 struct mt7996_phy *phy, struct sta_rec_bf *bf)
1293 {
1294 struct ieee80211_sta_he_cap *pc = &sta->deflink.he_cap;
1295 struct ieee80211_he_cap_elem *pe = &pc->he_cap_elem;
1296 const struct ieee80211_sta_he_cap *vc =
1297 mt76_connac_get_he_phy_cap(phy->mt76, vif);
1298 const struct ieee80211_he_cap_elem *ve = &vc->he_cap_elem;
1299 u16 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_80);
1300 u8 nss_mcs = mt7996_mcu_get_sta_nss(mcs_map);
1301 u8 snd_dim, sts;
1302
1303 if (!vc)
1304 return;
1305
1306 bf->tx_mode = MT_PHY_TYPE_HE_SU;
1307
1308 mt7996_mcu_sta_sounding_rate(bf);
1309
1310 bf->trigger_su = HE_PHY(CAP6_TRIG_SU_BEAMFORMING_FB,
1311 pe->phy_cap_info[6]);
1312 bf->trigger_mu = HE_PHY(CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB,
1313 pe->phy_cap_info[6]);
1314 snd_dim = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK,
1315 ve->phy_cap_info[5]);
1316 sts = HE_PHY(CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_MASK,
1317 pe->phy_cap_info[4]);
1318 bf->nrow = min_t(u8, snd_dim, sts);
1319 bf->ncol = min_t(u8, nss_mcs, bf->nrow);
1320 bf->ibf_ncol = bf->ncol;
1321
1322 if (sta->deflink.bandwidth != IEEE80211_STA_RX_BW_160)
1323 return;
1324
1325 /* go over for 160MHz and 80p80 */
1326 if (pe->phy_cap_info[0] &
1327 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G) {
1328 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_160);
1329 nss_mcs = mt7996_mcu_get_sta_nss(mcs_map);
1330
1331 bf->ncol_gt_bw80 = nss_mcs;
1332 }
1333
1334 if (pe->phy_cap_info[0] &
1335 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G) {
1336 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_80p80);
1337 nss_mcs = mt7996_mcu_get_sta_nss(mcs_map);
1338
1339 if (bf->ncol_gt_bw80)
1340 bf->ncol_gt_bw80 = min_t(u8, bf->ncol_gt_bw80, nss_mcs);
1341 else
1342 bf->ncol_gt_bw80 = nss_mcs;
1343 }
1344
1345 snd_dim = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK,
1346 ve->phy_cap_info[5]);
1347 sts = HE_PHY(CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_MASK,
1348 pe->phy_cap_info[4]);
1349
1350 bf->nrow_gt_bw80 = min_t(int, snd_dim, sts);
1351 }
1352
1353 static void
mt7996_mcu_sta_bfer_eht(struct ieee80211_sta * sta,struct ieee80211_vif * vif,struct mt7996_phy * phy,struct sta_rec_bf * bf)1354 mt7996_mcu_sta_bfer_eht(struct ieee80211_sta *sta, struct ieee80211_vif *vif,
1355 struct mt7996_phy *phy, struct sta_rec_bf *bf)
1356 {
1357 struct ieee80211_sta_eht_cap *pc = &sta->deflink.eht_cap;
1358 struct ieee80211_eht_cap_elem_fixed *pe = &pc->eht_cap_elem;
1359 struct ieee80211_eht_mcs_nss_supp *eht_nss = &pc->eht_mcs_nss_supp;
1360 const struct ieee80211_sta_eht_cap *vc =
1361 mt76_connac_get_eht_phy_cap(phy->mt76, vif);
1362 const struct ieee80211_eht_cap_elem_fixed *ve = &vc->eht_cap_elem;
1363 u8 nss_mcs = u8_get_bits(eht_nss->bw._80.rx_tx_mcs9_max_nss,
1364 IEEE80211_EHT_MCS_NSS_RX) - 1;
1365 u8 snd_dim, sts;
1366
1367 bf->tx_mode = MT_PHY_TYPE_EHT_MU;
1368
1369 mt7996_mcu_sta_sounding_rate(bf);
1370
1371 bf->trigger_su = EHT_PHY(CAP3_TRIG_SU_BF_FDBK, pe->phy_cap_info[3]);
1372 bf->trigger_mu = EHT_PHY(CAP3_TRIG_MU_BF_PART_BW_FDBK, pe->phy_cap_info[3]);
1373 snd_dim = EHT_PHY(CAP2_SOUNDING_DIM_80MHZ_MASK, ve->phy_cap_info[2]);
1374 sts = EHT_PHY(CAP0_BEAMFORMEE_SS_80MHZ_MASK, pe->phy_cap_info[0]) +
1375 (EHT_PHY(CAP1_BEAMFORMEE_SS_80MHZ_MASK, pe->phy_cap_info[1]) << 1);
1376 bf->nrow = min_t(u8, snd_dim, sts);
1377 bf->ncol = min_t(u8, nss_mcs, bf->nrow);
1378 bf->ibf_ncol = bf->ncol;
1379
1380 if (sta->deflink.bandwidth < IEEE80211_STA_RX_BW_160)
1381 return;
1382
1383 switch (sta->deflink.bandwidth) {
1384 case IEEE80211_STA_RX_BW_160:
1385 snd_dim = EHT_PHY(CAP2_SOUNDING_DIM_160MHZ_MASK, ve->phy_cap_info[2]);
1386 sts = EHT_PHY(CAP1_BEAMFORMEE_SS_160MHZ_MASK, pe->phy_cap_info[1]);
1387 nss_mcs = u8_get_bits(eht_nss->bw._160.rx_tx_mcs9_max_nss,
1388 IEEE80211_EHT_MCS_NSS_RX) - 1;
1389
1390 bf->nrow_gt_bw80 = min_t(u8, snd_dim, sts);
1391 bf->ncol_gt_bw80 = nss_mcs;
1392 break;
1393 case IEEE80211_STA_RX_BW_320:
1394 snd_dim = EHT_PHY(CAP2_SOUNDING_DIM_320MHZ_MASK, ve->phy_cap_info[2]) +
1395 (EHT_PHY(CAP3_SOUNDING_DIM_320MHZ_MASK,
1396 ve->phy_cap_info[3]) << 1);
1397 sts = EHT_PHY(CAP1_BEAMFORMEE_SS_320MHZ_MASK, pe->phy_cap_info[1]);
1398 nss_mcs = u8_get_bits(eht_nss->bw._320.rx_tx_mcs9_max_nss,
1399 IEEE80211_EHT_MCS_NSS_RX) - 1;
1400
1401 bf->nrow_gt_bw80 = min_t(u8, snd_dim, sts) << 4;
1402 bf->ncol_gt_bw80 = nss_mcs << 4;
1403 break;
1404 default:
1405 break;
1406 }
1407 }
1408
1409 static void
mt7996_mcu_sta_bfer_tlv(struct mt7996_dev * dev,struct sk_buff * skb,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1410 mt7996_mcu_sta_bfer_tlv(struct mt7996_dev *dev, struct sk_buff *skb,
1411 struct ieee80211_vif *vif, struct ieee80211_sta *sta)
1412 {
1413 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
1414 struct mt7996_phy *phy = mvif->phy;
1415 int tx_ant = hweight16(phy->mt76->chainmask) - 1;
1416 struct sta_rec_bf *bf;
1417 struct tlv *tlv;
1418 const u8 matrix[4][4] = {
1419 {0, 0, 0, 0},
1420 {1, 1, 0, 0}, /* 2x1, 2x2, 2x3, 2x4 */
1421 {2, 4, 4, 0}, /* 3x1, 3x2, 3x3, 3x4 */
1422 {3, 5, 6, 0} /* 4x1, 4x2, 4x3, 4x4 */
1423 };
1424 bool ebf;
1425
1426 if (!(sta->deflink.ht_cap.ht_supported || sta->deflink.he_cap.has_he))
1427 return;
1428
1429 ebf = mt7996_is_ebf_supported(phy, vif, sta, false);
1430 if (!ebf && !dev->ibf)
1431 return;
1432
1433 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BF, sizeof(*bf));
1434 bf = (struct sta_rec_bf *)tlv;
1435
1436 /* he/eht: eBF only, in accordance with spec
1437 * vht: support eBF and iBF
1438 * ht: iBF only, since mac80211 lacks of eBF support
1439 */
1440 if (sta->deflink.eht_cap.has_eht && ebf)
1441 mt7996_mcu_sta_bfer_eht(sta, vif, phy, bf);
1442 else if (sta->deflink.he_cap.has_he && ebf)
1443 mt7996_mcu_sta_bfer_he(sta, vif, phy, bf);
1444 else if (sta->deflink.vht_cap.vht_supported)
1445 mt7996_mcu_sta_bfer_vht(sta, phy, bf, ebf);
1446 else if (sta->deflink.ht_cap.ht_supported)
1447 mt7996_mcu_sta_bfer_ht(sta, phy, bf);
1448 else
1449 return;
1450
1451 bf->bf_cap = ebf ? ebf : dev->ibf << 1;
1452 bf->bw = sta->deflink.bandwidth;
1453 bf->ibf_dbw = sta->deflink.bandwidth;
1454 bf->ibf_nrow = tx_ant;
1455
1456 if (!ebf && sta->deflink.bandwidth <= IEEE80211_STA_RX_BW_40 && !bf->ncol)
1457 bf->ibf_timeout = 0x48;
1458 else
1459 bf->ibf_timeout = 0x18;
1460
1461 if (ebf && bf->nrow != tx_ant)
1462 bf->mem_20m = matrix[tx_ant][bf->ncol];
1463 else
1464 bf->mem_20m = matrix[bf->nrow][bf->ncol];
1465
1466 switch (sta->deflink.bandwidth) {
1467 case IEEE80211_STA_RX_BW_160:
1468 case IEEE80211_STA_RX_BW_80:
1469 bf->mem_total = bf->mem_20m * 2;
1470 break;
1471 case IEEE80211_STA_RX_BW_40:
1472 bf->mem_total = bf->mem_20m;
1473 break;
1474 case IEEE80211_STA_RX_BW_20:
1475 default:
1476 break;
1477 }
1478 }
1479
1480 static void
mt7996_mcu_sta_bfee_tlv(struct mt7996_dev * dev,struct sk_buff * skb,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1481 mt7996_mcu_sta_bfee_tlv(struct mt7996_dev *dev, struct sk_buff *skb,
1482 struct ieee80211_vif *vif, struct ieee80211_sta *sta)
1483 {
1484 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
1485 struct mt7996_phy *phy = mvif->phy;
1486 int tx_ant = hweight8(phy->mt76->antenna_mask) - 1;
1487 struct sta_rec_bfee *bfee;
1488 struct tlv *tlv;
1489 u8 nrow = 0;
1490
1491 if (!(sta->deflink.vht_cap.vht_supported || sta->deflink.he_cap.has_he))
1492 return;
1493
1494 if (!mt7996_is_ebf_supported(phy, vif, sta, true))
1495 return;
1496
1497 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BFEE, sizeof(*bfee));
1498 bfee = (struct sta_rec_bfee *)tlv;
1499
1500 if (sta->deflink.he_cap.has_he) {
1501 struct ieee80211_he_cap_elem *pe = &sta->deflink.he_cap.he_cap_elem;
1502
1503 nrow = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK,
1504 pe->phy_cap_info[5]);
1505 } else if (sta->deflink.vht_cap.vht_supported) {
1506 struct ieee80211_sta_vht_cap *pc = &sta->deflink.vht_cap;
1507
1508 nrow = FIELD_GET(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK,
1509 pc->cap);
1510 }
1511
1512 /* reply with identity matrix to avoid 2x2 BF negative gain */
1513 bfee->fb_identity_matrix = (nrow == 1 && tx_ant == 2);
1514 }
1515
1516 static void
mt7996_mcu_sta_phy_tlv(struct mt7996_dev * dev,struct sk_buff * skb,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1517 mt7996_mcu_sta_phy_tlv(struct mt7996_dev *dev, struct sk_buff *skb,
1518 struct ieee80211_vif *vif, struct ieee80211_sta *sta)
1519 {
1520 struct sta_rec_phy *phy;
1521 struct tlv *tlv;
1522 u8 af = 0, mm = 0;
1523
1524 if (!sta->deflink.ht_cap.ht_supported && !sta->deflink.he_6ghz_capa.capa)
1525 return;
1526
1527 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_PHY, sizeof(*phy));
1528
1529 phy = (struct sta_rec_phy *)tlv;
1530 if (sta->deflink.ht_cap.ht_supported) {
1531 af = sta->deflink.ht_cap.ampdu_factor;
1532 mm = sta->deflink.ht_cap.ampdu_density;
1533 }
1534
1535 if (sta->deflink.vht_cap.vht_supported) {
1536 u8 vht_af = FIELD_GET(IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK,
1537 sta->deflink.vht_cap.cap);
1538
1539 af = max_t(u8, af, vht_af);
1540 }
1541
1542 if (sta->deflink.he_6ghz_capa.capa) {
1543 af = le16_get_bits(sta->deflink.he_6ghz_capa.capa,
1544 IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP);
1545 mm = le16_get_bits(sta->deflink.he_6ghz_capa.capa,
1546 IEEE80211_HE_6GHZ_CAP_MIN_MPDU_START);
1547 }
1548
1549 phy->ampdu = FIELD_PREP(IEEE80211_HT_AMPDU_PARM_FACTOR, af) |
1550 FIELD_PREP(IEEE80211_HT_AMPDU_PARM_DENSITY, mm);
1551 phy->max_ampdu_len = af;
1552 }
1553
1554 static void
mt7996_mcu_sta_hdrt_tlv(struct mt7996_dev * dev,struct sk_buff * skb)1555 mt7996_mcu_sta_hdrt_tlv(struct mt7996_dev *dev, struct sk_buff *skb)
1556 {
1557 struct sta_rec_hdrt *hdrt;
1558 struct tlv *tlv;
1559
1560 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HDRT, sizeof(*hdrt));
1561
1562 hdrt = (struct sta_rec_hdrt *)tlv;
1563 hdrt->hdrt_mode = 1;
1564 }
1565
1566 static void
mt7996_mcu_sta_hdr_trans_tlv(struct mt7996_dev * dev,struct sk_buff * skb,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1567 mt7996_mcu_sta_hdr_trans_tlv(struct mt7996_dev *dev, struct sk_buff *skb,
1568 struct ieee80211_vif *vif,
1569 struct ieee80211_sta *sta)
1570 {
1571 struct sta_rec_hdr_trans *hdr_trans;
1572 struct mt76_wcid *wcid;
1573 struct tlv *tlv;
1574
1575 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HDR_TRANS, sizeof(*hdr_trans));
1576 hdr_trans = (struct sta_rec_hdr_trans *)tlv;
1577 hdr_trans->dis_rx_hdr_tran = true;
1578
1579 if (vif->type == NL80211_IFTYPE_STATION)
1580 hdr_trans->to_ds = true;
1581 else
1582 hdr_trans->from_ds = true;
1583
1584 wcid = (struct mt76_wcid *)sta->drv_priv;
1585 if (!wcid)
1586 return;
1587
1588 hdr_trans->dis_rx_hdr_tran = !test_bit(MT_WCID_FLAG_HDR_TRANS, &wcid->flags);
1589 if (test_bit(MT_WCID_FLAG_4ADDR, &wcid->flags)) {
1590 hdr_trans->to_ds = true;
1591 hdr_trans->from_ds = true;
1592 }
1593
1594 if (vif->type == NL80211_IFTYPE_MESH_POINT) {
1595 hdr_trans->to_ds = true;
1596 hdr_trans->from_ds = true;
1597 hdr_trans->mesh = true;
1598 }
1599 }
1600
1601 static enum mcu_mmps_mode
mt7996_mcu_get_mmps_mode(enum ieee80211_smps_mode smps)1602 mt7996_mcu_get_mmps_mode(enum ieee80211_smps_mode smps)
1603 {
1604 switch (smps) {
1605 case IEEE80211_SMPS_OFF:
1606 return MCU_MMPS_DISABLE;
1607 case IEEE80211_SMPS_STATIC:
1608 return MCU_MMPS_STATIC;
1609 case IEEE80211_SMPS_DYNAMIC:
1610 return MCU_MMPS_DYNAMIC;
1611 default:
1612 return MCU_MMPS_DISABLE;
1613 }
1614 }
1615
mt7996_mcu_set_fixed_rate_ctrl(struct mt7996_dev * dev,void * data,u16 version)1616 int mt7996_mcu_set_fixed_rate_ctrl(struct mt7996_dev *dev,
1617 void *data, u16 version)
1618 {
1619 struct ra_fixed_rate *req;
1620 struct uni_header hdr;
1621 struct sk_buff *skb;
1622 struct tlv *tlv;
1623 int len;
1624
1625 len = sizeof(hdr) + sizeof(*req);
1626
1627 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len);
1628 if (!skb)
1629 return -ENOMEM;
1630
1631 skb_put_data(skb, &hdr, sizeof(hdr));
1632
1633 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_RA_FIXED_RATE, sizeof(*req));
1634 req = (struct ra_fixed_rate *)tlv;
1635 req->version = cpu_to_le16(version);
1636 memcpy(&req->rate, data, sizeof(req->rate));
1637
1638 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
1639 MCU_WM_UNI_CMD(RA), true);
1640 }
1641
1642 static void
mt7996_mcu_sta_rate_ctrl_tlv(struct sk_buff * skb,struct mt7996_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1643 mt7996_mcu_sta_rate_ctrl_tlv(struct sk_buff *skb, struct mt7996_dev *dev,
1644 struct ieee80211_vif *vif, struct ieee80211_sta *sta)
1645 {
1646 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
1647 struct mt76_phy *mphy = mvif->phy->mt76;
1648 struct cfg80211_chan_def *chandef = &mphy->chandef;
1649 struct cfg80211_bitrate_mask *mask = &mvif->bitrate_mask;
1650 enum nl80211_band band = chandef->chan->band;
1651 struct sta_rec_ra *ra;
1652 struct tlv *tlv;
1653 u32 supp_rate = sta->deflink.supp_rates[band];
1654 u32 cap = sta->wme ? STA_CAP_WMM : 0;
1655
1656 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_RA, sizeof(*ra));
1657 ra = (struct sta_rec_ra *)tlv;
1658
1659 ra->valid = true;
1660 ra->auto_rate = true;
1661 ra->phy_mode = mt76_connac_get_phy_mode(mphy, vif, band, sta);
1662 ra->channel = chandef->chan->hw_value;
1663 ra->bw = (sta->deflink.bandwidth == IEEE80211_STA_RX_BW_320) ?
1664 CMD_CBW_320MHZ : sta->deflink.bandwidth;
1665 ra->phy.bw = ra->bw;
1666 ra->mmps_mode = mt7996_mcu_get_mmps_mode(sta->deflink.smps_mode);
1667
1668 if (supp_rate) {
1669 supp_rate &= mask->control[band].legacy;
1670 ra->rate_len = hweight32(supp_rate);
1671
1672 if (band == NL80211_BAND_2GHZ) {
1673 ra->supp_mode = MODE_CCK;
1674 ra->supp_cck_rate = supp_rate & GENMASK(3, 0);
1675
1676 if (ra->rate_len > 4) {
1677 ra->supp_mode |= MODE_OFDM;
1678 ra->supp_ofdm_rate = supp_rate >> 4;
1679 }
1680 } else {
1681 ra->supp_mode = MODE_OFDM;
1682 ra->supp_ofdm_rate = supp_rate;
1683 }
1684 }
1685
1686 if (sta->deflink.ht_cap.ht_supported) {
1687 ra->supp_mode |= MODE_HT;
1688 ra->af = sta->deflink.ht_cap.ampdu_factor;
1689 ra->ht_gf = !!(sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_GRN_FLD);
1690
1691 cap |= STA_CAP_HT;
1692 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_20)
1693 cap |= STA_CAP_SGI_20;
1694 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_40)
1695 cap |= STA_CAP_SGI_40;
1696 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_TX_STBC)
1697 cap |= STA_CAP_TX_STBC;
1698 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_RX_STBC)
1699 cap |= STA_CAP_RX_STBC;
1700 if (vif->bss_conf.ht_ldpc &&
1701 (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING))
1702 cap |= STA_CAP_LDPC;
1703
1704 mt7996_mcu_set_sta_ht_mcs(sta, ra->ht_mcs,
1705 mask->control[band].ht_mcs);
1706 ra->supp_ht_mcs = *(__le32 *)ra->ht_mcs;
1707 }
1708
1709 if (sta->deflink.vht_cap.vht_supported) {
1710 u8 af;
1711
1712 ra->supp_mode |= MODE_VHT;
1713 af = FIELD_GET(IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK,
1714 sta->deflink.vht_cap.cap);
1715 ra->af = max_t(u8, ra->af, af);
1716
1717 cap |= STA_CAP_VHT;
1718 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80)
1719 cap |= STA_CAP_VHT_SGI_80;
1720 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_160)
1721 cap |= STA_CAP_VHT_SGI_160;
1722 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_TXSTBC)
1723 cap |= STA_CAP_VHT_TX_STBC;
1724 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_1)
1725 cap |= STA_CAP_VHT_RX_STBC;
1726 if (vif->bss_conf.vht_ldpc &&
1727 (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC))
1728 cap |= STA_CAP_VHT_LDPC;
1729
1730 mt7996_mcu_set_sta_vht_mcs(sta, ra->supp_vht_mcs,
1731 mask->control[band].vht_mcs);
1732 }
1733
1734 if (sta->deflink.he_cap.has_he) {
1735 ra->supp_mode |= MODE_HE;
1736 cap |= STA_CAP_HE;
1737
1738 if (sta->deflink.he_6ghz_capa.capa)
1739 ra->af = le16_get_bits(sta->deflink.he_6ghz_capa.capa,
1740 IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP);
1741 }
1742 ra->sta_cap = cpu_to_le32(cap);
1743 }
1744
mt7996_mcu_add_rate_ctrl(struct mt7996_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta,bool changed)1745 int mt7996_mcu_add_rate_ctrl(struct mt7996_dev *dev, struct ieee80211_vif *vif,
1746 struct ieee80211_sta *sta, bool changed)
1747 {
1748 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
1749 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv;
1750 struct sk_buff *skb;
1751
1752 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,
1753 &msta->wcid,
1754 MT7996_STA_UPDATE_MAX_SIZE);
1755 if (IS_ERR(skb))
1756 return PTR_ERR(skb);
1757
1758 /* firmware rc algorithm refers to sta_rec_he for HE control.
1759 * once dev->rc_work changes the settings driver should also
1760 * update sta_rec_he here.
1761 */
1762 if (changed)
1763 mt7996_mcu_sta_he_tlv(skb, sta);
1764
1765 /* sta_rec_ra accommodates BW, NSS and only MCS range format
1766 * i.e 0-{7,8,9} for VHT.
1767 */
1768 mt7996_mcu_sta_rate_ctrl_tlv(skb, dev, vif, sta);
1769
1770 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
1771 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true);
1772 }
1773
1774 static int
mt7996_mcu_add_group(struct mt7996_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1775 mt7996_mcu_add_group(struct mt7996_dev *dev, struct ieee80211_vif *vif,
1776 struct ieee80211_sta *sta)
1777 {
1778 #define MT_STA_BSS_GROUP 1
1779 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
1780 struct mt7996_sta *msta;
1781 struct {
1782 u8 __rsv1[4];
1783
1784 __le16 tag;
1785 __le16 len;
1786 __le16 wlan_idx;
1787 u8 __rsv2[2];
1788 __le32 action;
1789 __le32 val;
1790 u8 __rsv3[8];
1791 } __packed req = {
1792 .tag = cpu_to_le16(UNI_VOW_DRR_CTRL),
1793 .len = cpu_to_le16(sizeof(req) - 4),
1794 .action = cpu_to_le32(MT_STA_BSS_GROUP),
1795 .val = cpu_to_le32(mvif->mt76.idx % 16),
1796 };
1797
1798 msta = sta ? (struct mt7996_sta *)sta->drv_priv : &mvif->sta;
1799 req.wlan_idx = cpu_to_le16(msta->wcid.idx);
1800
1801 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(VOW), &req,
1802 sizeof(req), true);
1803 }
1804
mt7996_mcu_add_sta(struct mt7996_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta,bool enable)1805 int mt7996_mcu_add_sta(struct mt7996_dev *dev, struct ieee80211_vif *vif,
1806 struct ieee80211_sta *sta, bool enable)
1807 {
1808 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
1809 struct mt7996_sta *msta;
1810 struct sk_buff *skb;
1811 int ret;
1812
1813 msta = sta ? (struct mt7996_sta *)sta->drv_priv : &mvif->sta;
1814
1815 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,
1816 &msta->wcid,
1817 MT7996_STA_UPDATE_MAX_SIZE);
1818 if (IS_ERR(skb))
1819 return PTR_ERR(skb);
1820
1821 /* starec basic */
1822 mt76_connac_mcu_sta_basic_tlv(&dev->mt76, skb, vif, sta, enable,
1823 !rcu_access_pointer(dev->mt76.wcid[msta->wcid.idx]));
1824 if (!enable)
1825 goto out;
1826
1827 /* tag order is in accordance with firmware dependency. */
1828 if (sta) {
1829 /* starec phy */
1830 mt7996_mcu_sta_phy_tlv(dev, skb, vif, sta);
1831 /* starec hdrt mode */
1832 mt7996_mcu_sta_hdrt_tlv(dev, skb);
1833 /* starec bfer */
1834 mt7996_mcu_sta_bfer_tlv(dev, skb, vif, sta);
1835 /* starec ht */
1836 mt7996_mcu_sta_ht_tlv(skb, sta);
1837 /* starec vht */
1838 mt7996_mcu_sta_vht_tlv(skb, sta);
1839 /* starec uapsd */
1840 mt76_connac_mcu_sta_uapsd(skb, vif, sta);
1841 /* starec amsdu */
1842 mt7996_mcu_sta_amsdu_tlv(dev, skb, vif, sta);
1843 /* starec he */
1844 mt7996_mcu_sta_he_tlv(skb, sta);
1845 /* starec he 6g*/
1846 mt7996_mcu_sta_he_6g_tlv(skb, sta);
1847 /* starec eht */
1848 mt7996_mcu_sta_eht_tlv(skb, sta);
1849 /* starec muru */
1850 mt7996_mcu_sta_muru_tlv(dev, skb, vif, sta);
1851 /* starec bfee */
1852 mt7996_mcu_sta_bfee_tlv(dev, skb, vif, sta);
1853 /* starec hdr trans */
1854 mt7996_mcu_sta_hdr_trans_tlv(dev, skb, vif, sta);
1855 }
1856
1857 ret = mt7996_mcu_add_group(dev, vif, sta);
1858 if (ret) {
1859 dev_kfree_skb(skb);
1860 return ret;
1861 }
1862 out:
1863 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
1864 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true);
1865 }
1866
1867 static int
mt7996_mcu_sta_key_tlv(struct mt76_wcid * wcid,struct mt76_connac_sta_key_conf * sta_key_conf,struct sk_buff * skb,struct ieee80211_key_conf * key,enum set_key_cmd cmd)1868 mt7996_mcu_sta_key_tlv(struct mt76_wcid *wcid,
1869 struct mt76_connac_sta_key_conf *sta_key_conf,
1870 struct sk_buff *skb,
1871 struct ieee80211_key_conf *key,
1872 enum set_key_cmd cmd)
1873 {
1874 struct sta_rec_sec_uni *sec;
1875 struct tlv *tlv;
1876
1877 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_KEY_V2, sizeof(*sec));
1878 sec = (struct sta_rec_sec_uni *)tlv;
1879 sec->add = cmd;
1880
1881 if (cmd == SET_KEY) {
1882 struct sec_key_uni *sec_key;
1883 u8 cipher;
1884
1885 cipher = mt76_connac_mcu_get_cipher(key->cipher);
1886 if (cipher == MCU_CIPHER_NONE)
1887 return -EOPNOTSUPP;
1888
1889 sec_key = &sec->key[0];
1890 sec_key->cipher_len = sizeof(*sec_key);
1891
1892 if (cipher == MCU_CIPHER_BIP_CMAC_128) {
1893 sec_key->wlan_idx = cpu_to_le16(wcid->idx);
1894 sec_key->cipher_id = MCU_CIPHER_AES_CCMP;
1895 sec_key->key_id = sta_key_conf->keyidx;
1896 sec_key->key_len = 16;
1897 memcpy(sec_key->key, sta_key_conf->key, 16);
1898
1899 sec_key = &sec->key[1];
1900 sec_key->wlan_idx = cpu_to_le16(wcid->idx);
1901 sec_key->cipher_id = MCU_CIPHER_BIP_CMAC_128;
1902 sec_key->cipher_len = sizeof(*sec_key);
1903 sec_key->key_len = 16;
1904 memcpy(sec_key->key, key->key, 16);
1905 sec->n_cipher = 2;
1906 } else {
1907 sec_key->wlan_idx = cpu_to_le16(wcid->idx);
1908 sec_key->cipher_id = cipher;
1909 sec_key->key_id = key->keyidx;
1910 sec_key->key_len = key->keylen;
1911 memcpy(sec_key->key, key->key, key->keylen);
1912
1913 if (cipher == MCU_CIPHER_TKIP) {
1914 /* Rx/Tx MIC keys are swapped */
1915 memcpy(sec_key->key + 16, key->key + 24, 8);
1916 memcpy(sec_key->key + 24, key->key + 16, 8);
1917 }
1918
1919 /* store key_conf for BIP batch update */
1920 if (cipher == MCU_CIPHER_AES_CCMP) {
1921 memcpy(sta_key_conf->key, key->key, key->keylen);
1922 sta_key_conf->keyidx = key->keyidx;
1923 }
1924
1925 sec->n_cipher = 1;
1926 }
1927 } else {
1928 sec->n_cipher = 0;
1929 }
1930
1931 return 0;
1932 }
1933
mt7996_mcu_add_key(struct mt76_dev * dev,struct ieee80211_vif * vif,struct mt76_connac_sta_key_conf * sta_key_conf,struct ieee80211_key_conf * key,int mcu_cmd,struct mt76_wcid * wcid,enum set_key_cmd cmd)1934 int mt7996_mcu_add_key(struct mt76_dev *dev, struct ieee80211_vif *vif,
1935 struct mt76_connac_sta_key_conf *sta_key_conf,
1936 struct ieee80211_key_conf *key, int mcu_cmd,
1937 struct mt76_wcid *wcid, enum set_key_cmd cmd)
1938 {
1939 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
1940 struct sk_buff *skb;
1941 int ret;
1942
1943 skb = __mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid,
1944 MT7996_STA_UPDATE_MAX_SIZE);
1945 if (IS_ERR(skb))
1946 return PTR_ERR(skb);
1947
1948 ret = mt7996_mcu_sta_key_tlv(wcid, sta_key_conf, skb, key, cmd);
1949 if (ret)
1950 return ret;
1951
1952 return mt76_mcu_skb_send_msg(dev, skb, mcu_cmd, true);
1953 }
1954
mt7996_mcu_add_dev_info(struct mt7996_phy * phy,struct ieee80211_vif * vif,bool enable)1955 int mt7996_mcu_add_dev_info(struct mt7996_phy *phy,
1956 struct ieee80211_vif *vif, bool enable)
1957 {
1958 struct mt7996_dev *dev = phy->dev;
1959 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
1960 struct {
1961 struct req_hdr {
1962 u8 omac_idx;
1963 u8 band_idx;
1964 u8 __rsv[2];
1965 } __packed hdr;
1966 struct req_tlv {
1967 __le16 tag;
1968 __le16 len;
1969 u8 active;
1970 u8 __rsv;
1971 u8 omac_addr[ETH_ALEN];
1972 } __packed tlv;
1973 } data = {
1974 .hdr = {
1975 .omac_idx = mvif->mt76.omac_idx,
1976 .band_idx = mvif->mt76.band_idx,
1977 },
1978 .tlv = {
1979 .tag = cpu_to_le16(DEV_INFO_ACTIVE),
1980 .len = cpu_to_le16(sizeof(struct req_tlv)),
1981 .active = enable,
1982 },
1983 };
1984
1985 if (mvif->mt76.omac_idx >= REPEATER_BSSID_START)
1986 return mt7996_mcu_muar_config(phy, vif, false, enable);
1987
1988 memcpy(data.tlv.omac_addr, vif->addr, ETH_ALEN);
1989 return mt76_mcu_send_msg(&dev->mt76, MCU_WMWA_UNI_CMD(DEV_INFO_UPDATE),
1990 &data, sizeof(data), true);
1991 }
1992
1993 static void
mt7996_mcu_beacon_cntdwn(struct ieee80211_vif * vif,struct sk_buff * rskb,struct sk_buff * skb,struct ieee80211_mutable_offsets * offs)1994 mt7996_mcu_beacon_cntdwn(struct ieee80211_vif *vif, struct sk_buff *rskb,
1995 struct sk_buff *skb,
1996 struct ieee80211_mutable_offsets *offs)
1997 {
1998 struct bss_bcn_cntdwn_tlv *info;
1999 struct tlv *tlv;
2000 u16 tag;
2001
2002 if (!offs->cntdwn_counter_offs[0])
2003 return;
2004
2005 tag = vif->bss_conf.csa_active ? UNI_BSS_INFO_BCN_CSA : UNI_BSS_INFO_BCN_BCC;
2006
2007 tlv = mt7996_mcu_add_uni_tlv(rskb, tag, sizeof(*info));
2008
2009 info = (struct bss_bcn_cntdwn_tlv *)tlv;
2010 info->cnt = skb->data[offs->cntdwn_counter_offs[0]];
2011 }
2012
2013 static void
mt7996_mcu_beacon_cont(struct mt7996_dev * dev,struct ieee80211_vif * vif,struct sk_buff * rskb,struct sk_buff * skb,struct bss_bcn_content_tlv * bcn,struct ieee80211_mutable_offsets * offs)2014 mt7996_mcu_beacon_cont(struct mt7996_dev *dev, struct ieee80211_vif *vif,
2015 struct sk_buff *rskb, struct sk_buff *skb,
2016 struct bss_bcn_content_tlv *bcn,
2017 struct ieee80211_mutable_offsets *offs)
2018 {
2019 struct mt76_wcid *wcid = &dev->mt76.global_wcid;
2020 u8 *buf;
2021
2022 bcn->pkt_len = cpu_to_le16(MT_TXD_SIZE + skb->len);
2023 bcn->tim_ie_pos = cpu_to_le16(offs->tim_offset);
2024
2025 if (offs->cntdwn_counter_offs[0]) {
2026 u16 offset = offs->cntdwn_counter_offs[0];
2027
2028 if (vif->bss_conf.csa_active)
2029 bcn->csa_ie_pos = cpu_to_le16(offset - 4);
2030 if (vif->bss_conf.color_change_active)
2031 bcn->bcc_ie_pos = cpu_to_le16(offset - 3);
2032 }
2033
2034 buf = (u8 *)bcn + sizeof(*bcn);
2035 mt7996_mac_write_txwi(dev, (__le32 *)buf, skb, wcid, NULL, 0, 0,
2036 BSS_CHANGED_BEACON);
2037
2038 memcpy(buf + MT_TXD_SIZE, skb->data, skb->len);
2039 }
2040
mt7996_mcu_add_beacon(struct ieee80211_hw * hw,struct ieee80211_vif * vif,int en)2041 int mt7996_mcu_add_beacon(struct ieee80211_hw *hw,
2042 struct ieee80211_vif *vif, int en)
2043 {
2044 struct mt7996_dev *dev = mt7996_hw_dev(hw);
2045 struct mt7996_phy *phy = mt7996_hw_phy(hw);
2046 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
2047 struct ieee80211_mutable_offsets offs;
2048 struct ieee80211_tx_info *info;
2049 struct sk_buff *skb, *rskb;
2050 struct tlv *tlv;
2051 struct bss_bcn_content_tlv *bcn;
2052 int len;
2053
2054 rskb = __mt7996_mcu_alloc_bss_req(&dev->mt76, &mvif->mt76,
2055 MT7996_MAX_BSS_OFFLOAD_SIZE);
2056 if (IS_ERR(rskb))
2057 return PTR_ERR(rskb);
2058
2059 skb = ieee80211_beacon_get_template(hw, vif, &offs, 0);
2060 if (!skb) {
2061 dev_kfree_skb(rskb);
2062 return -EINVAL;
2063 }
2064
2065 if (skb->len > MT7996_MAX_BEACON_SIZE) {
2066 dev_err(dev->mt76.dev, "Bcn size limit exceed\n");
2067 dev_kfree_skb(rskb);
2068 dev_kfree_skb(skb);
2069 return -EINVAL;
2070 }
2071
2072 info = IEEE80211_SKB_CB(skb);
2073 info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, phy->mt76->band_idx);
2074
2075 len = ALIGN(sizeof(*bcn) + MT_TXD_SIZE + skb->len, 4);
2076 tlv = mt7996_mcu_add_uni_tlv(rskb, UNI_BSS_INFO_BCN_CONTENT, len);
2077 bcn = (struct bss_bcn_content_tlv *)tlv;
2078 bcn->enable = en;
2079 if (!en)
2080 goto out;
2081
2082 mt7996_mcu_beacon_cont(dev, vif, rskb, skb, bcn, &offs);
2083 /* TODO: subtag - 11v MBSSID */
2084 mt7996_mcu_beacon_cntdwn(vif, rskb, skb, &offs);
2085 out:
2086 dev_kfree_skb(skb);
2087 return mt76_mcu_skb_send_msg(&phy->dev->mt76, rskb,
2088 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true);
2089 }
2090
mt7996_mcu_beacon_inband_discov(struct mt7996_dev * dev,struct ieee80211_vif * vif,u32 changed)2091 int mt7996_mcu_beacon_inband_discov(struct mt7996_dev *dev,
2092 struct ieee80211_vif *vif, u32 changed)
2093 {
2094 #define OFFLOAD_TX_MODE_SU BIT(0)
2095 #define OFFLOAD_TX_MODE_MU BIT(1)
2096 struct ieee80211_hw *hw = mt76_hw(dev);
2097 struct mt7996_phy *phy = mt7996_hw_phy(hw);
2098 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
2099 struct cfg80211_chan_def *chandef = &mvif->phy->mt76->chandef;
2100 enum nl80211_band band = chandef->chan->band;
2101 struct mt76_wcid *wcid = &dev->mt76.global_wcid;
2102 struct bss_inband_discovery_tlv *discov;
2103 struct ieee80211_tx_info *info;
2104 struct sk_buff *rskb, *skb = NULL;
2105 struct tlv *tlv;
2106 u8 *buf, interval;
2107 int len;
2108
2109 if (vif->bss_conf.nontransmitted)
2110 return 0;
2111
2112 rskb = __mt7996_mcu_alloc_bss_req(&dev->mt76, &mvif->mt76,
2113 MT7996_MAX_BSS_OFFLOAD_SIZE);
2114 if (IS_ERR(rskb))
2115 return PTR_ERR(rskb);
2116
2117 if (changed & BSS_CHANGED_FILS_DISCOVERY &&
2118 vif->bss_conf.fils_discovery.max_interval) {
2119 interval = vif->bss_conf.fils_discovery.max_interval;
2120 skb = ieee80211_get_fils_discovery_tmpl(hw, vif);
2121 } else if (changed & BSS_CHANGED_UNSOL_BCAST_PROBE_RESP &&
2122 vif->bss_conf.unsol_bcast_probe_resp_interval) {
2123 interval = vif->bss_conf.unsol_bcast_probe_resp_interval;
2124 skb = ieee80211_get_unsol_bcast_probe_resp_tmpl(hw, vif);
2125 }
2126
2127 if (!skb) {
2128 dev_kfree_skb(rskb);
2129 return -EINVAL;
2130 }
2131
2132 if (skb->len > MT7996_MAX_BEACON_SIZE) {
2133 dev_err(dev->mt76.dev, "inband discovery size limit exceed\n");
2134 dev_kfree_skb(rskb);
2135 dev_kfree_skb(skb);
2136 return -EINVAL;
2137 }
2138
2139 info = IEEE80211_SKB_CB(skb);
2140 info->control.vif = vif;
2141 info->band = band;
2142 info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, phy->mt76->band_idx);
2143
2144 len = ALIGN(sizeof(*discov) + MT_TXD_SIZE + skb->len, 4);
2145 tlv = mt7996_mcu_add_uni_tlv(rskb, UNI_BSS_INFO_OFFLOAD, len);
2146
2147 discov = (struct bss_inband_discovery_tlv *)tlv;
2148 discov->tx_mode = OFFLOAD_TX_MODE_SU;
2149 /* 0: UNSOL PROBE RESP, 1: FILS DISCOV */
2150 discov->tx_type = !!(changed & BSS_CHANGED_FILS_DISCOVERY);
2151 discov->tx_interval = interval;
2152 discov->prob_rsp_len = cpu_to_le16(MT_TXD_SIZE + skb->len);
2153 discov->enable = true;
2154 discov->wcid = cpu_to_le16(MT7996_WTBL_RESERVED);
2155
2156 buf = (u8 *)tlv + sizeof(*discov);
2157
2158 mt7996_mac_write_txwi(dev, (__le32 *)buf, skb, wcid, NULL, 0, 0, changed);
2159
2160 memcpy(buf + MT_TXD_SIZE, skb->data, skb->len);
2161
2162 dev_kfree_skb(skb);
2163
2164 return mt76_mcu_skb_send_msg(&dev->mt76, rskb,
2165 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true);
2166 }
2167
mt7996_driver_own(struct mt7996_dev * dev,u8 band)2168 static int mt7996_driver_own(struct mt7996_dev *dev, u8 band)
2169 {
2170 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(band), MT_TOP_LPCR_HOST_DRV_OWN);
2171 if (!mt76_poll_msec(dev, MT_TOP_LPCR_HOST_BAND(band),
2172 MT_TOP_LPCR_HOST_FW_OWN_STAT, 0, 500)) {
2173 dev_err(dev->mt76.dev, "Timeout for driver own\n");
2174 return -EIO;
2175 }
2176
2177 /* clear irq when the driver own success */
2178 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND_IRQ_STAT(band),
2179 MT_TOP_LPCR_HOST_BAND_STAT);
2180
2181 return 0;
2182 }
2183
mt7996_patch_sec_mode(u32 key_info)2184 static u32 mt7996_patch_sec_mode(u32 key_info)
2185 {
2186 u32 sec = u32_get_bits(key_info, MT7996_PATCH_SEC), key = 0;
2187
2188 if (key_info == GENMASK(31, 0) || sec == MT7996_SEC_MODE_PLAIN)
2189 return 0;
2190
2191 if (sec == MT7996_SEC_MODE_AES)
2192 key = u32_get_bits(key_info, MT7996_PATCH_AES_KEY);
2193 else
2194 key = u32_get_bits(key_info, MT7996_PATCH_SCRAMBLE_KEY);
2195
2196 return MT7996_SEC_ENCRYPT | MT7996_SEC_IV |
2197 u32_encode_bits(key, MT7996_SEC_KEY_IDX);
2198 }
2199
mt7996_load_patch(struct mt7996_dev * dev)2200 static int mt7996_load_patch(struct mt7996_dev *dev)
2201 {
2202 const struct mt7996_patch_hdr *hdr;
2203 const struct firmware *fw = NULL;
2204 int i, ret, sem;
2205
2206 sem = mt76_connac_mcu_patch_sem_ctrl(&dev->mt76, 1);
2207 switch (sem) {
2208 case PATCH_IS_DL:
2209 return 0;
2210 case PATCH_NOT_DL_SEM_SUCCESS:
2211 break;
2212 default:
2213 dev_err(dev->mt76.dev, "Failed to get patch semaphore\n");
2214 return -EAGAIN;
2215 }
2216
2217 ret = request_firmware(&fw, MT7996_ROM_PATCH, dev->mt76.dev);
2218 if (ret)
2219 goto out;
2220
2221 if (!fw || !fw->data || fw->size < sizeof(*hdr)) {
2222 dev_err(dev->mt76.dev, "Invalid firmware\n");
2223 ret = -EINVAL;
2224 goto out;
2225 }
2226
2227 hdr = (const struct mt7996_patch_hdr *)(fw->data);
2228
2229 dev_info(dev->mt76.dev, "HW/SW Version: 0x%x, Build Time: %.16s\n",
2230 be32_to_cpu(hdr->hw_sw_ver), hdr->build_date);
2231
2232 for (i = 0; i < be32_to_cpu(hdr->desc.n_region); i++) {
2233 struct mt7996_patch_sec *sec;
2234 const u8 *dl;
2235 u32 len, addr, sec_key_idx, mode = DL_MODE_NEED_RSP;
2236
2237 sec = (struct mt7996_patch_sec *)(fw->data + sizeof(*hdr) +
2238 i * sizeof(*sec));
2239 if ((be32_to_cpu(sec->type) & PATCH_SEC_TYPE_MASK) !=
2240 PATCH_SEC_TYPE_INFO) {
2241 ret = -EINVAL;
2242 goto out;
2243 }
2244
2245 addr = be32_to_cpu(sec->info.addr);
2246 len = be32_to_cpu(sec->info.len);
2247 sec_key_idx = be32_to_cpu(sec->info.sec_key_idx);
2248 dl = fw->data + be32_to_cpu(sec->offs);
2249
2250 mode |= mt7996_patch_sec_mode(sec_key_idx);
2251
2252 ret = mt76_connac_mcu_init_download(&dev->mt76, addr, len,
2253 mode);
2254 if (ret) {
2255 dev_err(dev->mt76.dev, "Download request failed\n");
2256 goto out;
2257 }
2258
2259 ret = __mt76_mcu_send_firmware(&dev->mt76, MCU_CMD(FW_SCATTER),
2260 dl, len, 4096);
2261 if (ret) {
2262 dev_err(dev->mt76.dev, "Failed to send patch\n");
2263 goto out;
2264 }
2265 }
2266
2267 ret = mt76_connac_mcu_start_patch(&dev->mt76);
2268 if (ret)
2269 dev_err(dev->mt76.dev, "Failed to start patch\n");
2270
2271 out:
2272 sem = mt76_connac_mcu_patch_sem_ctrl(&dev->mt76, 0);
2273 switch (sem) {
2274 case PATCH_REL_SEM_SUCCESS:
2275 break;
2276 default:
2277 ret = -EAGAIN;
2278 dev_err(dev->mt76.dev, "Failed to release patch semaphore\n");
2279 break;
2280 }
2281 release_firmware(fw);
2282
2283 return ret;
2284 }
2285
2286 static int
mt7996_mcu_send_ram_firmware(struct mt7996_dev * dev,const struct mt7996_fw_trailer * hdr,const u8 * data,enum mt7996_ram_type type)2287 mt7996_mcu_send_ram_firmware(struct mt7996_dev *dev,
2288 const struct mt7996_fw_trailer *hdr,
2289 const u8 *data, enum mt7996_ram_type type)
2290 {
2291 int i, offset = 0;
2292 u32 override = 0, option = 0;
2293
2294 for (i = 0; i < hdr->n_region; i++) {
2295 const struct mt7996_fw_region *region;
2296 int err;
2297 u32 len, addr, mode;
2298
2299 region = (const struct mt7996_fw_region *)((const u8 *)hdr -
2300 (hdr->n_region - i) * sizeof(*region));
2301 /* DSP and WA use same mode */
2302 mode = mt76_connac_mcu_gen_dl_mode(&dev->mt76,
2303 region->feature_set,
2304 type != MT7996_RAM_TYPE_WM);
2305 len = le32_to_cpu(region->len);
2306 addr = le32_to_cpu(region->addr);
2307
2308 if (region->feature_set & FW_FEATURE_OVERRIDE_ADDR)
2309 override = addr;
2310
2311 err = mt76_connac_mcu_init_download(&dev->mt76, addr, len,
2312 mode);
2313 if (err) {
2314 dev_err(dev->mt76.dev, "Download request failed\n");
2315 return err;
2316 }
2317
2318 err = __mt76_mcu_send_firmware(&dev->mt76, MCU_CMD(FW_SCATTER),
2319 data + offset, len, 4096);
2320 if (err) {
2321 dev_err(dev->mt76.dev, "Failed to send firmware.\n");
2322 return err;
2323 }
2324
2325 offset += len;
2326 }
2327
2328 if (override)
2329 option |= FW_START_OVERRIDE;
2330
2331 if (type == MT7996_RAM_TYPE_WA)
2332 option |= FW_START_WORKING_PDA_CR4;
2333 else if (type == MT7996_RAM_TYPE_DSP)
2334 option |= FW_START_WORKING_PDA_DSP;
2335
2336 return mt76_connac_mcu_start_firmware(&dev->mt76, override, option);
2337 }
2338
__mt7996_load_ram(struct mt7996_dev * dev,const char * fw_type,const char * fw_file,enum mt7996_ram_type ram_type)2339 static int __mt7996_load_ram(struct mt7996_dev *dev, const char *fw_type,
2340 const char *fw_file, enum mt7996_ram_type ram_type)
2341 {
2342 const struct mt7996_fw_trailer *hdr;
2343 const struct firmware *fw;
2344 int ret;
2345
2346 ret = request_firmware(&fw, fw_file, dev->mt76.dev);
2347 if (ret)
2348 return ret;
2349
2350 if (!fw || !fw->data || fw->size < sizeof(*hdr)) {
2351 dev_err(dev->mt76.dev, "Invalid firmware\n");
2352 ret = -EINVAL;
2353 goto out;
2354 }
2355
2356 hdr = (const void *)(fw->data + fw->size - sizeof(*hdr));
2357 dev_info(dev->mt76.dev, "%s Firmware Version: %.10s, Build Time: %.15s\n",
2358 fw_type, hdr->fw_ver, hdr->build_date);
2359
2360 ret = mt7996_mcu_send_ram_firmware(dev, hdr, fw->data, ram_type);
2361 if (ret) {
2362 dev_err(dev->mt76.dev, "Failed to start %s firmware\n", fw_type);
2363 goto out;
2364 }
2365
2366 snprintf(dev->mt76.hw->wiphy->fw_version,
2367 sizeof(dev->mt76.hw->wiphy->fw_version),
2368 "%.10s-%.15s", hdr->fw_ver, hdr->build_date);
2369
2370 out:
2371 release_firmware(fw);
2372
2373 return ret;
2374 }
2375
mt7996_load_ram(struct mt7996_dev * dev)2376 static int mt7996_load_ram(struct mt7996_dev *dev)
2377 {
2378 int ret;
2379
2380 ret = __mt7996_load_ram(dev, "WM", MT7996_FIRMWARE_WM,
2381 MT7996_RAM_TYPE_WM);
2382 if (ret)
2383 return ret;
2384
2385 ret = __mt7996_load_ram(dev, "DSP", MT7996_FIRMWARE_DSP,
2386 MT7996_RAM_TYPE_DSP);
2387 if (ret)
2388 return ret;
2389
2390 return __mt7996_load_ram(dev, "WA", MT7996_FIRMWARE_WA,
2391 MT7996_RAM_TYPE_WA);
2392 }
2393
2394 static int
mt7996_firmware_state(struct mt7996_dev * dev,bool wa)2395 mt7996_firmware_state(struct mt7996_dev *dev, bool wa)
2396 {
2397 u32 state = FIELD_PREP(MT_TOP_MISC_FW_STATE,
2398 wa ? FW_STATE_RDY : FW_STATE_FW_DOWNLOAD);
2399
2400 if (!mt76_poll_msec(dev, MT_TOP_MISC, MT_TOP_MISC_FW_STATE,
2401 state, 1000)) {
2402 dev_err(dev->mt76.dev, "Timeout for initializing firmware\n");
2403 return -EIO;
2404 }
2405 return 0;
2406 }
2407
2408 static int
mt7996_mcu_restart(struct mt76_dev * dev)2409 mt7996_mcu_restart(struct mt76_dev *dev)
2410 {
2411 struct {
2412 u8 __rsv1[4];
2413
2414 __le16 tag;
2415 __le16 len;
2416 u8 power_mode;
2417 u8 __rsv2[3];
2418 } __packed req = {
2419 .tag = cpu_to_le16(UNI_POWER_OFF),
2420 .len = cpu_to_le16(sizeof(req) - 4),
2421 .power_mode = 1,
2422 };
2423
2424 return mt76_mcu_send_msg(dev, MCU_WM_UNI_CMD(POWER_CTRL), &req,
2425 sizeof(req), false);
2426 }
2427
mt7996_load_firmware(struct mt7996_dev * dev)2428 static int mt7996_load_firmware(struct mt7996_dev *dev)
2429 {
2430 int ret;
2431
2432 /* make sure fw is download state */
2433 if (mt7996_firmware_state(dev, false)) {
2434 /* restart firmware once */
2435 mt7996_mcu_restart(&dev->mt76);
2436 ret = mt7996_firmware_state(dev, false);
2437 if (ret) {
2438 dev_err(dev->mt76.dev,
2439 "Firmware is not ready for download\n");
2440 return ret;
2441 }
2442 }
2443
2444 ret = mt7996_load_patch(dev);
2445 if (ret)
2446 return ret;
2447
2448 ret = mt7996_load_ram(dev);
2449 if (ret)
2450 return ret;
2451
2452 ret = mt7996_firmware_state(dev, true);
2453 if (ret)
2454 return ret;
2455
2456 mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_FWDL], false);
2457
2458 dev_dbg(dev->mt76.dev, "Firmware init done\n");
2459
2460 return 0;
2461 }
2462
mt7996_mcu_fw_log_2_host(struct mt7996_dev * dev,u8 type,u8 ctrl)2463 int mt7996_mcu_fw_log_2_host(struct mt7996_dev *dev, u8 type, u8 ctrl)
2464 {
2465 struct {
2466 u8 _rsv[4];
2467
2468 __le16 tag;
2469 __le16 len;
2470 u8 ctrl;
2471 u8 interval;
2472 u8 _rsv2[2];
2473 } __packed data = {
2474 .tag = cpu_to_le16(UNI_WSYS_CONFIG_FW_LOG_CTRL),
2475 .len = cpu_to_le16(sizeof(data) - 4),
2476 .ctrl = ctrl,
2477 };
2478
2479 if (type == MCU_FW_LOG_WA)
2480 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_UNI_CMD(WSYS_CONFIG),
2481 &data, sizeof(data), true);
2482
2483 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(WSYS_CONFIG), &data,
2484 sizeof(data), true);
2485 }
2486
mt7996_mcu_fw_dbg_ctrl(struct mt7996_dev * dev,u32 module,u8 level)2487 int mt7996_mcu_fw_dbg_ctrl(struct mt7996_dev *dev, u32 module, u8 level)
2488 {
2489 struct {
2490 u8 _rsv[4];
2491
2492 __le16 tag;
2493 __le16 len;
2494 __le32 module_idx;
2495 u8 level;
2496 u8 _rsv2[3];
2497 } data = {
2498 .tag = cpu_to_le16(UNI_WSYS_CONFIG_FW_DBG_CTRL),
2499 .len = cpu_to_le16(sizeof(data) - 4),
2500 .module_idx = cpu_to_le32(module),
2501 .level = level,
2502 };
2503
2504 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(WSYS_CONFIG), &data,
2505 sizeof(data), false);
2506 }
2507
mt7996_mcu_set_mwds(struct mt7996_dev * dev,bool enabled)2508 static int mt7996_mcu_set_mwds(struct mt7996_dev *dev, bool enabled)
2509 {
2510 struct {
2511 u8 enable;
2512 u8 _rsv[3];
2513 } __packed req = {
2514 .enable = enabled
2515 };
2516
2517 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_EXT_CMD(MWDS_SUPPORT), &req,
2518 sizeof(req), false);
2519 }
2520
mt7996_add_rx_airtime_tlv(struct sk_buff * skb,u8 band_idx)2521 static void mt7996_add_rx_airtime_tlv(struct sk_buff *skb, u8 band_idx)
2522 {
2523 struct vow_rx_airtime *req;
2524 struct tlv *tlv;
2525
2526 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_VOW_RX_AT_AIRTIME_CLR_EN, sizeof(*req));
2527 req = (struct vow_rx_airtime *)tlv;
2528 req->enable = true;
2529 req->band = band_idx;
2530
2531 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_VOW_RX_AT_AIRTIME_EN, sizeof(*req));
2532 req = (struct vow_rx_airtime *)tlv;
2533 req->enable = true;
2534 req->band = band_idx;
2535 }
2536
2537 static int
mt7996_mcu_init_rx_airtime(struct mt7996_dev * dev)2538 mt7996_mcu_init_rx_airtime(struct mt7996_dev *dev)
2539 {
2540 struct uni_header hdr = {};
2541 struct sk_buff *skb;
2542 int len, num;
2543
2544 num = 2 + 2 * (dev->dbdc_support + dev->tbtc_support);
2545 len = sizeof(hdr) + num * sizeof(struct vow_rx_airtime);
2546 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len);
2547 if (!skb)
2548 return -ENOMEM;
2549
2550 skb_put_data(skb, &hdr, sizeof(hdr));
2551
2552 mt7996_add_rx_airtime_tlv(skb, dev->mt76.phy.band_idx);
2553
2554 if (dev->dbdc_support)
2555 mt7996_add_rx_airtime_tlv(skb, MT_BAND1);
2556
2557 if (dev->tbtc_support)
2558 mt7996_add_rx_airtime_tlv(skb, MT_BAND2);
2559
2560 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
2561 MCU_WM_UNI_CMD(VOW), true);
2562 }
2563
mt7996_mcu_init_firmware(struct mt7996_dev * dev)2564 int mt7996_mcu_init_firmware(struct mt7996_dev *dev)
2565 {
2566 int ret;
2567
2568 /* force firmware operation mode into normal state,
2569 * which should be set before firmware download stage.
2570 */
2571 mt76_wr(dev, MT_SWDEF_MODE, MT_SWDEF_NORMAL_MODE);
2572
2573 ret = mt7996_driver_own(dev, 0);
2574 if (ret)
2575 return ret;
2576 /* set driver own for band1 when two hif exist */
2577 if (dev->hif2) {
2578 ret = mt7996_driver_own(dev, 1);
2579 if (ret)
2580 return ret;
2581 }
2582
2583 ret = mt7996_load_firmware(dev);
2584 if (ret)
2585 return ret;
2586
2587 set_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state);
2588 ret = mt7996_mcu_fw_log_2_host(dev, MCU_FW_LOG_WM, 0);
2589 if (ret)
2590 return ret;
2591
2592 ret = mt7996_mcu_fw_log_2_host(dev, MCU_FW_LOG_WA, 0);
2593 if (ret)
2594 return ret;
2595
2596 ret = mt7996_mcu_set_mwds(dev, 1);
2597 if (ret)
2598 return ret;
2599
2600 ret = mt7996_mcu_init_rx_airtime(dev);
2601 if (ret)
2602 return ret;
2603
2604 return mt7996_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(SET),
2605 MCU_WA_PARAM_RED, 0, 0);
2606 }
2607
mt7996_mcu_init(struct mt7996_dev * dev)2608 int mt7996_mcu_init(struct mt7996_dev *dev)
2609 {
2610 static const struct mt76_mcu_ops mt7996_mcu_ops = {
2611 .headroom = sizeof(struct mt76_connac2_mcu_txd), /* reuse */
2612 .mcu_skb_send_msg = mt7996_mcu_send_message,
2613 .mcu_parse_response = mt7996_mcu_parse_response,
2614 };
2615
2616 dev->mt76.mcu_ops = &mt7996_mcu_ops;
2617
2618 return mt7996_mcu_init_firmware(dev);
2619 }
2620
mt7996_mcu_exit(struct mt7996_dev * dev)2621 void mt7996_mcu_exit(struct mt7996_dev *dev)
2622 {
2623 mt7996_mcu_restart(&dev->mt76);
2624 if (mt7996_firmware_state(dev, false)) {
2625 dev_err(dev->mt76.dev, "Failed to exit mcu\n");
2626 goto out;
2627 }
2628
2629 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(0), MT_TOP_LPCR_HOST_FW_OWN);
2630 if (dev->hif2)
2631 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(1),
2632 MT_TOP_LPCR_HOST_FW_OWN);
2633 out:
2634 skb_queue_purge(&dev->mt76.mcu.res_q);
2635 }
2636
mt7996_mcu_set_hdr_trans(struct mt7996_dev * dev,bool hdr_trans)2637 int mt7996_mcu_set_hdr_trans(struct mt7996_dev *dev, bool hdr_trans)
2638 {
2639 struct {
2640 u8 __rsv[4];
2641 } __packed hdr;
2642 struct hdr_trans_blacklist *req_blacklist;
2643 struct hdr_trans_en *req_en;
2644 struct sk_buff *skb;
2645 struct tlv *tlv;
2646 int len = MT7996_HDR_TRANS_MAX_SIZE + sizeof(hdr);
2647
2648 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len);
2649 if (!skb)
2650 return -ENOMEM;
2651
2652 skb_put_data(skb, &hdr, sizeof(hdr));
2653
2654 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_HDR_TRANS_EN, sizeof(*req_en));
2655 req_en = (struct hdr_trans_en *)tlv;
2656 req_en->enable = hdr_trans;
2657
2658 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_HDR_TRANS_VLAN,
2659 sizeof(struct hdr_trans_vlan));
2660
2661 if (hdr_trans) {
2662 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_HDR_TRANS_BLACKLIST,
2663 sizeof(*req_blacklist));
2664 req_blacklist = (struct hdr_trans_blacklist *)tlv;
2665 req_blacklist->enable = 1;
2666 req_blacklist->type = cpu_to_le16(ETH_P_PAE);
2667 }
2668
2669 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
2670 MCU_WM_UNI_CMD(RX_HDR_TRANS), true);
2671 }
2672
mt7996_mcu_set_tx(struct mt7996_dev * dev,struct ieee80211_vif * vif)2673 int mt7996_mcu_set_tx(struct mt7996_dev *dev, struct ieee80211_vif *vif)
2674 {
2675 #define MCU_EDCA_AC_PARAM 0
2676 #define WMM_AIFS_SET BIT(0)
2677 #define WMM_CW_MIN_SET BIT(1)
2678 #define WMM_CW_MAX_SET BIT(2)
2679 #define WMM_TXOP_SET BIT(3)
2680 #define WMM_PARAM_SET (WMM_AIFS_SET | WMM_CW_MIN_SET | \
2681 WMM_CW_MAX_SET | WMM_TXOP_SET)
2682 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
2683 struct {
2684 u8 bss_idx;
2685 u8 __rsv[3];
2686 } __packed hdr = {
2687 .bss_idx = mvif->mt76.idx,
2688 };
2689 struct sk_buff *skb;
2690 int len = sizeof(hdr) + IEEE80211_NUM_ACS * sizeof(struct edca);
2691 int ac;
2692
2693 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len);
2694 if (!skb)
2695 return -ENOMEM;
2696
2697 skb_put_data(skb, &hdr, sizeof(hdr));
2698
2699 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) {
2700 struct ieee80211_tx_queue_params *q = &mvif->queue_params[ac];
2701 struct edca *e;
2702 struct tlv *tlv;
2703
2704 tlv = mt7996_mcu_add_uni_tlv(skb, MCU_EDCA_AC_PARAM, sizeof(*e));
2705
2706 e = (struct edca *)tlv;
2707 e->set = WMM_PARAM_SET;
2708 e->queue = ac;
2709 e->aifs = q->aifs;
2710 e->txop = cpu_to_le16(q->txop);
2711
2712 if (q->cw_min)
2713 e->cw_min = fls(q->cw_min);
2714 else
2715 e->cw_min = 5;
2716
2717 if (q->cw_max)
2718 e->cw_max = fls(q->cw_max);
2719 else
2720 e->cw_max = 10;
2721 }
2722
2723 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
2724 MCU_WM_UNI_CMD(EDCA_UPDATE), true);
2725 }
2726
mt7996_mcu_set_fcc5_lpn(struct mt7996_dev * dev,int val)2727 int mt7996_mcu_set_fcc5_lpn(struct mt7996_dev *dev, int val)
2728 {
2729 struct {
2730 u8 _rsv[4];
2731
2732 __le16 tag;
2733 __le16 len;
2734
2735 __le32 ctrl;
2736 __le16 min_lpn;
2737 u8 rsv[2];
2738 } __packed req = {
2739 .tag = cpu_to_le16(UNI_RDD_CTRL_SET_TH),
2740 .len = cpu_to_le16(sizeof(req) - 4),
2741
2742 .ctrl = cpu_to_le32(0x1),
2743 .min_lpn = cpu_to_le16(val),
2744 };
2745
2746 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL),
2747 &req, sizeof(req), true);
2748 }
2749
mt7996_mcu_set_pulse_th(struct mt7996_dev * dev,const struct mt7996_dfs_pulse * pulse)2750 int mt7996_mcu_set_pulse_th(struct mt7996_dev *dev,
2751 const struct mt7996_dfs_pulse *pulse)
2752 {
2753 struct {
2754 u8 _rsv[4];
2755
2756 __le16 tag;
2757 __le16 len;
2758
2759 __le32 ctrl;
2760
2761 __le32 max_width; /* us */
2762 __le32 max_pwr; /* dbm */
2763 __le32 min_pwr; /* dbm */
2764 __le32 min_stgr_pri; /* us */
2765 __le32 max_stgr_pri; /* us */
2766 __le32 min_cr_pri; /* us */
2767 __le32 max_cr_pri; /* us */
2768 } __packed req = {
2769 .tag = cpu_to_le16(UNI_RDD_CTRL_SET_TH),
2770 .len = cpu_to_le16(sizeof(req) - 4),
2771
2772 .ctrl = cpu_to_le32(0x3),
2773
2774 #define __req_field(field) .field = cpu_to_le32(pulse->field)
2775 __req_field(max_width),
2776 __req_field(max_pwr),
2777 __req_field(min_pwr),
2778 __req_field(min_stgr_pri),
2779 __req_field(max_stgr_pri),
2780 __req_field(min_cr_pri),
2781 __req_field(max_cr_pri),
2782 #undef __req_field
2783 };
2784
2785 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL),
2786 &req, sizeof(req), true);
2787 }
2788
mt7996_mcu_set_radar_th(struct mt7996_dev * dev,int index,const struct mt7996_dfs_pattern * pattern)2789 int mt7996_mcu_set_radar_th(struct mt7996_dev *dev, int index,
2790 const struct mt7996_dfs_pattern *pattern)
2791 {
2792 struct {
2793 u8 _rsv[4];
2794
2795 __le16 tag;
2796 __le16 len;
2797
2798 __le32 ctrl;
2799 __le16 radar_type;
2800
2801 u8 enb;
2802 u8 stgr;
2803 u8 min_crpn;
2804 u8 max_crpn;
2805 u8 min_crpr;
2806 u8 min_pw;
2807 __le32 min_pri;
2808 __le32 max_pri;
2809 u8 max_pw;
2810 u8 min_crbn;
2811 u8 max_crbn;
2812 u8 min_stgpn;
2813 u8 max_stgpn;
2814 u8 min_stgpr;
2815 u8 rsv[2];
2816 __le32 min_stgpr_diff;
2817 } __packed req = {
2818 .tag = cpu_to_le16(UNI_RDD_CTRL_SET_TH),
2819 .len = cpu_to_le16(sizeof(req) - 4),
2820
2821 .ctrl = cpu_to_le32(0x2),
2822 .radar_type = cpu_to_le16(index),
2823
2824 #define __req_field_u8(field) .field = pattern->field
2825 #define __req_field_u32(field) .field = cpu_to_le32(pattern->field)
2826 __req_field_u8(enb),
2827 __req_field_u8(stgr),
2828 __req_field_u8(min_crpn),
2829 __req_field_u8(max_crpn),
2830 __req_field_u8(min_crpr),
2831 __req_field_u8(min_pw),
2832 __req_field_u32(min_pri),
2833 __req_field_u32(max_pri),
2834 __req_field_u8(max_pw),
2835 __req_field_u8(min_crbn),
2836 __req_field_u8(max_crbn),
2837 __req_field_u8(min_stgpn),
2838 __req_field_u8(max_stgpn),
2839 __req_field_u8(min_stgpr),
2840 __req_field_u32(min_stgpr_diff),
2841 #undef __req_field_u8
2842 #undef __req_field_u32
2843 };
2844
2845 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL),
2846 &req, sizeof(req), true);
2847 }
2848
2849 static int
mt7996_mcu_background_chain_ctrl(struct mt7996_phy * phy,struct cfg80211_chan_def * chandef,int cmd)2850 mt7996_mcu_background_chain_ctrl(struct mt7996_phy *phy,
2851 struct cfg80211_chan_def *chandef,
2852 int cmd)
2853 {
2854 struct mt7996_dev *dev = phy->dev;
2855 struct mt76_phy *mphy = phy->mt76;
2856 struct ieee80211_channel *chan = mphy->chandef.chan;
2857 int freq = mphy->chandef.center_freq1;
2858 struct mt7996_mcu_background_chain_ctrl req = {
2859 .tag = cpu_to_le16(0),
2860 .len = cpu_to_le16(sizeof(req) - 4),
2861 .monitor_scan_type = 2, /* simple rx */
2862 };
2863
2864 if (!chandef && cmd != CH_SWITCH_BACKGROUND_SCAN_STOP)
2865 return -EINVAL;
2866
2867 if (!cfg80211_chandef_valid(&mphy->chandef))
2868 return -EINVAL;
2869
2870 switch (cmd) {
2871 case CH_SWITCH_BACKGROUND_SCAN_START: {
2872 req.chan = chan->hw_value;
2873 req.central_chan = ieee80211_frequency_to_channel(freq);
2874 req.bw = mt76_connac_chan_bw(&mphy->chandef);
2875 req.monitor_chan = chandef->chan->hw_value;
2876 req.monitor_central_chan =
2877 ieee80211_frequency_to_channel(chandef->center_freq1);
2878 req.monitor_bw = mt76_connac_chan_bw(chandef);
2879 req.band_idx = phy->mt76->band_idx;
2880 req.scan_mode = 1;
2881 break;
2882 }
2883 case CH_SWITCH_BACKGROUND_SCAN_RUNNING:
2884 req.monitor_chan = chandef->chan->hw_value;
2885 req.monitor_central_chan =
2886 ieee80211_frequency_to_channel(chandef->center_freq1);
2887 req.band_idx = phy->mt76->band_idx;
2888 req.scan_mode = 2;
2889 break;
2890 case CH_SWITCH_BACKGROUND_SCAN_STOP:
2891 req.chan = chan->hw_value;
2892 req.central_chan = ieee80211_frequency_to_channel(freq);
2893 req.bw = mt76_connac_chan_bw(&mphy->chandef);
2894 req.tx_stream = hweight8(mphy->antenna_mask);
2895 req.rx_stream = mphy->antenna_mask;
2896 break;
2897 default:
2898 return -EINVAL;
2899 }
2900 req.band = chandef ? chandef->chan->band == NL80211_BAND_5GHZ : 1;
2901
2902 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(OFFCH_SCAN_CTRL),
2903 &req, sizeof(req), false);
2904 }
2905
mt7996_mcu_rdd_background_enable(struct mt7996_phy * phy,struct cfg80211_chan_def * chandef)2906 int mt7996_mcu_rdd_background_enable(struct mt7996_phy *phy,
2907 struct cfg80211_chan_def *chandef)
2908 {
2909 struct mt7996_dev *dev = phy->dev;
2910 int err, region;
2911
2912 if (!chandef) { /* disable offchain */
2913 err = mt7996_mcu_rdd_cmd(dev, RDD_STOP, MT_RX_SEL2,
2914 0, 0);
2915 if (err)
2916 return err;
2917
2918 return mt7996_mcu_background_chain_ctrl(phy, NULL,
2919 CH_SWITCH_BACKGROUND_SCAN_STOP);
2920 }
2921
2922 err = mt7996_mcu_background_chain_ctrl(phy, chandef,
2923 CH_SWITCH_BACKGROUND_SCAN_START);
2924 if (err)
2925 return err;
2926
2927 switch (dev->mt76.region) {
2928 case NL80211_DFS_ETSI:
2929 region = 0;
2930 break;
2931 case NL80211_DFS_JP:
2932 region = 2;
2933 break;
2934 case NL80211_DFS_FCC:
2935 default:
2936 region = 1;
2937 break;
2938 }
2939
2940 return mt7996_mcu_rdd_cmd(dev, RDD_START, MT_RX_SEL2,
2941 0, region);
2942 }
2943
mt7996_mcu_set_chan_info(struct mt7996_phy * phy,u16 tag)2944 int mt7996_mcu_set_chan_info(struct mt7996_phy *phy, u16 tag)
2945 {
2946 static const u8 ch_band[] = {
2947 [NL80211_BAND_2GHZ] = 0,
2948 [NL80211_BAND_5GHZ] = 1,
2949 [NL80211_BAND_6GHZ] = 2,
2950 };
2951 struct mt7996_dev *dev = phy->dev;
2952 struct cfg80211_chan_def *chandef = &phy->mt76->chandef;
2953 int freq1 = chandef->center_freq1;
2954 u8 band_idx = phy->mt76->band_idx;
2955 struct {
2956 /* fixed field */
2957 u8 __rsv[4];
2958
2959 __le16 tag;
2960 __le16 len;
2961 u8 control_ch;
2962 u8 center_ch;
2963 u8 bw;
2964 u8 tx_path_num;
2965 u8 rx_path; /* mask or num */
2966 u8 switch_reason;
2967 u8 band_idx;
2968 u8 center_ch2; /* for 80+80 only */
2969 __le16 cac_case;
2970 u8 channel_band;
2971 u8 rsv0;
2972 __le32 outband_freq;
2973 u8 txpower_drop;
2974 u8 ap_bw;
2975 u8 ap_center_ch;
2976 u8 rsv1[53];
2977 } __packed req = {
2978 .tag = cpu_to_le16(tag),
2979 .len = cpu_to_le16(sizeof(req) - 4),
2980 .control_ch = chandef->chan->hw_value,
2981 .center_ch = ieee80211_frequency_to_channel(freq1),
2982 .bw = mt76_connac_chan_bw(chandef),
2983 .tx_path_num = hweight16(phy->mt76->chainmask),
2984 .rx_path = phy->mt76->chainmask >> dev->chainshift[band_idx],
2985 .band_idx = band_idx,
2986 .channel_band = ch_band[chandef->chan->band],
2987 };
2988
2989 if (phy->mt76->hw->conf.flags & IEEE80211_CONF_MONITOR)
2990 req.switch_reason = CH_SWITCH_NORMAL;
2991 else if (phy->mt76->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL ||
2992 phy->mt76->hw->conf.flags & IEEE80211_CONF_IDLE)
2993 req.switch_reason = CH_SWITCH_SCAN_BYPASS_DPD;
2994 else if (!cfg80211_reg_can_beacon(phy->mt76->hw->wiphy, chandef,
2995 NL80211_IFTYPE_AP))
2996 req.switch_reason = CH_SWITCH_DFS;
2997 else
2998 req.switch_reason = CH_SWITCH_NORMAL;
2999
3000 if (tag == UNI_CHANNEL_SWITCH)
3001 req.rx_path = hweight8(req.rx_path);
3002
3003 if (chandef->width == NL80211_CHAN_WIDTH_80P80) {
3004 int freq2 = chandef->center_freq2;
3005
3006 req.center_ch2 = ieee80211_frequency_to_channel(freq2);
3007 }
3008
3009 return mt76_mcu_send_msg(&dev->mt76, MCU_WMWA_UNI_CMD(CHANNEL_SWITCH),
3010 &req, sizeof(req), true);
3011 }
3012
mt7996_mcu_set_eeprom_flash(struct mt7996_dev * dev)3013 static int mt7996_mcu_set_eeprom_flash(struct mt7996_dev *dev)
3014 {
3015 #define MAX_PAGE_IDX_MASK GENMASK(7, 5)
3016 #define PAGE_IDX_MASK GENMASK(4, 2)
3017 #define PER_PAGE_SIZE 0x400
3018 struct mt7996_mcu_eeprom req = {
3019 .tag = cpu_to_le16(UNI_EFUSE_BUFFER_MODE),
3020 .buffer_mode = EE_MODE_BUFFER
3021 };
3022 u16 eeprom_size = MT7996_EEPROM_SIZE;
3023 u8 total = DIV_ROUND_UP(eeprom_size, PER_PAGE_SIZE);
3024 u8 *eep = (u8 *)dev->mt76.eeprom.data;
3025 int eep_len, i;
3026
3027 for (i = 0; i < total; i++, eep += eep_len) {
3028 struct sk_buff *skb;
3029 int ret, msg_len;
3030
3031 if (i == total - 1 && !!(eeprom_size % PER_PAGE_SIZE))
3032 eep_len = eeprom_size % PER_PAGE_SIZE;
3033 else
3034 eep_len = PER_PAGE_SIZE;
3035
3036 msg_len = sizeof(req) + eep_len;
3037 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, msg_len);
3038 if (!skb)
3039 return -ENOMEM;
3040
3041 req.len = cpu_to_le16(msg_len - 4);
3042 req.format = FIELD_PREP(MAX_PAGE_IDX_MASK, total - 1) |
3043 FIELD_PREP(PAGE_IDX_MASK, i) | EE_FORMAT_WHOLE;
3044 req.buf_len = cpu_to_le16(eep_len);
3045
3046 skb_put_data(skb, &req, sizeof(req));
3047 skb_put_data(skb, eep, eep_len);
3048
3049 ret = mt76_mcu_skb_send_msg(&dev->mt76, skb,
3050 MCU_WM_UNI_CMD(EFUSE_CTRL), true);
3051 if (ret)
3052 return ret;
3053 }
3054
3055 return 0;
3056 }
3057
mt7996_mcu_set_eeprom(struct mt7996_dev * dev)3058 int mt7996_mcu_set_eeprom(struct mt7996_dev *dev)
3059 {
3060 struct mt7996_mcu_eeprom req = {
3061 .tag = cpu_to_le16(UNI_EFUSE_BUFFER_MODE),
3062 .len = cpu_to_le16(sizeof(req) - 4),
3063 .buffer_mode = EE_MODE_EFUSE,
3064 .format = EE_FORMAT_WHOLE
3065 };
3066
3067 if (dev->flash_mode)
3068 return mt7996_mcu_set_eeprom_flash(dev);
3069
3070 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(EFUSE_CTRL),
3071 &req, sizeof(req), true);
3072 }
3073
mt7996_mcu_get_eeprom(struct mt7996_dev * dev,u32 offset)3074 int mt7996_mcu_get_eeprom(struct mt7996_dev *dev, u32 offset)
3075 {
3076 struct {
3077 u8 _rsv[4];
3078
3079 __le16 tag;
3080 __le16 len;
3081 __le32 addr;
3082 __le32 valid;
3083 u8 data[16];
3084 } __packed req = {
3085 .tag = cpu_to_le16(UNI_EFUSE_ACCESS),
3086 .len = cpu_to_le16(sizeof(req) - 4),
3087 .addr = cpu_to_le32(round_down(offset,
3088 MT7996_EEPROM_BLOCK_SIZE)),
3089 };
3090 struct sk_buff *skb;
3091 bool valid;
3092 int ret;
3093
3094 ret = mt76_mcu_send_and_get_msg(&dev->mt76,
3095 MCU_WM_UNI_CMD_QUERY(EFUSE_CTRL),
3096 &req, sizeof(req), true, &skb);
3097 if (ret)
3098 return ret;
3099
3100 valid = le32_to_cpu(*(__le32 *)(skb->data + 16));
3101 if (valid) {
3102 u32 addr = le32_to_cpu(*(__le32 *)(skb->data + 12));
3103 u8 *buf = (u8 *)dev->mt76.eeprom.data + addr;
3104
3105 skb_pull(skb, 48);
3106 memcpy(buf, skb->data, MT7996_EEPROM_BLOCK_SIZE);
3107 }
3108
3109 dev_kfree_skb(skb);
3110
3111 return 0;
3112 }
3113
mt7996_mcu_get_eeprom_free_block(struct mt7996_dev * dev,u8 * block_num)3114 int mt7996_mcu_get_eeprom_free_block(struct mt7996_dev *dev, u8 *block_num)
3115 {
3116 struct {
3117 u8 _rsv[4];
3118
3119 __le16 tag;
3120 __le16 len;
3121 u8 num;
3122 u8 version;
3123 u8 die_idx;
3124 u8 _rsv2;
3125 } __packed req = {
3126 .tag = cpu_to_le16(UNI_EFUSE_FREE_BLOCK),
3127 .len = cpu_to_le16(sizeof(req) - 4),
3128 .version = 2,
3129 };
3130 struct sk_buff *skb;
3131 int ret;
3132
3133 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_WM_UNI_CMD_QUERY(EFUSE_CTRL), &req,
3134 sizeof(req), true, &skb);
3135 if (ret)
3136 return ret;
3137
3138 *block_num = *(u8 *)(skb->data + 8);
3139 dev_kfree_skb(skb);
3140
3141 return 0;
3142 }
3143
mt7996_mcu_get_chip_config(struct mt7996_dev * dev,u32 * cap)3144 int mt7996_mcu_get_chip_config(struct mt7996_dev *dev, u32 *cap)
3145 {
3146 #define NIC_CAP 3
3147 #define UNI_EVENT_CHIP_CONFIG_EFUSE_VERSION 0x21
3148 struct {
3149 u8 _rsv[4];
3150
3151 __le16 tag;
3152 __le16 len;
3153 } __packed req = {
3154 .tag = cpu_to_le16(NIC_CAP),
3155 .len = cpu_to_le16(sizeof(req) - 4),
3156 };
3157 struct sk_buff *skb;
3158 u8 *buf;
3159 int ret;
3160
3161 ret = mt76_mcu_send_and_get_msg(&dev->mt76,
3162 MCU_WM_UNI_CMD_QUERY(CHIP_CONFIG), &req,
3163 sizeof(req), true, &skb);
3164 if (ret)
3165 return ret;
3166
3167 /* fixed field */
3168 skb_pull(skb, 4);
3169
3170 buf = skb->data;
3171 while (buf - skb->data < skb->len) {
3172 struct tlv *tlv = (struct tlv *)buf;
3173
3174 switch (le16_to_cpu(tlv->tag)) {
3175 case UNI_EVENT_CHIP_CONFIG_EFUSE_VERSION:
3176 *cap = le32_to_cpu(*(__le32 *)(buf + sizeof(*tlv)));
3177 break;
3178 default:
3179 break;
3180 }
3181
3182 buf += le16_to_cpu(tlv->len);
3183 }
3184
3185 dev_kfree_skb(skb);
3186
3187 return 0;
3188 }
3189
mt7996_mcu_get_chan_mib_info(struct mt7996_phy * phy,bool chan_switch)3190 int mt7996_mcu_get_chan_mib_info(struct mt7996_phy *phy, bool chan_switch)
3191 {
3192 struct {
3193 struct {
3194 u8 band;
3195 u8 __rsv[3];
3196 } hdr;
3197 struct {
3198 __le16 tag;
3199 __le16 len;
3200 __le32 offs;
3201 } data[4];
3202 } __packed req = {
3203 .hdr.band = phy->mt76->band_idx,
3204 };
3205 /* strict order */
3206 static const u32 offs[] = {
3207 UNI_MIB_TX_TIME,
3208 UNI_MIB_RX_TIME,
3209 UNI_MIB_OBSS_AIRTIME,
3210 UNI_MIB_NON_WIFI_TIME,
3211 };
3212 struct mt76_channel_state *state = phy->mt76->chan_state;
3213 struct mt76_channel_state *state_ts = &phy->state_ts;
3214 struct mt7996_dev *dev = phy->dev;
3215 struct mt7996_mcu_mib *res;
3216 struct sk_buff *skb;
3217 int i, ret;
3218
3219 for (i = 0; i < 4; i++) {
3220 req.data[i].tag = cpu_to_le16(UNI_CMD_MIB_DATA);
3221 req.data[i].len = cpu_to_le16(sizeof(req.data[i]));
3222 req.data[i].offs = cpu_to_le32(offs[i]);
3223 }
3224
3225 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_WM_UNI_CMD_QUERY(GET_MIB_INFO),
3226 &req, sizeof(req), true, &skb);
3227 if (ret)
3228 return ret;
3229
3230 skb_pull(skb, sizeof(req.hdr));
3231
3232 res = (struct mt7996_mcu_mib *)(skb->data);
3233
3234 if (chan_switch)
3235 goto out;
3236
3237 #define __res_u64(s) le64_to_cpu(res[s].data)
3238 state->cc_tx += __res_u64(1) - state_ts->cc_tx;
3239 state->cc_bss_rx += __res_u64(2) - state_ts->cc_bss_rx;
3240 state->cc_rx += __res_u64(2) + __res_u64(3) - state_ts->cc_rx;
3241 state->cc_busy += __res_u64(0) + __res_u64(1) + __res_u64(2) + __res_u64(3) -
3242 state_ts->cc_busy;
3243
3244 out:
3245 state_ts->cc_tx = __res_u64(1);
3246 state_ts->cc_bss_rx = __res_u64(2);
3247 state_ts->cc_rx = __res_u64(2) + __res_u64(3);
3248 state_ts->cc_busy = __res_u64(0) + __res_u64(1) + __res_u64(2) + __res_u64(3);
3249 #undef __res_u64
3250
3251 dev_kfree_skb(skb);
3252
3253 return 0;
3254 }
3255
mt7996_mcu_set_ser(struct mt7996_dev * dev,u8 action,u8 val,u8 band)3256 int mt7996_mcu_set_ser(struct mt7996_dev *dev, u8 action, u8 val, u8 band)
3257 {
3258 struct {
3259 u8 rsv[4];
3260
3261 __le16 tag;
3262 __le16 len;
3263
3264 union {
3265 struct {
3266 __le32 mask;
3267 } __packed set;
3268
3269 struct {
3270 u8 method;
3271 u8 band;
3272 u8 rsv2[2];
3273 } __packed trigger;
3274 };
3275 } __packed req = {
3276 .tag = cpu_to_le16(action),
3277 .len = cpu_to_le16(sizeof(req) - 4),
3278 };
3279
3280 switch (action) {
3281 case UNI_CMD_SER_SET:
3282 req.set.mask = cpu_to_le32(val);
3283 break;
3284 case UNI_CMD_SER_TRIGGER:
3285 req.trigger.method = val;
3286 req.trigger.band = band;
3287 break;
3288 default:
3289 return -EINVAL;
3290 }
3291
3292 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SER),
3293 &req, sizeof(req), false);
3294 }
3295
mt7996_mcu_set_txbf(struct mt7996_dev * dev,u8 action)3296 int mt7996_mcu_set_txbf(struct mt7996_dev *dev, u8 action)
3297 {
3298 #define MT7996_BF_MAX_SIZE sizeof(union bf_tag_tlv)
3299 #define BF_PROCESSING 4
3300 struct uni_header hdr;
3301 struct sk_buff *skb;
3302 struct tlv *tlv;
3303 int len = sizeof(hdr) + MT7996_BF_MAX_SIZE;
3304
3305 memset(&hdr, 0, sizeof(hdr));
3306
3307 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len);
3308 if (!skb)
3309 return -ENOMEM;
3310
3311 skb_put_data(skb, &hdr, sizeof(hdr));
3312
3313 switch (action) {
3314 case BF_SOUNDING_ON: {
3315 struct bf_sounding_on *req_snd_on;
3316
3317 tlv = mt7996_mcu_add_uni_tlv(skb, action, sizeof(*req_snd_on));
3318 req_snd_on = (struct bf_sounding_on *)tlv;
3319 req_snd_on->snd_mode = BF_PROCESSING;
3320 break;
3321 }
3322 case BF_HW_EN_UPDATE: {
3323 struct bf_hw_en_status_update *req_hw_en;
3324
3325 tlv = mt7996_mcu_add_uni_tlv(skb, action, sizeof(*req_hw_en));
3326 req_hw_en = (struct bf_hw_en_status_update *)tlv;
3327 req_hw_en->ebf = true;
3328 req_hw_en->ibf = dev->ibf;
3329 break;
3330 }
3331 case BF_MOD_EN_CTRL: {
3332 struct bf_mod_en_ctrl *req_mod_en;
3333
3334 tlv = mt7996_mcu_add_uni_tlv(skb, action, sizeof(*req_mod_en));
3335 req_mod_en = (struct bf_mod_en_ctrl *)tlv;
3336 req_mod_en->bf_num = 3;
3337 req_mod_en->bf_bitmap = GENMASK(2, 0);
3338 break;
3339 }
3340 default:
3341 return -EINVAL;
3342 }
3343
3344 return mt76_mcu_skb_send_msg(&dev->mt76, skb, MCU_WM_UNI_CMD(BF), true);
3345 }
3346
3347 static int
mt7996_mcu_enable_obss_spr(struct mt7996_phy * phy,u16 action,u8 val)3348 mt7996_mcu_enable_obss_spr(struct mt7996_phy *phy, u16 action, u8 val)
3349 {
3350 struct mt7996_dev *dev = phy->dev;
3351 struct {
3352 u8 band_idx;
3353 u8 __rsv[3];
3354
3355 __le16 tag;
3356 __le16 len;
3357
3358 __le32 val;
3359 } __packed req = {
3360 .band_idx = phy->mt76->band_idx,
3361 .tag = cpu_to_le16(action),
3362 .len = cpu_to_le16(sizeof(req) - 4),
3363 .val = cpu_to_le32(val),
3364 };
3365
3366 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR),
3367 &req, sizeof(req), true);
3368 }
3369
3370 static int
mt7996_mcu_set_obss_spr_pd(struct mt7996_phy * phy,struct ieee80211_he_obss_pd * he_obss_pd)3371 mt7996_mcu_set_obss_spr_pd(struct mt7996_phy *phy,
3372 struct ieee80211_he_obss_pd *he_obss_pd)
3373 {
3374 struct mt7996_dev *dev = phy->dev;
3375 u8 max_th = 82, non_srg_max_th = 62;
3376 struct {
3377 u8 band_idx;
3378 u8 __rsv[3];
3379
3380 __le16 tag;
3381 __le16 len;
3382
3383 u8 pd_th_non_srg;
3384 u8 pd_th_srg;
3385 u8 period_offs;
3386 u8 rcpi_src;
3387 __le16 obss_pd_min;
3388 __le16 obss_pd_min_srg;
3389 u8 resp_txpwr_mode;
3390 u8 txpwr_restrict_mode;
3391 u8 txpwr_ref;
3392 u8 __rsv2[3];
3393 } __packed req = {
3394 .band_idx = phy->mt76->band_idx,
3395 .tag = cpu_to_le16(UNI_CMD_SR_SET_PARAM),
3396 .len = cpu_to_le16(sizeof(req) - 4),
3397 .obss_pd_min = cpu_to_le16(max_th),
3398 .obss_pd_min_srg = cpu_to_le16(max_th),
3399 .txpwr_restrict_mode = 2,
3400 .txpwr_ref = 21
3401 };
3402 int ret;
3403
3404 /* disable firmware dynamical PD asjustment */
3405 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_DPD, false);
3406 if (ret)
3407 return ret;
3408
3409 if (he_obss_pd->sr_ctrl &
3410 IEEE80211_HE_SPR_NON_SRG_OBSS_PD_SR_DISALLOWED)
3411 req.pd_th_non_srg = max_th;
3412 else if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_NON_SRG_OFFSET_PRESENT)
3413 req.pd_th_non_srg = max_th - he_obss_pd->non_srg_max_offset;
3414 else
3415 req.pd_th_non_srg = non_srg_max_th;
3416
3417 if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_SRG_INFORMATION_PRESENT)
3418 req.pd_th_srg = max_th - he_obss_pd->max_offset;
3419
3420 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR),
3421 &req, sizeof(req), true);
3422 }
3423
3424 static int
mt7996_mcu_set_obss_spr_siga(struct mt7996_phy * phy,struct ieee80211_vif * vif,struct ieee80211_he_obss_pd * he_obss_pd)3425 mt7996_mcu_set_obss_spr_siga(struct mt7996_phy *phy, struct ieee80211_vif *vif,
3426 struct ieee80211_he_obss_pd *he_obss_pd)
3427 {
3428 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
3429 struct mt7996_dev *dev = phy->dev;
3430 u8 omac = mvif->mt76.omac_idx;
3431 struct {
3432 u8 band_idx;
3433 u8 __rsv[3];
3434
3435 __le16 tag;
3436 __le16 len;
3437
3438 u8 omac;
3439 u8 __rsv2[3];
3440 u8 flag[20];
3441 } __packed req = {
3442 .band_idx = phy->mt76->band_idx,
3443 .tag = cpu_to_le16(UNI_CMD_SR_SET_SIGA),
3444 .len = cpu_to_le16(sizeof(req) - 4),
3445 .omac = omac > HW_BSSID_MAX ? omac - 12 : omac,
3446 };
3447 int ret;
3448
3449 if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_HESIGA_SR_VAL15_ALLOWED)
3450 req.flag[req.omac] = 0xf;
3451 else
3452 return 0;
3453
3454 /* switch to normal AP mode */
3455 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_MODE, 0);
3456 if (ret)
3457 return ret;
3458
3459 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR),
3460 &req, sizeof(req), true);
3461 }
3462
3463 static int
mt7996_mcu_set_obss_spr_bitmap(struct mt7996_phy * phy,struct ieee80211_he_obss_pd * he_obss_pd)3464 mt7996_mcu_set_obss_spr_bitmap(struct mt7996_phy *phy,
3465 struct ieee80211_he_obss_pd *he_obss_pd)
3466 {
3467 struct mt7996_dev *dev = phy->dev;
3468 struct {
3469 u8 band_idx;
3470 u8 __rsv[3];
3471
3472 __le16 tag;
3473 __le16 len;
3474
3475 __le32 color_l[2];
3476 __le32 color_h[2];
3477 __le32 bssid_l[2];
3478 __le32 bssid_h[2];
3479 } __packed req = {
3480 .band_idx = phy->mt76->band_idx,
3481 .tag = cpu_to_le16(UNI_CMD_SR_SET_SRG_BITMAP),
3482 .len = cpu_to_le16(sizeof(req) - 4),
3483 };
3484 u32 bitmap;
3485
3486 memcpy(&bitmap, he_obss_pd->bss_color_bitmap, sizeof(bitmap));
3487 req.color_l[req.band_idx] = cpu_to_le32(bitmap);
3488
3489 memcpy(&bitmap, he_obss_pd->bss_color_bitmap + 4, sizeof(bitmap));
3490 req.color_h[req.band_idx] = cpu_to_le32(bitmap);
3491
3492 memcpy(&bitmap, he_obss_pd->partial_bssid_bitmap, sizeof(bitmap));
3493 req.bssid_l[req.band_idx] = cpu_to_le32(bitmap);
3494
3495 memcpy(&bitmap, he_obss_pd->partial_bssid_bitmap + 4, sizeof(bitmap));
3496 req.bssid_h[req.band_idx] = cpu_to_le32(bitmap);
3497
3498 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR), &req,
3499 sizeof(req), true);
3500 }
3501
mt7996_mcu_add_obss_spr(struct mt7996_phy * phy,struct ieee80211_vif * vif,struct ieee80211_he_obss_pd * he_obss_pd)3502 int mt7996_mcu_add_obss_spr(struct mt7996_phy *phy, struct ieee80211_vif *vif,
3503 struct ieee80211_he_obss_pd *he_obss_pd)
3504 {
3505 int ret;
3506
3507 /* enable firmware scene detection algorithms */
3508 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_SD,
3509 sr_scene_detect);
3510 if (ret)
3511 return ret;
3512
3513 /* firmware dynamically adjusts PD threshold so skip manual control */
3514 if (sr_scene_detect && !he_obss_pd->enable)
3515 return 0;
3516
3517 /* enable spatial reuse */
3518 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE,
3519 he_obss_pd->enable);
3520 if (ret)
3521 return ret;
3522
3523 if (sr_scene_detect || !he_obss_pd->enable)
3524 return 0;
3525
3526 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_TX, true);
3527 if (ret)
3528 return ret;
3529
3530 /* set SRG/non-SRG OBSS PD threshold */
3531 ret = mt7996_mcu_set_obss_spr_pd(phy, he_obss_pd);
3532 if (ret)
3533 return ret;
3534
3535 /* Set SR prohibit */
3536 ret = mt7996_mcu_set_obss_spr_siga(phy, vif, he_obss_pd);
3537 if (ret)
3538 return ret;
3539
3540 /* set SRG BSS color/BSSID bitmap */
3541 return mt7996_mcu_set_obss_spr_bitmap(phy, he_obss_pd);
3542 }
3543
mt7996_mcu_update_bss_color(struct mt7996_dev * dev,struct ieee80211_vif * vif,struct cfg80211_he_bss_color * he_bss_color)3544 int mt7996_mcu_update_bss_color(struct mt7996_dev *dev, struct ieee80211_vif *vif,
3545 struct cfg80211_he_bss_color *he_bss_color)
3546 {
3547 int len = sizeof(struct bss_req_hdr) + sizeof(struct bss_color_tlv);
3548 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
3549 struct bss_color_tlv *bss_color;
3550 struct sk_buff *skb;
3551 struct tlv *tlv;
3552
3553 skb = __mt7996_mcu_alloc_bss_req(&dev->mt76, &mvif->mt76, len);
3554 if (IS_ERR(skb))
3555 return PTR_ERR(skb);
3556
3557 tlv = mt76_connac_mcu_add_tlv(skb, UNI_BSS_INFO_BSS_COLOR,
3558 sizeof(*bss_color));
3559 bss_color = (struct bss_color_tlv *)tlv;
3560 bss_color->enable = he_bss_color->enabled;
3561 bss_color->color = he_bss_color->color;
3562
3563 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
3564 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true);
3565 }
3566
3567 #define TWT_AGRT_TRIGGER BIT(0)
3568 #define TWT_AGRT_ANNOUNCE BIT(1)
3569 #define TWT_AGRT_PROTECT BIT(2)
3570
mt7996_mcu_twt_agrt_update(struct mt7996_dev * dev,struct mt7996_vif * mvif,struct mt7996_twt_flow * flow,int cmd)3571 int mt7996_mcu_twt_agrt_update(struct mt7996_dev *dev,
3572 struct mt7996_vif *mvif,
3573 struct mt7996_twt_flow *flow,
3574 int cmd)
3575 {
3576 struct {
3577 /* fixed field */
3578 u8 bss;
3579 u8 _rsv[3];
3580
3581 __le16 tag;
3582 __le16 len;
3583 u8 tbl_idx;
3584 u8 cmd;
3585 u8 own_mac_idx;
3586 u8 flowid; /* 0xff for group id */
3587 __le16 peer_id; /* specify the peer_id (msb=0)
3588 * or group_id (msb=1)
3589 */
3590 u8 duration; /* 256 us */
3591 u8 bss_idx;
3592 __le64 start_tsf;
3593 __le16 mantissa;
3594 u8 exponent;
3595 u8 is_ap;
3596 u8 agrt_params;
3597 u8 __rsv2[23];
3598 } __packed req = {
3599 .tag = cpu_to_le16(UNI_CMD_TWT_ARGT_UPDATE),
3600 .len = cpu_to_le16(sizeof(req) - 4),
3601 .tbl_idx = flow->table_id,
3602 .cmd = cmd,
3603 .own_mac_idx = mvif->mt76.omac_idx,
3604 .flowid = flow->id,
3605 .peer_id = cpu_to_le16(flow->wcid),
3606 .duration = flow->duration,
3607 .bss = mvif->mt76.idx,
3608 .bss_idx = mvif->mt76.idx,
3609 .start_tsf = cpu_to_le64(flow->tsf),
3610 .mantissa = flow->mantissa,
3611 .exponent = flow->exp,
3612 .is_ap = true,
3613 };
3614
3615 if (flow->protection)
3616 req.agrt_params |= TWT_AGRT_PROTECT;
3617 if (!flow->flowtype)
3618 req.agrt_params |= TWT_AGRT_ANNOUNCE;
3619 if (flow->trigger)
3620 req.agrt_params |= TWT_AGRT_TRIGGER;
3621
3622 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(TWT),
3623 &req, sizeof(req), true);
3624 }
3625
mt7996_mcu_set_rts_thresh(struct mt7996_phy * phy,u32 val)3626 int mt7996_mcu_set_rts_thresh(struct mt7996_phy *phy, u32 val)
3627 {
3628 struct {
3629 u8 band_idx;
3630 u8 _rsv[3];
3631
3632 __le16 tag;
3633 __le16 len;
3634 __le32 len_thresh;
3635 __le32 pkt_thresh;
3636 } __packed req = {
3637 .band_idx = phy->mt76->band_idx,
3638 .tag = cpu_to_le16(UNI_BAND_CONFIG_RTS_THRESHOLD),
3639 .len = cpu_to_le16(sizeof(req) - 4),
3640 .len_thresh = cpu_to_le32(val),
3641 .pkt_thresh = cpu_to_le32(0x2),
3642 };
3643
3644 return mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(BAND_CONFIG),
3645 &req, sizeof(req), true);
3646 }
3647
mt7996_mcu_set_radio_en(struct mt7996_phy * phy,bool enable)3648 int mt7996_mcu_set_radio_en(struct mt7996_phy *phy, bool enable)
3649 {
3650 struct {
3651 u8 band_idx;
3652 u8 _rsv[3];
3653
3654 __le16 tag;
3655 __le16 len;
3656 u8 enable;
3657 u8 _rsv2[3];
3658 } __packed req = {
3659 .band_idx = phy->mt76->band_idx,
3660 .tag = cpu_to_le16(UNI_BAND_CONFIG_RADIO_ENABLE),
3661 .len = cpu_to_le16(sizeof(req) - 4),
3662 .enable = enable,
3663 };
3664
3665 return mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(BAND_CONFIG),
3666 &req, sizeof(req), true);
3667 }
3668
mt7996_mcu_rdd_cmd(struct mt7996_dev * dev,int cmd,u8 index,u8 rx_sel,u8 val)3669 int mt7996_mcu_rdd_cmd(struct mt7996_dev *dev, int cmd, u8 index,
3670 u8 rx_sel, u8 val)
3671 {
3672 struct {
3673 u8 _rsv[4];
3674
3675 __le16 tag;
3676 __le16 len;
3677
3678 u8 ctrl;
3679 u8 rdd_idx;
3680 u8 rdd_rx_sel;
3681 u8 val;
3682 u8 rsv[4];
3683 } __packed req = {
3684 .tag = cpu_to_le16(UNI_RDD_CTRL_PARM),
3685 .len = cpu_to_le16(sizeof(req) - 4),
3686 .ctrl = cmd,
3687 .rdd_idx = index,
3688 .rdd_rx_sel = rx_sel,
3689 .val = val,
3690 };
3691
3692 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL),
3693 &req, sizeof(req), true);
3694 }
3695
mt7996_mcu_wtbl_update_hdr_trans(struct mt7996_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta)3696 int mt7996_mcu_wtbl_update_hdr_trans(struct mt7996_dev *dev,
3697 struct ieee80211_vif *vif,
3698 struct ieee80211_sta *sta)
3699 {
3700 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv;
3701 struct mt7996_sta *msta;
3702 struct sk_buff *skb;
3703
3704 msta = sta ? (struct mt7996_sta *)sta->drv_priv : &mvif->sta;
3705
3706 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,
3707 &msta->wcid,
3708 MT7996_STA_UPDATE_MAX_SIZE);
3709 if (IS_ERR(skb))
3710 return PTR_ERR(skb);
3711
3712 /* starec hdr trans */
3713 mt7996_mcu_sta_hdr_trans_tlv(dev, skb, vif, sta);
3714 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
3715 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true);
3716 }
3717
mt7996_mcu_rf_regval(struct mt7996_dev * dev,u32 regidx,u32 * val,bool set)3718 int mt7996_mcu_rf_regval(struct mt7996_dev *dev, u32 regidx, u32 *val, bool set)
3719 {
3720 struct {
3721 u8 __rsv1[4];
3722
3723 __le16 tag;
3724 __le16 len;
3725 __le16 idx;
3726 u8 __rsv2[2];
3727 __le32 ofs;
3728 __le32 data;
3729 } __packed *res, req = {
3730 .tag = cpu_to_le16(UNI_CMD_ACCESS_RF_REG_BASIC),
3731 .len = cpu_to_le16(sizeof(req) - 4),
3732
3733 .idx = cpu_to_le16(u32_get_bits(regidx, GENMASK(31, 24))),
3734 .ofs = cpu_to_le32(u32_get_bits(regidx, GENMASK(23, 0))),
3735 .data = set ? cpu_to_le32(*val) : 0,
3736 };
3737 struct sk_buff *skb;
3738 int ret;
3739
3740 if (set)
3741 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(REG_ACCESS),
3742 &req, sizeof(req), true);
3743
3744 ret = mt76_mcu_send_and_get_msg(&dev->mt76,
3745 MCU_WM_UNI_CMD_QUERY(REG_ACCESS),
3746 &req, sizeof(req), true, &skb);
3747 if (ret)
3748 return ret;
3749
3750 res = (void *)skb->data;
3751 *val = le32_to_cpu(res->data);
3752 dev_kfree_skb(skb);
3753
3754 return 0;
3755 }
3756
mt7996_mcu_trigger_assert(struct mt7996_dev * dev)3757 int mt7996_mcu_trigger_assert(struct mt7996_dev *dev)
3758 {
3759 struct {
3760 __le16 tag;
3761 __le16 len;
3762 u8 enable;
3763 u8 rsv[3];
3764 } __packed req = {
3765 .len = cpu_to_le16(sizeof(req) - 4),
3766 .enable = true,
3767 };
3768
3769 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(ASSERT_DUMP),
3770 &req, sizeof(req), false);
3771 }
3772
mt7996_mcu_set_rro(struct mt7996_dev * dev,u16 tag,u8 val)3773 int mt7996_mcu_set_rro(struct mt7996_dev *dev, u16 tag, u8 val)
3774 {
3775 struct {
3776 u8 __rsv1[4];
3777
3778 __le16 tag;
3779 __le16 len;
3780
3781 union {
3782 struct {
3783 u8 type;
3784 u8 __rsv2[3];
3785 } __packed platform_type;
3786 struct {
3787 u8 type;
3788 u8 dest;
3789 u8 __rsv2[2];
3790 } __packed bypass_mode;
3791 struct {
3792 u8 path;
3793 u8 __rsv2[3];
3794 } __packed txfree_path;
3795 };
3796 } __packed req = {
3797 .tag = cpu_to_le16(tag),
3798 .len = cpu_to_le16(sizeof(req) - 4),
3799 };
3800
3801 switch (tag) {
3802 case UNI_RRO_SET_PLATFORM_TYPE:
3803 req.platform_type.type = val;
3804 break;
3805 case UNI_RRO_SET_BYPASS_MODE:
3806 req.bypass_mode.type = val;
3807 break;
3808 case UNI_RRO_SET_TXFREE_PATH:
3809 req.txfree_path.path = val;
3810 break;
3811 default:
3812 return -EINVAL;
3813 }
3814
3815 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RRO), &req,
3816 sizeof(req), true);
3817 }
3818