1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright 2006 Jake Moilanen <moilanen@austin.ibm.com>, IBM Corp.
4  * Copyright 2006-2007 Michael Ellerman, IBM Corp.
5  */
6 
7 #include <linux/crash_dump.h>
8 #include <linux/device.h>
9 #include <linux/irq.h>
10 #include <linux/irqdomain.h>
11 #include <linux/msi.h>
12 
13 #include <asm/rtas.h>
14 #include <asm/hw_irq.h>
15 #include <asm/ppc-pci.h>
16 #include <asm/machdep.h>
17 #include <asm/xive.h>
18 
19 #include "pseries.h"
20 
21 static int query_token, change_token;
22 
23 #define RTAS_QUERY_FN		0
24 #define RTAS_CHANGE_FN		1
25 #define RTAS_RESET_FN		2
26 #define RTAS_CHANGE_MSI_FN	3
27 #define RTAS_CHANGE_MSIX_FN	4
28 #define RTAS_CHANGE_32MSI_FN	5
29 
30 /* RTAS Helpers */
31 
rtas_change_msi(struct pci_dn * pdn,u32 func,u32 num_irqs)32 static int rtas_change_msi(struct pci_dn *pdn, u32 func, u32 num_irqs)
33 {
34 	u32 addr, seq_num, rtas_ret[3];
35 	unsigned long buid;
36 	int rc;
37 
38 	addr = rtas_config_addr(pdn->busno, pdn->devfn, 0);
39 	buid = pdn->phb->buid;
40 
41 	seq_num = 1;
42 	do {
43 		if (func == RTAS_CHANGE_MSI_FN || func == RTAS_CHANGE_MSIX_FN ||
44 		    func == RTAS_CHANGE_32MSI_FN)
45 			rc = rtas_call(change_token, 6, 4, rtas_ret, addr,
46 					BUID_HI(buid), BUID_LO(buid),
47 					func, num_irqs, seq_num);
48 		else
49 			rc = rtas_call(change_token, 6, 3, rtas_ret, addr,
50 					BUID_HI(buid), BUID_LO(buid),
51 					func, num_irqs, seq_num);
52 
53 		seq_num = rtas_ret[1];
54 	} while (rtas_busy_delay(rc));
55 
56 	/*
57 	 * If the RTAS call succeeded, return the number of irqs allocated.
58 	 * If not, make sure we return a negative error code.
59 	 */
60 	if (rc == 0)
61 		rc = rtas_ret[0];
62 	else if (rc > 0)
63 		rc = -rc;
64 
65 	pr_debug("rtas_msi: ibm,change_msi(func=%d,num=%d), got %d rc = %d\n",
66 		 func, num_irqs, rtas_ret[0], rc);
67 
68 	return rc;
69 }
70 
rtas_disable_msi(struct pci_dev * pdev)71 static void rtas_disable_msi(struct pci_dev *pdev)
72 {
73 	struct pci_dn *pdn;
74 
75 	pdn = pci_get_pdn(pdev);
76 	if (!pdn)
77 		return;
78 
79 	/*
80 	 * disabling MSI with the explicit interface also disables MSI-X
81 	 */
82 	if (rtas_change_msi(pdn, RTAS_CHANGE_MSI_FN, 0) != 0) {
83 		/*
84 		 * may have failed because explicit interface is not
85 		 * present
86 		 */
87 		if (rtas_change_msi(pdn, RTAS_CHANGE_FN, 0) != 0) {
88 			pr_debug("rtas_msi: Setting MSIs to 0 failed!\n");
89 		}
90 	}
91 }
92 
rtas_query_irq_number(struct pci_dn * pdn,int offset)93 static int rtas_query_irq_number(struct pci_dn *pdn, int offset)
94 {
95 	u32 addr, rtas_ret[2];
96 	unsigned long buid;
97 	int rc;
98 
99 	addr = rtas_config_addr(pdn->busno, pdn->devfn, 0);
100 	buid = pdn->phb->buid;
101 
102 	do {
103 		rc = rtas_call(query_token, 4, 3, rtas_ret, addr,
104 			       BUID_HI(buid), BUID_LO(buid), offset);
105 	} while (rtas_busy_delay(rc));
106 
107 	if (rc) {
108 		pr_debug("rtas_msi: error (%d) querying source number\n", rc);
109 		return rc;
110 	}
111 
112 	return rtas_ret[0];
113 }
114 
check_req(struct pci_dev * pdev,int nvec,char * prop_name)115 static int check_req(struct pci_dev *pdev, int nvec, char *prop_name)
116 {
117 	struct device_node *dn;
118 	const __be32 *p;
119 	u32 req_msi;
120 
121 	dn = pci_device_to_OF_node(pdev);
122 
123 	p = of_get_property(dn, prop_name, NULL);
124 	if (!p) {
125 		pr_debug("rtas_msi: No %s on %pOF\n", prop_name, dn);
126 		return -ENOENT;
127 	}
128 
129 	req_msi = be32_to_cpup(p);
130 	if (req_msi < nvec) {
131 		pr_debug("rtas_msi: %s requests < %d MSIs\n", prop_name, nvec);
132 
133 		if (req_msi == 0) /* Be paranoid */
134 			return -ENOSPC;
135 
136 		return req_msi;
137 	}
138 
139 	return 0;
140 }
141 
check_req_msi(struct pci_dev * pdev,int nvec)142 static int check_req_msi(struct pci_dev *pdev, int nvec)
143 {
144 	return check_req(pdev, nvec, "ibm,req#msi");
145 }
146 
check_req_msix(struct pci_dev * pdev,int nvec)147 static int check_req_msix(struct pci_dev *pdev, int nvec)
148 {
149 	return check_req(pdev, nvec, "ibm,req#msi-x");
150 }
151 
152 /* Quota calculation */
153 
__find_pe_total_msi(struct device_node * node,int * total)154 static struct device_node *__find_pe_total_msi(struct device_node *node, int *total)
155 {
156 	struct device_node *dn;
157 	const __be32 *p;
158 
159 	dn = of_node_get(node);
160 	while (dn) {
161 		p = of_get_property(dn, "ibm,pe-total-#msi", NULL);
162 		if (p) {
163 			pr_debug("rtas_msi: found prop on dn %pOF\n",
164 				dn);
165 			*total = be32_to_cpup(p);
166 			return dn;
167 		}
168 
169 		dn = of_get_next_parent(dn);
170 	}
171 
172 	return NULL;
173 }
174 
find_pe_total_msi(struct pci_dev * dev,int * total)175 static struct device_node *find_pe_total_msi(struct pci_dev *dev, int *total)
176 {
177 	return __find_pe_total_msi(pci_device_to_OF_node(dev), total);
178 }
179 
find_pe_dn(struct pci_dev * dev,int * total)180 static struct device_node *find_pe_dn(struct pci_dev *dev, int *total)
181 {
182 	struct device_node *dn;
183 	struct eeh_dev *edev;
184 
185 	/* Found our PE and assume 8 at that point. */
186 
187 	dn = pci_device_to_OF_node(dev);
188 	if (!dn)
189 		return NULL;
190 
191 	/* Get the top level device in the PE */
192 	edev = pdn_to_eeh_dev(PCI_DN(dn));
193 	if (edev->pe)
194 		edev = list_first_entry(&edev->pe->edevs, struct eeh_dev,
195 					entry);
196 	dn = pci_device_to_OF_node(edev->pdev);
197 	if (!dn)
198 		return NULL;
199 
200 	/* We actually want the parent */
201 	dn = of_get_parent(dn);
202 	if (!dn)
203 		return NULL;
204 
205 	/* Hardcode of 8 for old firmwares */
206 	*total = 8;
207 	pr_debug("rtas_msi: using PE dn %pOF\n", dn);
208 
209 	return dn;
210 }
211 
212 struct msi_counts {
213 	struct device_node *requestor;
214 	int num_devices;
215 	int request;
216 	int quota;
217 	int spare;
218 	int over_quota;
219 };
220 
count_non_bridge_devices(struct device_node * dn,void * data)221 static void *count_non_bridge_devices(struct device_node *dn, void *data)
222 {
223 	struct msi_counts *counts = data;
224 	const __be32 *p;
225 	u32 class;
226 
227 	pr_debug("rtas_msi: counting %pOF\n", dn);
228 
229 	p = of_get_property(dn, "class-code", NULL);
230 	class = p ? be32_to_cpup(p) : 0;
231 
232 	if ((class >> 8) != PCI_CLASS_BRIDGE_PCI)
233 		counts->num_devices++;
234 
235 	return NULL;
236 }
237 
count_spare_msis(struct device_node * dn,void * data)238 static void *count_spare_msis(struct device_node *dn, void *data)
239 {
240 	struct msi_counts *counts = data;
241 	const __be32 *p;
242 	int req;
243 
244 	if (dn == counts->requestor)
245 		req = counts->request;
246 	else {
247 		/* We don't know if a driver will try to use MSI or MSI-X,
248 		 * so we just have to punt and use the larger of the two. */
249 		req = 0;
250 		p = of_get_property(dn, "ibm,req#msi", NULL);
251 		if (p)
252 			req = be32_to_cpup(p);
253 
254 		p = of_get_property(dn, "ibm,req#msi-x", NULL);
255 		if (p)
256 			req = max(req, (int)be32_to_cpup(p));
257 	}
258 
259 	if (req < counts->quota)
260 		counts->spare += counts->quota - req;
261 	else if (req > counts->quota)
262 		counts->over_quota++;
263 
264 	return NULL;
265 }
266 
msi_quota_for_device(struct pci_dev * dev,int request)267 static int msi_quota_for_device(struct pci_dev *dev, int request)
268 {
269 	struct device_node *pe_dn;
270 	struct msi_counts counts;
271 	int total;
272 
273 	pr_debug("rtas_msi: calc quota for %s, request %d\n", pci_name(dev),
274 		  request);
275 
276 	pe_dn = find_pe_total_msi(dev, &total);
277 	if (!pe_dn)
278 		pe_dn = find_pe_dn(dev, &total);
279 
280 	if (!pe_dn) {
281 		pr_err("rtas_msi: couldn't find PE for %s\n", pci_name(dev));
282 		goto out;
283 	}
284 
285 	pr_debug("rtas_msi: found PE %pOF\n", pe_dn);
286 
287 	memset(&counts, 0, sizeof(struct msi_counts));
288 
289 	/* Work out how many devices we have below this PE */
290 	pci_traverse_device_nodes(pe_dn, count_non_bridge_devices, &counts);
291 
292 	if (counts.num_devices == 0) {
293 		pr_err("rtas_msi: found 0 devices under PE for %s\n",
294 			pci_name(dev));
295 		goto out;
296 	}
297 
298 	counts.quota = total / counts.num_devices;
299 	if (request <= counts.quota)
300 		goto out;
301 
302 	/* else, we have some more calculating to do */
303 	counts.requestor = pci_device_to_OF_node(dev);
304 	counts.request = request;
305 	pci_traverse_device_nodes(pe_dn, count_spare_msis, &counts);
306 
307 	/* If the quota isn't an integer multiple of the total, we can
308 	 * use the remainder as spare MSIs for anyone that wants them. */
309 	counts.spare += total % counts.num_devices;
310 
311 	/* Divide any spare by the number of over-quota requestors */
312 	if (counts.over_quota)
313 		counts.quota += counts.spare / counts.over_quota;
314 
315 	/* And finally clamp the request to the possibly adjusted quota */
316 	request = min(counts.quota, request);
317 
318 	pr_debug("rtas_msi: request clamped to quota %d\n", request);
319 out:
320 	of_node_put(pe_dn);
321 
322 	return request;
323 }
324 
rtas_hack_32bit_msi_gen2(struct pci_dev * pdev)325 static void rtas_hack_32bit_msi_gen2(struct pci_dev *pdev)
326 {
327 	u32 addr_hi, addr_lo;
328 
329 	/*
330 	 * We should only get in here for IODA1 configs. This is based on the
331 	 * fact that we using RTAS for MSIs, we don't have the 32 bit MSI RTAS
332 	 * support, and we are in a PCIe Gen2 slot.
333 	 */
334 	dev_info(&pdev->dev,
335 		 "rtas_msi: No 32 bit MSI firmware support, forcing 32 bit MSI\n");
336 	pci_read_config_dword(pdev, pdev->msi_cap + PCI_MSI_ADDRESS_HI, &addr_hi);
337 	addr_lo = 0xffff0000 | ((addr_hi >> (48 - 32)) << 4);
338 	pci_write_config_dword(pdev, pdev->msi_cap + PCI_MSI_ADDRESS_LO, addr_lo);
339 	pci_write_config_dword(pdev, pdev->msi_cap + PCI_MSI_ADDRESS_HI, 0);
340 }
341 
rtas_prepare_msi_irqs(struct pci_dev * pdev,int nvec_in,int type,msi_alloc_info_t * arg)342 static int rtas_prepare_msi_irqs(struct pci_dev *pdev, int nvec_in, int type,
343 				 msi_alloc_info_t *arg)
344 {
345 	struct pci_dn *pdn;
346 	int quota, rc;
347 	int nvec = nvec_in;
348 	int use_32bit_msi_hack = 0;
349 
350 	if (type == PCI_CAP_ID_MSIX)
351 		rc = check_req_msix(pdev, nvec);
352 	else
353 		rc = check_req_msi(pdev, nvec);
354 
355 	if (rc)
356 		return rc;
357 
358 	quota = msi_quota_for_device(pdev, nvec);
359 
360 	if (quota && quota < nvec)
361 		return quota;
362 
363 	/*
364 	 * Firmware currently refuse any non power of two allocation
365 	 * so we round up if the quota will allow it.
366 	 */
367 	if (type == PCI_CAP_ID_MSIX) {
368 		int m = roundup_pow_of_two(nvec);
369 		quota = msi_quota_for_device(pdev, m);
370 
371 		if (quota >= m)
372 			nvec = m;
373 	}
374 
375 	pdn = pci_get_pdn(pdev);
376 
377 	/*
378 	 * Try the new more explicit firmware interface, if that fails fall
379 	 * back to the old interface. The old interface is known to never
380 	 * return MSI-Xs.
381 	 */
382 again:
383 	if (type == PCI_CAP_ID_MSI) {
384 		if (pdev->no_64bit_msi) {
385 			rc = rtas_change_msi(pdn, RTAS_CHANGE_32MSI_FN, nvec);
386 			if (rc < 0) {
387 				/*
388 				 * We only want to run the 32 bit MSI hack below if
389 				 * the max bus speed is Gen2 speed
390 				 */
391 				if (pdev->bus->max_bus_speed != PCIE_SPEED_5_0GT)
392 					return rc;
393 
394 				use_32bit_msi_hack = 1;
395 			}
396 		} else
397 			rc = -1;
398 
399 		if (rc < 0)
400 			rc = rtas_change_msi(pdn, RTAS_CHANGE_MSI_FN, nvec);
401 
402 		if (rc < 0) {
403 			pr_debug("rtas_msi: trying the old firmware call.\n");
404 			rc = rtas_change_msi(pdn, RTAS_CHANGE_FN, nvec);
405 		}
406 
407 		if (use_32bit_msi_hack && rc > 0)
408 			rtas_hack_32bit_msi_gen2(pdev);
409 	} else
410 		rc = rtas_change_msi(pdn, RTAS_CHANGE_MSIX_FN, nvec);
411 
412 	if (rc != nvec) {
413 		if (nvec != nvec_in) {
414 			nvec = nvec_in;
415 			goto again;
416 		}
417 		pr_debug("rtas_msi: rtas_change_msi() failed\n");
418 		return rc;
419 	}
420 
421 	return 0;
422 }
423 
pseries_msi_ops_prepare(struct irq_domain * domain,struct device * dev,int nvec,msi_alloc_info_t * arg)424 static int pseries_msi_ops_prepare(struct irq_domain *domain, struct device *dev,
425 				   int nvec, msi_alloc_info_t *arg)
426 {
427 	struct pci_dev *pdev = to_pci_dev(dev);
428 	int type = pdev->msix_enabled ? PCI_CAP_ID_MSIX : PCI_CAP_ID_MSI;
429 
430 	return rtas_prepare_msi_irqs(pdev, nvec, type, arg);
431 }
432 
433 /*
434  * ->msi_free() is called before irq_domain_free_irqs_top() when the
435  * handler data is still available. Use that to clear the XIVE
436  * controller data.
437  */
pseries_msi_ops_msi_free(struct irq_domain * domain,struct msi_domain_info * info,unsigned int irq)438 static void pseries_msi_ops_msi_free(struct irq_domain *domain,
439 				     struct msi_domain_info *info,
440 				     unsigned int irq)
441 {
442 	if (xive_enabled())
443 		xive_irq_free_data(irq);
444 }
445 
446 /*
447  * RTAS can not disable one MSI at a time. It's all or nothing. Do it
448  * at the end after all IRQs have been freed.
449  */
pseries_msi_post_free(struct irq_domain * domain,struct device * dev)450 static void pseries_msi_post_free(struct irq_domain *domain, struct device *dev)
451 {
452 	if (WARN_ON_ONCE(!dev_is_pci(dev)))
453 		return;
454 
455 	rtas_disable_msi(to_pci_dev(dev));
456 }
457 
458 static struct msi_domain_ops pseries_pci_msi_domain_ops = {
459 	.msi_prepare	= pseries_msi_ops_prepare,
460 	.msi_free	= pseries_msi_ops_msi_free,
461 	.msi_post_free	= pseries_msi_post_free,
462 };
463 
pseries_msi_shutdown(struct irq_data * d)464 static void pseries_msi_shutdown(struct irq_data *d)
465 {
466 	d = d->parent_data;
467 	if (d->chip->irq_shutdown)
468 		d->chip->irq_shutdown(d);
469 }
470 
pseries_msi_mask(struct irq_data * d)471 static void pseries_msi_mask(struct irq_data *d)
472 {
473 	pci_msi_mask_irq(d);
474 	irq_chip_mask_parent(d);
475 }
476 
pseries_msi_unmask(struct irq_data * d)477 static void pseries_msi_unmask(struct irq_data *d)
478 {
479 	pci_msi_unmask_irq(d);
480 	irq_chip_unmask_parent(d);
481 }
482 
pseries_msi_write_msg(struct irq_data * data,struct msi_msg * msg)483 static void pseries_msi_write_msg(struct irq_data *data, struct msi_msg *msg)
484 {
485 	struct msi_desc *entry = irq_data_get_msi_desc(data);
486 
487 	/*
488 	 * Do not update the MSIx vector table. It's not strictly necessary
489 	 * because the table is initialized by the underlying hypervisor, PowerVM
490 	 * or QEMU/KVM. However, if the MSIx vector entry is cleared, any further
491 	 * activation will fail. This can happen in some drivers (eg. IPR) which
492 	 * deactivate an IRQ used for testing MSI support.
493 	 */
494 	entry->msg = *msg;
495 }
496 
497 static struct irq_chip pseries_pci_msi_irq_chip = {
498 	.name		= "pSeries-PCI-MSI",
499 	.irq_shutdown	= pseries_msi_shutdown,
500 	.irq_mask	= pseries_msi_mask,
501 	.irq_unmask	= pseries_msi_unmask,
502 	.irq_eoi	= irq_chip_eoi_parent,
503 	.irq_write_msi_msg	= pseries_msi_write_msg,
504 };
505 
506 
507 /*
508  * Set MSI_FLAG_MSIX_CONTIGUOUS as there is no way to express to
509  * firmware to request a discontiguous or non-zero based range of
510  * MSI-X entries. Core code will reject such setup attempts.
511  */
512 static struct msi_domain_info pseries_msi_domain_info = {
513 	.flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
514 		  MSI_FLAG_MULTI_PCI_MSI  | MSI_FLAG_PCI_MSIX |
515 		  MSI_FLAG_MSIX_CONTIGUOUS),
516 	.ops   = &pseries_pci_msi_domain_ops,
517 	.chip  = &pseries_pci_msi_irq_chip,
518 };
519 
pseries_msi_compose_msg(struct irq_data * data,struct msi_msg * msg)520 static void pseries_msi_compose_msg(struct irq_data *data, struct msi_msg *msg)
521 {
522 	__pci_read_msi_msg(irq_data_get_msi_desc(data), msg);
523 }
524 
525 static struct irq_chip pseries_msi_irq_chip = {
526 	.name			= "pSeries-MSI",
527 	.irq_shutdown		= pseries_msi_shutdown,
528 	.irq_mask		= irq_chip_mask_parent,
529 	.irq_unmask		= irq_chip_unmask_parent,
530 	.irq_eoi		= irq_chip_eoi_parent,
531 	.irq_set_affinity	= irq_chip_set_affinity_parent,
532 	.irq_compose_msi_msg	= pseries_msi_compose_msg,
533 };
534 
pseries_irq_parent_domain_alloc(struct irq_domain * domain,unsigned int virq,irq_hw_number_t hwirq)535 static int pseries_irq_parent_domain_alloc(struct irq_domain *domain, unsigned int virq,
536 					   irq_hw_number_t hwirq)
537 {
538 	struct irq_fwspec parent_fwspec;
539 	int ret;
540 
541 	parent_fwspec.fwnode = domain->parent->fwnode;
542 	parent_fwspec.param_count = 2;
543 	parent_fwspec.param[0] = hwirq;
544 	parent_fwspec.param[1] = IRQ_TYPE_EDGE_RISING;
545 
546 	ret = irq_domain_alloc_irqs_parent(domain, virq, 1, &parent_fwspec);
547 	if (ret)
548 		return ret;
549 
550 	return 0;
551 }
552 
pseries_irq_domain_alloc(struct irq_domain * domain,unsigned int virq,unsigned int nr_irqs,void * arg)553 static int pseries_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
554 				    unsigned int nr_irqs, void *arg)
555 {
556 	struct pci_controller *phb = domain->host_data;
557 	msi_alloc_info_t *info = arg;
558 	struct msi_desc *desc = info->desc;
559 	struct pci_dev *pdev = msi_desc_to_pci_dev(desc);
560 	int hwirq;
561 	int i, ret;
562 
563 	hwirq = rtas_query_irq_number(pci_get_pdn(pdev), desc->msi_index);
564 	if (hwirq < 0) {
565 		dev_err(&pdev->dev, "Failed to query HW IRQ: %d\n", hwirq);
566 		return hwirq;
567 	}
568 
569 	dev_dbg(&pdev->dev, "%s bridge %pOF %d/%x #%d\n", __func__,
570 		phb->dn, virq, hwirq, nr_irqs);
571 
572 	for (i = 0; i < nr_irqs; i++) {
573 		ret = pseries_irq_parent_domain_alloc(domain, virq + i, hwirq + i);
574 		if (ret)
575 			goto out;
576 
577 		irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq + i,
578 					      &pseries_msi_irq_chip, domain->host_data);
579 	}
580 
581 	return 0;
582 
583 out:
584 	/* TODO: handle RTAS cleanup in ->msi_finish() ? */
585 	irq_domain_free_irqs_parent(domain, virq, i - 1);
586 	return ret;
587 }
588 
pseries_irq_domain_free(struct irq_domain * domain,unsigned int virq,unsigned int nr_irqs)589 static void pseries_irq_domain_free(struct irq_domain *domain, unsigned int virq,
590 				    unsigned int nr_irqs)
591 {
592 	struct irq_data *d = irq_domain_get_irq_data(domain, virq);
593 	struct pci_controller *phb = irq_data_get_irq_chip_data(d);
594 
595 	pr_debug("%s bridge %pOF %d #%d\n", __func__, phb->dn, virq, nr_irqs);
596 
597 	/* XIVE domain data is cleared through ->msi_free() */
598 }
599 
600 static const struct irq_domain_ops pseries_irq_domain_ops = {
601 	.alloc  = pseries_irq_domain_alloc,
602 	.free   = pseries_irq_domain_free,
603 };
604 
__pseries_msi_allocate_domains(struct pci_controller * phb,unsigned int count)605 static int __pseries_msi_allocate_domains(struct pci_controller *phb,
606 					  unsigned int count)
607 {
608 	struct irq_domain *parent = irq_get_default_host();
609 
610 	phb->fwnode = irq_domain_alloc_named_id_fwnode("pSeries-MSI",
611 						       phb->global_number);
612 	if (!phb->fwnode)
613 		return -ENOMEM;
614 
615 	phb->dev_domain = irq_domain_create_hierarchy(parent, 0, count,
616 						      phb->fwnode,
617 						      &pseries_irq_domain_ops, phb);
618 	if (!phb->dev_domain) {
619 		pr_err("PCI: failed to create IRQ domain bridge %pOF (domain %d)\n",
620 		       phb->dn, phb->global_number);
621 		irq_domain_free_fwnode(phb->fwnode);
622 		return -ENOMEM;
623 	}
624 
625 	phb->msi_domain = pci_msi_create_irq_domain(of_node_to_fwnode(phb->dn),
626 						    &pseries_msi_domain_info,
627 						    phb->dev_domain);
628 	if (!phb->msi_domain) {
629 		pr_err("PCI: failed to create MSI IRQ domain bridge %pOF (domain %d)\n",
630 		       phb->dn, phb->global_number);
631 		irq_domain_free_fwnode(phb->fwnode);
632 		irq_domain_remove(phb->dev_domain);
633 		return -ENOMEM;
634 	}
635 
636 	return 0;
637 }
638 
pseries_msi_allocate_domains(struct pci_controller * phb)639 int pseries_msi_allocate_domains(struct pci_controller *phb)
640 {
641 	int count;
642 
643 	if (!__find_pe_total_msi(phb->dn, &count)) {
644 		pr_err("PCI: failed to find MSIs for bridge %pOF (domain %d)\n",
645 		       phb->dn, phb->global_number);
646 		return -ENOSPC;
647 	}
648 
649 	return __pseries_msi_allocate_domains(phb, count);
650 }
651 
pseries_msi_free_domains(struct pci_controller * phb)652 void pseries_msi_free_domains(struct pci_controller *phb)
653 {
654 	if (phb->msi_domain)
655 		irq_domain_remove(phb->msi_domain);
656 	if (phb->dev_domain)
657 		irq_domain_remove(phb->dev_domain);
658 	if (phb->fwnode)
659 		irq_domain_free_fwnode(phb->fwnode);
660 }
661 
rtas_msi_pci_irq_fixup(struct pci_dev * pdev)662 static void rtas_msi_pci_irq_fixup(struct pci_dev *pdev)
663 {
664 	/* No LSI -> leave MSIs (if any) configured */
665 	if (!pdev->irq) {
666 		dev_dbg(&pdev->dev, "rtas_msi: no LSI, nothing to do.\n");
667 		return;
668 	}
669 
670 	/* No MSI -> MSIs can't have been assigned by fw, leave LSI */
671 	if (check_req_msi(pdev, 1) && check_req_msix(pdev, 1)) {
672 		dev_dbg(&pdev->dev, "rtas_msi: no req#msi/x, nothing to do.\n");
673 		return;
674 	}
675 
676 	dev_dbg(&pdev->dev, "rtas_msi: disabling existing MSI.\n");
677 	rtas_disable_msi(pdev);
678 }
679 
rtas_msi_init(void)680 static int rtas_msi_init(void)
681 {
682 	query_token  = rtas_function_token(RTAS_FN_IBM_QUERY_INTERRUPT_SOURCE_NUMBER);
683 	change_token = rtas_function_token(RTAS_FN_IBM_CHANGE_MSI);
684 
685 	if ((query_token == RTAS_UNKNOWN_SERVICE) ||
686 			(change_token == RTAS_UNKNOWN_SERVICE)) {
687 		pr_debug("rtas_msi: no RTAS tokens, no MSI support.\n");
688 		return -1;
689 	}
690 
691 	pr_debug("rtas_msi: Registering RTAS MSI callbacks.\n");
692 
693 	WARN_ON(ppc_md.pci_irq_fixup);
694 	ppc_md.pci_irq_fixup = rtas_msi_pci_irq_fixup;
695 
696 	return 0;
697 }
698 machine_arch_initcall(pseries, rtas_msi_init);
699