xref: /openbmc/qemu/hw/i386/microvm.c (revision 93c76555)
1 /*
2  * Copyright (c) 2018 Intel Corporation
3  * Copyright (c) 2019 Red Hat, Inc.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms and conditions of the GNU General Public License,
7  * version 2 or later, as published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  *
14  * You should have received a copy of the GNU General Public License along with
15  * this program.  If not, see <http://www.gnu.org/licenses/>.
16  */
17 
18 #include "qemu/osdep.h"
19 #include "qemu/error-report.h"
20 #include "qemu/cutils.h"
21 #include "qemu/units.h"
22 #include "qapi/error.h"
23 #include "qapi/visitor.h"
24 #include "qapi/qapi-visit-common.h"
25 #include "sysemu/sysemu.h"
26 #include "sysemu/cpus.h"
27 #include "sysemu/numa.h"
28 #include "sysemu/reset.h"
29 #include "sysemu/runstate.h"
30 #include "acpi-microvm.h"
31 #include "microvm-dt.h"
32 
33 #include "hw/loader.h"
34 #include "hw/irq.h"
35 #include "hw/i386/kvm/clock.h"
36 #include "hw/i386/microvm.h"
37 #include "hw/i386/x86.h"
38 #include "target/i386/cpu.h"
39 #include "hw/intc/i8259.h"
40 #include "hw/timer/i8254.h"
41 #include "hw/rtc/mc146818rtc.h"
42 #include "hw/char/serial.h"
43 #include "hw/display/ramfb.h"
44 #include "hw/i386/topology.h"
45 #include "hw/i386/e820_memory_layout.h"
46 #include "hw/i386/fw_cfg.h"
47 #include "hw/virtio/virtio-mmio.h"
48 #include "hw/acpi/acpi.h"
49 #include "hw/acpi/generic_event_device.h"
50 #include "hw/pci-host/gpex.h"
51 #include "hw/usb/xhci.h"
52 
53 #include "elf.h"
54 #include "kvm/kvm_i386.h"
55 #include "hw/xen/start_info.h"
56 
57 #define MICROVM_QBOOT_FILENAME "qboot.rom"
58 #define MICROVM_BIOS_FILENAME  "bios-microvm.bin"
59 
microvm_set_rtc(MicrovmMachineState * mms,MC146818RtcState * s)60 static void microvm_set_rtc(MicrovmMachineState *mms, MC146818RtcState *s)
61 {
62     X86MachineState *x86ms = X86_MACHINE(mms);
63     int val;
64 
65     val = MIN(x86ms->below_4g_mem_size / KiB, 640);
66     mc146818rtc_set_cmos_data(s, 0x15, val);
67     mc146818rtc_set_cmos_data(s, 0x16, val >> 8);
68     /* extended memory (next 64MiB) */
69     if (x86ms->below_4g_mem_size > 1 * MiB) {
70         val = (x86ms->below_4g_mem_size - 1 * MiB) / KiB;
71     } else {
72         val = 0;
73     }
74     if (val > 65535) {
75         val = 65535;
76     }
77     mc146818rtc_set_cmos_data(s, 0x17, val);
78     mc146818rtc_set_cmos_data(s, 0x18, val >> 8);
79     mc146818rtc_set_cmos_data(s, 0x30, val);
80     mc146818rtc_set_cmos_data(s, 0x31, val >> 8);
81     /* memory between 16MiB and 4GiB */
82     if (x86ms->below_4g_mem_size > 16 * MiB) {
83         val = (x86ms->below_4g_mem_size - 16 * MiB) / (64 * KiB);
84     } else {
85         val = 0;
86     }
87     if (val > 65535) {
88         val = 65535;
89     }
90     mc146818rtc_set_cmos_data(s, 0x34, val);
91     mc146818rtc_set_cmos_data(s, 0x35, val >> 8);
92     /* memory above 4GiB */
93     val = x86ms->above_4g_mem_size / 65536;
94     mc146818rtc_set_cmos_data(s, 0x5b, val);
95     mc146818rtc_set_cmos_data(s, 0x5c, val >> 8);
96     mc146818rtc_set_cmos_data(s, 0x5d, val >> 16);
97 }
98 
create_gpex(MicrovmMachineState * mms)99 static void create_gpex(MicrovmMachineState *mms)
100 {
101     X86MachineState *x86ms = X86_MACHINE(mms);
102     MemoryRegion *mmio32_alias;
103     MemoryRegion *mmio64_alias;
104     MemoryRegion *mmio_reg;
105     MemoryRegion *ecam_alias;
106     MemoryRegion *ecam_reg;
107     DeviceState *dev;
108     int i;
109 
110     dev = qdev_new(TYPE_GPEX_HOST);
111     sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
112 
113     /* Map only the first size_ecam bytes of ECAM space */
114     ecam_alias = g_new0(MemoryRegion, 1);
115     ecam_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0);
116     memory_region_init_alias(ecam_alias, OBJECT(dev), "pcie-ecam",
117                              ecam_reg, 0, mms->gpex.ecam.size);
118     memory_region_add_subregion(get_system_memory(),
119                                 mms->gpex.ecam.base, ecam_alias);
120 
121     /* Map the MMIO window into system address space so as to expose
122      * the section of PCI MMIO space which starts at the same base address
123      * (ie 1:1 mapping for that part of PCI MMIO space visible through
124      * the window).
125      */
126     mmio_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 1);
127     if (mms->gpex.mmio32.size) {
128         mmio32_alias = g_new0(MemoryRegion, 1);
129         memory_region_init_alias(mmio32_alias, OBJECT(dev), "pcie-mmio32", mmio_reg,
130                                  mms->gpex.mmio32.base, mms->gpex.mmio32.size);
131         memory_region_add_subregion(get_system_memory(),
132                                     mms->gpex.mmio32.base, mmio32_alias);
133     }
134     if (mms->gpex.mmio64.size) {
135         mmio64_alias = g_new0(MemoryRegion, 1);
136         memory_region_init_alias(mmio64_alias, OBJECT(dev), "pcie-mmio64", mmio_reg,
137                                  mms->gpex.mmio64.base, mms->gpex.mmio64.size);
138         memory_region_add_subregion(get_system_memory(),
139                                     mms->gpex.mmio64.base, mmio64_alias);
140     }
141 
142     for (i = 0; i < GPEX_NUM_IRQS; i++) {
143         sysbus_connect_irq(SYS_BUS_DEVICE(dev), i,
144                            x86ms->gsi[mms->gpex.irq + i]);
145     }
146 }
147 
microvm_ioapics(MicrovmMachineState * mms)148 static int microvm_ioapics(MicrovmMachineState *mms)
149 {
150     if (!x86_machine_is_acpi_enabled(X86_MACHINE(mms))) {
151         return 1;
152     }
153     if (mms->ioapic2 == ON_OFF_AUTO_OFF) {
154         return 1;
155     }
156     return 2;
157 }
158 
microvm_devices_init(MicrovmMachineState * mms)159 static void microvm_devices_init(MicrovmMachineState *mms)
160 {
161     const char *default_firmware;
162     X86MachineState *x86ms = X86_MACHINE(mms);
163     ISABus *isa_bus;
164     GSIState *gsi_state;
165     int ioapics;
166     int i;
167 
168     /* Core components */
169     ioapics = microvm_ioapics(mms);
170     gsi_state = g_malloc0(sizeof(*gsi_state));
171     x86ms->gsi = qemu_allocate_irqs(gsi_handler, gsi_state,
172                                     IOAPIC_NUM_PINS * ioapics);
173 
174     isa_bus = isa_bus_new(NULL, get_system_memory(), get_system_io(),
175                           &error_abort);
176     isa_bus_register_input_irqs(isa_bus, x86ms->gsi);
177 
178     ioapic_init_gsi(gsi_state, OBJECT(mms));
179     if (ioapics > 1) {
180         x86ms->ioapic2 = ioapic_init_secondary(gsi_state);
181     }
182 
183     if (kvm_enabled()) {
184         kvmclock_create(true);
185     }
186 
187     mms->virtio_irq_base = 5;
188     mms->virtio_num_transports = 8;
189     if (x86ms->ioapic2) {
190         mms->pcie_irq_base = 16;    /* 16 -> 19 */
191         /* use second ioapic (24 -> 47) for virtio-mmio irq lines */
192         mms->virtio_irq_base = IO_APIC_SECONDARY_IRQBASE;
193         mms->virtio_num_transports = IOAPIC_NUM_PINS;
194     } else if (x86_machine_is_acpi_enabled(x86ms)) {
195         mms->pcie_irq_base = 12;    /* 12 -> 15 */
196         mms->virtio_irq_base = 16;  /* 16 -> 23 */
197     }
198 
199     for (i = 0; i < mms->virtio_num_transports; i++) {
200         sysbus_create_simple("virtio-mmio",
201                              VIRTIO_MMIO_BASE + i * 512,
202                              x86ms->gsi[mms->virtio_irq_base + i]);
203     }
204 
205     /* Optional and legacy devices */
206     if (x86_machine_is_acpi_enabled(x86ms)) {
207         DeviceState *dev = qdev_new(TYPE_ACPI_GED);
208         qdev_prop_set_uint32(dev, "ged-event", ACPI_GED_PWR_DOWN_EVT);
209         sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal);
210         sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, GED_MMIO_BASE);
211         /* sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, GED_MMIO_BASE_MEMHP); */
212         sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, GED_MMIO_BASE_REGS);
213         sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0,
214                            x86ms->gsi[GED_MMIO_IRQ]);
215         x86ms->acpi_dev = HOTPLUG_HANDLER(dev);
216     }
217 
218     if (x86_machine_is_acpi_enabled(x86ms) && machine_usb(MACHINE(mms))) {
219         DeviceState *dev = qdev_new(TYPE_XHCI_SYSBUS);
220         qdev_prop_set_uint32(dev, "intrs", 1);
221         qdev_prop_set_uint32(dev, "slots", XHCI_MAXSLOTS);
222         qdev_prop_set_uint32(dev, "p2", 8);
223         qdev_prop_set_uint32(dev, "p3", 8);
224         sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal);
225         sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, MICROVM_XHCI_BASE);
226         sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0,
227                            x86ms->gsi[MICROVM_XHCI_IRQ]);
228     }
229 
230     if (x86_machine_is_acpi_enabled(x86ms) && mms->pcie == ON_OFF_AUTO_ON) {
231         /* use topmost 25% of the address space available */
232         hwaddr phys_size = (hwaddr)1 << X86_CPU(first_cpu)->phys_bits;
233         if (phys_size > 0x1000000ll) {
234             mms->gpex.mmio64.size = phys_size / 4;
235             mms->gpex.mmio64.base = phys_size - mms->gpex.mmio64.size;
236         }
237         mms->gpex.mmio32.base = PCIE_MMIO_BASE;
238         mms->gpex.mmio32.size = PCIE_MMIO_SIZE;
239         mms->gpex.ecam.base   = PCIE_ECAM_BASE;
240         mms->gpex.ecam.size   = PCIE_ECAM_SIZE;
241         mms->gpex.irq         = mms->pcie_irq_base;
242         create_gpex(mms);
243         x86ms->pci_irq_mask = ((1 << (mms->pcie_irq_base + 0)) |
244                                (1 << (mms->pcie_irq_base + 1)) |
245                                (1 << (mms->pcie_irq_base + 2)) |
246                                (1 << (mms->pcie_irq_base + 3)));
247     } else {
248         x86ms->pci_irq_mask = 0;
249     }
250 
251     if (x86ms->pic == ON_OFF_AUTO_ON || x86ms->pic == ON_OFF_AUTO_AUTO) {
252         qemu_irq *i8259;
253 
254         i8259 = i8259_init(isa_bus, x86_allocate_cpu_irq());
255         for (i = 0; i < ISA_NUM_IRQS; i++) {
256             gsi_state->i8259_irq[i] = i8259[i];
257         }
258         g_free(i8259);
259     }
260 
261     if (x86ms->pit == ON_OFF_AUTO_ON || x86ms->pit == ON_OFF_AUTO_AUTO) {
262         if (kvm_pit_in_kernel()) {
263             kvm_pit_init(isa_bus, 0x40);
264         } else {
265             i8254_pit_init(isa_bus, 0x40, 0, NULL);
266         }
267     }
268 
269     if (mms->rtc == ON_OFF_AUTO_ON ||
270         (mms->rtc == ON_OFF_AUTO_AUTO && !kvm_enabled())) {
271         microvm_set_rtc(mms, mc146818_rtc_init(isa_bus, 2000, NULL));
272     }
273 
274     if (mms->isa_serial) {
275         serial_hds_isa_init(isa_bus, 0, 1);
276     }
277 
278     default_firmware = x86_machine_is_acpi_enabled(x86ms)
279             ? MICROVM_BIOS_FILENAME
280             : MICROVM_QBOOT_FILENAME;
281     x86_bios_rom_init(x86ms, default_firmware, get_system_memory(), true);
282 }
283 
microvm_memory_init(MicrovmMachineState * mms)284 static void microvm_memory_init(MicrovmMachineState *mms)
285 {
286     MachineState *machine = MACHINE(mms);
287     X86MachineState *x86ms = X86_MACHINE(mms);
288     MemoryRegion *ram_below_4g, *ram_above_4g;
289     MemoryRegion *system_memory = get_system_memory();
290     FWCfgState *fw_cfg;
291     ram_addr_t lowmem = 0xc0000000; /* 3G */
292     int i;
293 
294     if (machine->ram_size > lowmem) {
295         x86ms->above_4g_mem_size = machine->ram_size - lowmem;
296         x86ms->below_4g_mem_size = lowmem;
297     } else {
298         x86ms->above_4g_mem_size = 0;
299         x86ms->below_4g_mem_size = machine->ram_size;
300     }
301 
302     ram_below_4g = g_malloc(sizeof(*ram_below_4g));
303     memory_region_init_alias(ram_below_4g, NULL, "ram-below-4g", machine->ram,
304                              0, x86ms->below_4g_mem_size);
305     memory_region_add_subregion(system_memory, 0, ram_below_4g);
306 
307     e820_add_entry(0, x86ms->below_4g_mem_size, E820_RAM);
308 
309     if (x86ms->above_4g_mem_size > 0) {
310         ram_above_4g = g_malloc(sizeof(*ram_above_4g));
311         memory_region_init_alias(ram_above_4g, NULL, "ram-above-4g",
312                                  machine->ram,
313                                  x86ms->below_4g_mem_size,
314                                  x86ms->above_4g_mem_size);
315         memory_region_add_subregion(system_memory, 0x100000000ULL,
316                                     ram_above_4g);
317         e820_add_entry(0x100000000ULL, x86ms->above_4g_mem_size, E820_RAM);
318     }
319 
320     fw_cfg = fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4,
321                                 &address_space_memory);
322 
323     fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, machine->smp.cpus);
324     fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, machine->smp.max_cpus);
325     fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)machine->ram_size);
326     fw_cfg_add_i32(fw_cfg, FW_CFG_IRQ0_OVERRIDE, 1);
327 
328     rom_set_fw(fw_cfg);
329 
330     if (machine->kernel_filename != NULL) {
331         x86_load_linux(x86ms, fw_cfg, 0, true);
332     }
333 
334     if (mms->option_roms) {
335         for (i = 0; i < nb_option_roms; i++) {
336             rom_add_option(option_rom[i].name, option_rom[i].bootindex);
337         }
338     }
339 
340     x86ms->fw_cfg = fw_cfg;
341     x86ms->ioapic_as = &address_space_memory;
342 }
343 
microvm_get_mmio_cmdline(gchar * name,uint32_t virtio_irq_base)344 static gchar *microvm_get_mmio_cmdline(gchar *name, uint32_t virtio_irq_base)
345 {
346     gchar *cmdline;
347     gchar *separator;
348     long int index;
349     int ret;
350 
351     separator = g_strrstr(name, ".");
352     if (!separator) {
353         return NULL;
354     }
355 
356     if (qemu_strtol(separator + 1, NULL, 10, &index) != 0) {
357         return NULL;
358     }
359 
360     cmdline = g_malloc0(VIRTIO_CMDLINE_MAXLEN);
361     ret = g_snprintf(cmdline, VIRTIO_CMDLINE_MAXLEN,
362                      " virtio_mmio.device=512@0x%lx:%ld",
363                      VIRTIO_MMIO_BASE + index * 512,
364                      virtio_irq_base + index);
365     if (ret < 0 || ret >= VIRTIO_CMDLINE_MAXLEN) {
366         g_free(cmdline);
367         return NULL;
368     }
369 
370     return cmdline;
371 }
372 
microvm_fix_kernel_cmdline(MachineState * machine)373 static void microvm_fix_kernel_cmdline(MachineState *machine)
374 {
375     X86MachineState *x86ms = X86_MACHINE(machine);
376     MicrovmMachineState *mms = MICROVM_MACHINE(machine);
377     BusState *bus;
378     BusChild *kid;
379     char *cmdline;
380 
381     /*
382      * Find MMIO transports with attached devices, and add them to the kernel
383      * command line.
384      *
385      * Yes, this is a hack, but one that heavily improves the UX without
386      * introducing any significant issues.
387      */
388     cmdline = g_strdup(machine->kernel_cmdline);
389     bus = sysbus_get_default();
390     QTAILQ_FOREACH(kid, &bus->children, sibling) {
391         DeviceState *dev = kid->child;
392 
393         if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MMIO)) {
394             VirtIOMMIOProxy *mmio = VIRTIO_MMIO(OBJECT(dev));
395             VirtioBusState *mmio_virtio_bus = &mmio->bus;
396             BusState *mmio_bus = &mmio_virtio_bus->parent_obj;
397 
398             if (!QTAILQ_EMPTY(&mmio_bus->children)) {
399                 gchar *mmio_cmdline = microvm_get_mmio_cmdline
400                     (mmio_bus->name, mms->virtio_irq_base);
401                 if (mmio_cmdline) {
402                     char *newcmd = g_strjoin(NULL, cmdline, mmio_cmdline, NULL);
403                     g_free(mmio_cmdline);
404                     g_free(cmdline);
405                     cmdline = newcmd;
406                 }
407             }
408         }
409     }
410 
411     fw_cfg_modify_i32(x86ms->fw_cfg, FW_CFG_CMDLINE_SIZE, strlen(cmdline) + 1);
412     fw_cfg_modify_string(x86ms->fw_cfg, FW_CFG_CMDLINE_DATA, cmdline);
413 
414     g_free(cmdline);
415 }
416 
microvm_device_pre_plug_cb(HotplugHandler * hotplug_dev,DeviceState * dev,Error ** errp)417 static void microvm_device_pre_plug_cb(HotplugHandler *hotplug_dev,
418                                        DeviceState *dev, Error **errp)
419 {
420     X86CPU *cpu = X86_CPU(dev);
421 
422     cpu->host_phys_bits = true; /* need reliable phys-bits */
423     x86_cpu_pre_plug(hotplug_dev, dev, errp);
424 }
425 
microvm_device_plug_cb(HotplugHandler * hotplug_dev,DeviceState * dev,Error ** errp)426 static void microvm_device_plug_cb(HotplugHandler *hotplug_dev,
427                                    DeviceState *dev, Error **errp)
428 {
429     x86_cpu_plug(hotplug_dev, dev, errp);
430 }
431 
microvm_device_unplug_request_cb(HotplugHandler * hotplug_dev,DeviceState * dev,Error ** errp)432 static void microvm_device_unplug_request_cb(HotplugHandler *hotplug_dev,
433                                              DeviceState *dev, Error **errp)
434 {
435     error_setg(errp, "unplug not supported by microvm");
436 }
437 
microvm_device_unplug_cb(HotplugHandler * hotplug_dev,DeviceState * dev,Error ** errp)438 static void microvm_device_unplug_cb(HotplugHandler *hotplug_dev,
439                                      DeviceState *dev, Error **errp)
440 {
441     error_setg(errp, "unplug not supported by microvm");
442 }
443 
microvm_get_hotplug_handler(MachineState * machine,DeviceState * dev)444 static HotplugHandler *microvm_get_hotplug_handler(MachineState *machine,
445                                                    DeviceState *dev)
446 {
447     if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) {
448         return HOTPLUG_HANDLER(machine);
449     }
450     return NULL;
451 }
452 
microvm_machine_state_init(MachineState * machine)453 static void microvm_machine_state_init(MachineState *machine)
454 {
455     MicrovmMachineState *mms = MICROVM_MACHINE(machine);
456     X86MachineState *x86ms = X86_MACHINE(machine);
457 
458     microvm_memory_init(mms);
459 
460     x86_cpus_init(x86ms, CPU_VERSION_LATEST);
461 
462     microvm_devices_init(mms);
463 }
464 
microvm_machine_reset(MachineState * machine,ShutdownCause reason)465 static void microvm_machine_reset(MachineState *machine, ShutdownCause reason)
466 {
467     MicrovmMachineState *mms = MICROVM_MACHINE(machine);
468     CPUState *cs;
469     X86CPU *cpu;
470 
471     if (!x86_machine_is_acpi_enabled(X86_MACHINE(machine)) &&
472         machine->kernel_filename != NULL &&
473         mms->auto_kernel_cmdline && !mms->kernel_cmdline_fixed) {
474         microvm_fix_kernel_cmdline(machine);
475         mms->kernel_cmdline_fixed = true;
476     }
477 
478     qemu_devices_reset(reason);
479 
480     CPU_FOREACH(cs) {
481         cpu = X86_CPU(cs);
482 
483         x86_cpu_after_reset(cpu);
484     }
485 }
486 
microvm_machine_get_rtc(Object * obj,Visitor * v,const char * name,void * opaque,Error ** errp)487 static void microvm_machine_get_rtc(Object *obj, Visitor *v, const char *name,
488                                     void *opaque, Error **errp)
489 {
490     MicrovmMachineState *mms = MICROVM_MACHINE(obj);
491     OnOffAuto rtc = mms->rtc;
492 
493     visit_type_OnOffAuto(v, name, &rtc, errp);
494 }
495 
microvm_machine_set_rtc(Object * obj,Visitor * v,const char * name,void * opaque,Error ** errp)496 static void microvm_machine_set_rtc(Object *obj, Visitor *v, const char *name,
497                                     void *opaque, Error **errp)
498 {
499     MicrovmMachineState *mms = MICROVM_MACHINE(obj);
500 
501     visit_type_OnOffAuto(v, name, &mms->rtc, errp);
502 }
503 
microvm_machine_get_pcie(Object * obj,Visitor * v,const char * name,void * opaque,Error ** errp)504 static void microvm_machine_get_pcie(Object *obj, Visitor *v, const char *name,
505                                      void *opaque, Error **errp)
506 {
507     MicrovmMachineState *mms = MICROVM_MACHINE(obj);
508     OnOffAuto pcie = mms->pcie;
509 
510     visit_type_OnOffAuto(v, name, &pcie, errp);
511 }
512 
microvm_machine_set_pcie(Object * obj,Visitor * v,const char * name,void * opaque,Error ** errp)513 static void microvm_machine_set_pcie(Object *obj, Visitor *v, const char *name,
514                                      void *opaque, Error **errp)
515 {
516     MicrovmMachineState *mms = MICROVM_MACHINE(obj);
517 
518     visit_type_OnOffAuto(v, name, &mms->pcie, errp);
519 }
520 
microvm_machine_get_ioapic2(Object * obj,Visitor * v,const char * name,void * opaque,Error ** errp)521 static void microvm_machine_get_ioapic2(Object *obj, Visitor *v, const char *name,
522                                         void *opaque, Error **errp)
523 {
524     MicrovmMachineState *mms = MICROVM_MACHINE(obj);
525     OnOffAuto ioapic2 = mms->ioapic2;
526 
527     visit_type_OnOffAuto(v, name, &ioapic2, errp);
528 }
529 
microvm_machine_set_ioapic2(Object * obj,Visitor * v,const char * name,void * opaque,Error ** errp)530 static void microvm_machine_set_ioapic2(Object *obj, Visitor *v, const char *name,
531                                         void *opaque, Error **errp)
532 {
533     MicrovmMachineState *mms = MICROVM_MACHINE(obj);
534 
535     visit_type_OnOffAuto(v, name, &mms->ioapic2, errp);
536 }
537 
microvm_machine_get_isa_serial(Object * obj,Error ** errp)538 static bool microvm_machine_get_isa_serial(Object *obj, Error **errp)
539 {
540     MicrovmMachineState *mms = MICROVM_MACHINE(obj);
541 
542     return mms->isa_serial;
543 }
544 
microvm_machine_set_isa_serial(Object * obj,bool value,Error ** errp)545 static void microvm_machine_set_isa_serial(Object *obj, bool value,
546                                            Error **errp)
547 {
548     MicrovmMachineState *mms = MICROVM_MACHINE(obj);
549 
550     mms->isa_serial = value;
551 }
552 
microvm_machine_get_option_roms(Object * obj,Error ** errp)553 static bool microvm_machine_get_option_roms(Object *obj, Error **errp)
554 {
555     MicrovmMachineState *mms = MICROVM_MACHINE(obj);
556 
557     return mms->option_roms;
558 }
559 
microvm_machine_set_option_roms(Object * obj,bool value,Error ** errp)560 static void microvm_machine_set_option_roms(Object *obj, bool value,
561                                             Error **errp)
562 {
563     MicrovmMachineState *mms = MICROVM_MACHINE(obj);
564 
565     mms->option_roms = value;
566 }
567 
microvm_machine_get_auto_kernel_cmdline(Object * obj,Error ** errp)568 static bool microvm_machine_get_auto_kernel_cmdline(Object *obj, Error **errp)
569 {
570     MicrovmMachineState *mms = MICROVM_MACHINE(obj);
571 
572     return mms->auto_kernel_cmdline;
573 }
574 
microvm_machine_set_auto_kernel_cmdline(Object * obj,bool value,Error ** errp)575 static void microvm_machine_set_auto_kernel_cmdline(Object *obj, bool value,
576                                                     Error **errp)
577 {
578     MicrovmMachineState *mms = MICROVM_MACHINE(obj);
579 
580     mms->auto_kernel_cmdline = value;
581 }
582 
microvm_machine_done(Notifier * notifier,void * data)583 static void microvm_machine_done(Notifier *notifier, void *data)
584 {
585     MicrovmMachineState *mms = container_of(notifier, MicrovmMachineState,
586                                             machine_done);
587     X86MachineState *x86ms = X86_MACHINE(mms);
588 
589     acpi_setup_microvm(mms);
590     dt_setup_microvm(mms);
591     fw_cfg_add_e820(x86ms->fw_cfg);
592 }
593 
microvm_powerdown_req(Notifier * notifier,void * data)594 static void microvm_powerdown_req(Notifier *notifier, void *data)
595 {
596     MicrovmMachineState *mms = container_of(notifier, MicrovmMachineState,
597                                             powerdown_req);
598     X86MachineState *x86ms = X86_MACHINE(mms);
599 
600     if (x86ms->acpi_dev) {
601         Object *obj = OBJECT(x86ms->acpi_dev);
602         AcpiDeviceIfClass *adevc = ACPI_DEVICE_IF_GET_CLASS(obj);
603         adevc->send_event(ACPI_DEVICE_IF(x86ms->acpi_dev),
604                           ACPI_POWER_DOWN_STATUS);
605     }
606 }
607 
microvm_machine_initfn(Object * obj)608 static void microvm_machine_initfn(Object *obj)
609 {
610     MicrovmMachineState *mms = MICROVM_MACHINE(obj);
611 
612     /* Configuration */
613     mms->rtc = ON_OFF_AUTO_AUTO;
614     mms->pcie = ON_OFF_AUTO_AUTO;
615     mms->ioapic2 = ON_OFF_AUTO_AUTO;
616     mms->isa_serial = true;
617     mms->option_roms = true;
618     mms->auto_kernel_cmdline = true;
619 
620     /* State */
621     mms->kernel_cmdline_fixed = false;
622 
623     mms->machine_done.notify = microvm_machine_done;
624     qemu_add_machine_init_done_notifier(&mms->machine_done);
625     mms->powerdown_req.notify = microvm_powerdown_req;
626     qemu_register_powerdown_notifier(&mms->powerdown_req);
627 }
628 
629 GlobalProperty microvm_properties[] = {
630     /*
631      * pcie host bridge (gpex) on microvm has no io address window,
632      * so reserving io space is not going to work.  Turn it off.
633      */
634     { "pcie-root-port", "io-reserve", "0" },
635 };
636 
microvm_class_init(ObjectClass * oc,void * data)637 static void microvm_class_init(ObjectClass *oc, void *data)
638 {
639     X86MachineClass *x86mc = X86_MACHINE_CLASS(oc);
640     MachineClass *mc = MACHINE_CLASS(oc);
641     HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc);
642 
643     mc->init = microvm_machine_state_init;
644 
645     mc->family = "microvm_i386";
646     mc->desc = "microvm (i386)";
647     mc->units_per_default_bus = 1;
648     mc->no_floppy = 1;
649     mc->max_cpus = 288;
650     mc->has_hotpluggable_cpus = false;
651     mc->auto_enable_numa_with_memhp = false;
652     mc->auto_enable_numa_with_memdev = false;
653     mc->default_cpu_type = TARGET_DEFAULT_CPU_TYPE;
654     mc->nvdimm_supported = false;
655     mc->default_ram_id = "microvm.ram";
656 
657     /* Avoid relying too much on kernel components */
658     mc->default_kernel_irqchip_split = true;
659 
660     /* Machine class handlers */
661     mc->reset = microvm_machine_reset;
662 
663     /* hotplug (for cpu coldplug) */
664     mc->get_hotplug_handler = microvm_get_hotplug_handler;
665     hc->pre_plug = microvm_device_pre_plug_cb;
666     hc->plug = microvm_device_plug_cb;
667     hc->unplug_request = microvm_device_unplug_request_cb;
668     hc->unplug = microvm_device_unplug_cb;
669 
670     x86mc->fwcfg_dma_enabled = true;
671 
672     object_class_property_add(oc, MICROVM_MACHINE_RTC, "OnOffAuto",
673                               microvm_machine_get_rtc,
674                               microvm_machine_set_rtc,
675                               NULL, NULL);
676     object_class_property_set_description(oc, MICROVM_MACHINE_RTC,
677         "Enable MC146818 RTC");
678 
679     object_class_property_add(oc, MICROVM_MACHINE_PCIE, "OnOffAuto",
680                               microvm_machine_get_pcie,
681                               microvm_machine_set_pcie,
682                               NULL, NULL);
683     object_class_property_set_description(oc, MICROVM_MACHINE_PCIE,
684         "Enable PCIe");
685 
686     object_class_property_add(oc, MICROVM_MACHINE_IOAPIC2, "OnOffAuto",
687                               microvm_machine_get_ioapic2,
688                               microvm_machine_set_ioapic2,
689                               NULL, NULL);
690     object_class_property_set_description(oc, MICROVM_MACHINE_IOAPIC2,
691         "Enable second IO-APIC");
692 
693     object_class_property_add_bool(oc, MICROVM_MACHINE_ISA_SERIAL,
694                                    microvm_machine_get_isa_serial,
695                                    microvm_machine_set_isa_serial);
696     object_class_property_set_description(oc, MICROVM_MACHINE_ISA_SERIAL,
697         "Set off to disable the instantiation an ISA serial port");
698 
699     object_class_property_add_bool(oc, MICROVM_MACHINE_OPTION_ROMS,
700                                    microvm_machine_get_option_roms,
701                                    microvm_machine_set_option_roms);
702     object_class_property_set_description(oc, MICROVM_MACHINE_OPTION_ROMS,
703         "Set off to disable loading option ROMs");
704 
705     object_class_property_add_bool(oc, MICROVM_MACHINE_AUTO_KERNEL_CMDLINE,
706                                    microvm_machine_get_auto_kernel_cmdline,
707                                    microvm_machine_set_auto_kernel_cmdline);
708     object_class_property_set_description(oc,
709         MICROVM_MACHINE_AUTO_KERNEL_CMDLINE,
710         "Set off to disable adding virtio-mmio devices to the kernel cmdline");
711 
712     machine_class_allow_dynamic_sysbus_dev(mc, TYPE_RAMFB_DEVICE);
713 
714     compat_props_add(mc->compat_props, microvm_properties,
715                      G_N_ELEMENTS(microvm_properties));
716 }
717 
718 static const TypeInfo microvm_machine_info = {
719     .name          = TYPE_MICROVM_MACHINE,
720     .parent        = TYPE_X86_MACHINE,
721     .instance_size = sizeof(MicrovmMachineState),
722     .instance_init = microvm_machine_initfn,
723     .class_size    = sizeof(MicrovmMachineClass),
724     .class_init    = microvm_class_init,
725     .interfaces = (InterfaceInfo[]) {
726          { TYPE_HOTPLUG_HANDLER },
727          { }
728     },
729 };
730 
microvm_machine_init(void)731 static void microvm_machine_init(void)
732 {
733     type_register_static(&microvm_machine_info);
734 }
735 type_init(microvm_machine_init);
736