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Searched defs:mmOTG1_OTG_GSL_CONTROL_BASE_IDX (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h5076 #define mmOTG1_OTG_GSL_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_3_offset.h4462 #define mmOTG1_OTG_GSL_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_1_offset.h6875 #define mmOTG1_OTG_GSL_CONTROL_BASE_IDX … macro
H A Ddcn_1_0_offset.h6678 #define mmOTG1_OTG_GSL_CONTROL_BASE_IDX … macro
H A Ddcn_2_1_0_offset.h8328 #define mmOTG1_OTG_GSL_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_2_offset.h8204 #define mmOTG1_OTG_GSL_CONTROL_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h9359 #define mmOTG1_OTG_GSL_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_0_offset.h9052 #define mmOTG1_OTG_GSL_CONTROL_BASE_IDX … macro