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Searched defs:mmMCIF_WB1_MCIF_WB_SELF_REFRESH_CONTROL_BASE_IDX (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h1557 #define mmMCIF_WB1_MCIF_WB_SELF_REFRESH_CONTROL_BASE_IDX … macro
H A Ddcn_2_1_0_offset.h1143 #define mmMCIF_WB1_MCIF_WB_SELF_REFRESH_CONTROL_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h1181 #define mmMCIF_WB1_MCIF_WB_SELF_REFRESH_CONTROL_BASE_IDX … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_offset.h393 #define mmMCIF_WB1_MCIF_WB_SELF_REFRESH_CONTROL_BASE_IDX … macro