1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2002
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 */
6
7 #include <common.h>
8
9 /* Memory test
10 *
11 * General observations:
12 * o The recommended test sequence is to test the data lines: if they are
13 * broken, nothing else will work properly. Then test the address
14 * lines. Finally, test the cells in the memory now that the test
15 * program knows that the address and data lines work properly.
16 * This sequence also helps isolate and identify what is faulty.
17 *
18 * o For the address line test, it is a good idea to use the base
19 * address of the lowest memory location, which causes a '1' bit to
20 * walk through a field of zeros on the address lines and the highest
21 * memory location, which causes a '0' bit to walk through a field of
22 * '1's on the address line.
23 *
24 * o Floating buses can fool memory tests if the test routine writes
25 * a value and then reads it back immediately. The problem is, the
26 * write will charge the residual capacitance on the data bus so the
27 * bus retains its state briefely. When the test program reads the
28 * value back immediately, the capacitance of the bus can allow it
29 * to read back what was written, even though the memory circuitry
30 * is broken. To avoid this, the test program should write a test
31 * pattern to the target location, write a different pattern elsewhere
32 * to charge the residual capacitance in a differnt manner, then read
33 * the target location back.
34 *
35 * o Always read the target location EXACTLY ONCE and save it in a local
36 * variable. The problem with reading the target location more than
37 * once is that the second and subsequent reads may work properly,
38 * resulting in a failed test that tells the poor technician that
39 * "Memory error at 00000000, wrote aaaaaaaa, read aaaaaaaa" which
40 * doesn't help him one bit and causes puzzled phone calls. Been there,
41 * done that.
42 *
43 * Data line test:
44 * ---------------
45 * This tests data lines for shorts and opens by forcing adjacent data
46 * to opposite states. Because the data lines could be routed in an
47 * arbitrary manner the must ensure test patterns ensure that every case
48 * is tested. By using the following series of binary patterns every
49 * combination of adjacent bits is test regardless of routing.
50 *
51 * ...101010101010101010101010
52 * ...110011001100110011001100
53 * ...111100001111000011110000
54 * ...111111110000000011111111
55 *
56 * Carrying this out, gives us six hex patterns as follows:
57 *
58 * 0xaaaaaaaaaaaaaaaa
59 * 0xcccccccccccccccc
60 * 0xf0f0f0f0f0f0f0f0
61 * 0xff00ff00ff00ff00
62 * 0xffff0000ffff0000
63 * 0xffffffff00000000
64 *
65 * To test for short and opens to other signals on our boards, we
66 * simply test with the 1's complemnt of the paterns as well, resulting
67 * in twelve patterns total.
68 *
69 * After writing a test pattern. a special pattern 0x0123456789ABCDEF is
70 * written to a different address in case the data lines are floating.
71 * Thus, if a byte lane fails, you will see part of the special
72 * pattern in that byte lane when the test runs. For example, if the
73 * xx__xxxxxxxxxxxx byte line fails, you will see aa23aaaaaaaaaaaa
74 * (for the 'a' test pattern).
75 *
76 * Address line test:
77 * ------------------
78 * This function performs a test to verify that all the address lines
79 * hooked up to the RAM work properly. If there is an address line
80 * fault, it usually shows up as two different locations in the address
81 * map (related by the faulty address line) mapping to one physical
82 * memory storage location. The artifact that shows up is writing to
83 * the first location "changes" the second location.
84 *
85 * To test all address lines, we start with the given base address and
86 * xor the address with a '1' bit to flip one address line. For each
87 * test, we shift the '1' bit left to test the next address line.
88 *
89 * In the actual code, we start with address sizeof(ulong) since our
90 * test pattern we use is a ulong and thus, if we tried to test lower
91 * order address bits, it wouldn't work because our pattern would
92 * overwrite itself.
93 *
94 * Example for a 4 bit address space with the base at 0000:
95 * 0000 <- base
96 * 0001 <- test 1
97 * 0010 <- test 2
98 * 0100 <- test 3
99 * 1000 <- test 4
100 * Example for a 4 bit address space with the base at 0010:
101 * 0010 <- base
102 * 0011 <- test 1
103 * 0000 <- (below the base address, skipped)
104 * 0110 <- test 2
105 * 1010 <- test 3
106 *
107 * The test locations are successively tested to make sure that they are
108 * not "mirrored" onto the base address due to a faulty address line.
109 * Note that the base and each test location are related by one address
110 * line flipped. Note that the base address need not be all zeros.
111 *
112 * Memory tests 1-4:
113 * -----------------
114 * These tests verify RAM using sequential writes and reads
115 * to/from RAM. There are several test cases that use different patterns to
116 * verify RAM. Each test case fills a region of RAM with one pattern and
117 * then reads the region back and compares its contents with the pattern.
118 * The following patterns are used:
119 *
120 * 1a) zero pattern (0x00000000)
121 * 1b) negative pattern (0xffffffff)
122 * 1c) checkerboard pattern (0x55555555)
123 * 1d) checkerboard pattern (0xaaaaaaaa)
124 * 2) bit-flip pattern ((1 << (offset % 32))
125 * 3) address pattern (offset)
126 * 4) address pattern (~offset)
127 *
128 * Being run in normal mode, the test verifies only small 4Kb
129 * regions of RAM around each 1Mb boundary. For example, for 64Mb
130 * RAM the following areas are verified: 0x00000000-0x00000800,
131 * 0x000ff800-0x00100800, 0x001ff800-0x00200800, ..., 0x03fff800-
132 * 0x04000000. If the test is run in slow-test mode, it verifies
133 * the whole RAM.
134 */
135
136 #include <post.h>
137 #include <watchdog.h>
138
139 #if CONFIG_POST & (CONFIG_SYS_POST_MEMORY | CONFIG_SYS_POST_MEM_REGIONS)
140
141 DECLARE_GLOBAL_DATA_PTR;
142
143 /*
144 * Define INJECT_*_ERRORS for testing error detection in the presence of
145 * _good_ hardware.
146 */
147 #undef INJECT_DATA_ERRORS
148 #undef INJECT_ADDRESS_ERRORS
149
150 #ifdef INJECT_DATA_ERRORS
151 #warning "Injecting data line errors for testing purposes"
152 #endif
153
154 #ifdef INJECT_ADDRESS_ERRORS
155 #warning "Injecting address line errors for testing purposes"
156 #endif
157
158
159 /*
160 * This function performs a double word move from the data at
161 * the source pointer to the location at the destination pointer.
162 * This is helpful for testing memory on processors which have a 64 bit
163 * wide data bus.
164 *
165 * On those PowerPC with FPU, use assembly and a floating point move:
166 * this does a 64 bit move.
167 *
168 * For other processors, let the compiler generate the best code it can.
169 */
move64(const unsigned long long * src,unsigned long long * dest)170 static void move64(const unsigned long long *src, unsigned long long *dest)
171 {
172 *dest = *src;
173 }
174
175 /*
176 * This is 64 bit wide test patterns. Note that they reside in ROM
177 * (which presumably works) and the tests write them to RAM which may
178 * not work.
179 *
180 * The "otherpattern" is written to drive the data bus to values other
181 * than the test pattern. This is for detecting floating bus lines.
182 *
183 */
184 const static unsigned long long pattern[] = {
185 0xaaaaaaaaaaaaaaaaULL,
186 0xccccccccccccccccULL,
187 0xf0f0f0f0f0f0f0f0ULL,
188 0xff00ff00ff00ff00ULL,
189 0xffff0000ffff0000ULL,
190 0xffffffff00000000ULL,
191 0x00000000ffffffffULL,
192 0x0000ffff0000ffffULL,
193 0x00ff00ff00ff00ffULL,
194 0x0f0f0f0f0f0f0f0fULL,
195 0x3333333333333333ULL,
196 0x5555555555555555ULL
197 };
198 const unsigned long long otherpattern = 0x0123456789abcdefULL;
199
200
memory_post_dataline(unsigned long long * pmem)201 static int memory_post_dataline(unsigned long long * pmem)
202 {
203 unsigned long long temp64 = 0;
204 int num_patterns = ARRAY_SIZE(pattern);
205 int i;
206 unsigned int hi, lo, pathi, patlo;
207 int ret = 0;
208
209 for ( i = 0; i < num_patterns; i++) {
210 move64(&(pattern[i]), pmem++);
211 /*
212 * Put a different pattern on the data lines: otherwise they
213 * may float long enough to read back what we wrote.
214 */
215 move64(&otherpattern, pmem--);
216 move64(pmem, &temp64);
217
218 #ifdef INJECT_DATA_ERRORS
219 temp64 ^= 0x00008000;
220 #endif
221
222 if (temp64 != pattern[i]){
223 pathi = (pattern[i]>>32) & 0xffffffff;
224 patlo = pattern[i] & 0xffffffff;
225
226 hi = (temp64>>32) & 0xffffffff;
227 lo = temp64 & 0xffffffff;
228
229 post_log("Memory (data line) error at %08x, "
230 "wrote %08x%08x, read %08x%08x !\n",
231 pmem, pathi, patlo, hi, lo);
232 ret = -1;
233 }
234 }
235 return ret;
236 }
237
memory_post_addrline(ulong * testaddr,ulong * base,ulong size)238 static int memory_post_addrline(ulong *testaddr, ulong *base, ulong size)
239 {
240 ulong *target;
241 ulong *end;
242 ulong readback;
243 ulong xor;
244 int ret = 0;
245
246 end = (ulong *)((ulong)base + size); /* pointer arith! */
247 xor = 0;
248 for(xor = sizeof(ulong); xor > 0; xor <<= 1) {
249 target = (ulong *)((ulong)testaddr ^ xor);
250 if((target >= base) && (target < end)) {
251 *testaddr = ~*target;
252 readback = *target;
253
254 #ifdef INJECT_ADDRESS_ERRORS
255 if(xor == 0x00008000) {
256 readback = *testaddr;
257 }
258 #endif
259 if(readback == *testaddr) {
260 post_log("Memory (address line) error at %08x<->%08x, "
261 "XOR value %08x !\n",
262 testaddr, target, xor);
263 ret = -1;
264 }
265 }
266 }
267 return ret;
268 }
269
memory_post_test1(unsigned long start,unsigned long size,unsigned long val)270 static int memory_post_test1(unsigned long start,
271 unsigned long size,
272 unsigned long val)
273 {
274 unsigned long i;
275 ulong *mem = (ulong *) start;
276 ulong readback;
277 int ret = 0;
278
279 for (i = 0; i < size / sizeof (ulong); i++) {
280 mem[i] = val;
281 if (i % 1024 == 0)
282 WATCHDOG_RESET();
283 }
284
285 for (i = 0; i < size / sizeof (ulong) && !ret; i++) {
286 readback = mem[i];
287 if (readback != val) {
288 post_log("Memory error at %08x, "
289 "wrote %08x, read %08x !\n",
290 mem + i, val, readback);
291
292 ret = -1;
293 break;
294 }
295 if (i % 1024 == 0)
296 WATCHDOG_RESET();
297 }
298
299 return ret;
300 }
301
memory_post_test2(unsigned long start,unsigned long size)302 static int memory_post_test2(unsigned long start, unsigned long size)
303 {
304 unsigned long i;
305 ulong *mem = (ulong *) start;
306 ulong readback;
307 int ret = 0;
308
309 for (i = 0; i < size / sizeof (ulong); i++) {
310 mem[i] = 1 << (i % 32);
311 if (i % 1024 == 0)
312 WATCHDOG_RESET();
313 }
314
315 for (i = 0; i < size / sizeof (ulong) && !ret; i++) {
316 readback = mem[i];
317 if (readback != (1 << (i % 32))) {
318 post_log("Memory error at %08x, "
319 "wrote %08x, read %08x !\n",
320 mem + i, 1 << (i % 32), readback);
321
322 ret = -1;
323 break;
324 }
325 if (i % 1024 == 0)
326 WATCHDOG_RESET();
327 }
328
329 return ret;
330 }
331
memory_post_test3(unsigned long start,unsigned long size)332 static int memory_post_test3(unsigned long start, unsigned long size)
333 {
334 unsigned long i;
335 ulong *mem = (ulong *) start;
336 ulong readback;
337 int ret = 0;
338
339 for (i = 0; i < size / sizeof (ulong); i++) {
340 mem[i] = i;
341 if (i % 1024 == 0)
342 WATCHDOG_RESET();
343 }
344
345 for (i = 0; i < size / sizeof (ulong) && !ret; i++) {
346 readback = mem[i];
347 if (readback != i) {
348 post_log("Memory error at %08x, "
349 "wrote %08x, read %08x !\n",
350 mem + i, i, readback);
351
352 ret = -1;
353 break;
354 }
355 if (i % 1024 == 0)
356 WATCHDOG_RESET();
357 }
358
359 return ret;
360 }
361
memory_post_test4(unsigned long start,unsigned long size)362 static int memory_post_test4(unsigned long start, unsigned long size)
363 {
364 unsigned long i;
365 ulong *mem = (ulong *) start;
366 ulong readback;
367 int ret = 0;
368
369 for (i = 0; i < size / sizeof (ulong); i++) {
370 mem[i] = ~i;
371 if (i % 1024 == 0)
372 WATCHDOG_RESET();
373 }
374
375 for (i = 0; i < size / sizeof (ulong) && !ret; i++) {
376 readback = mem[i];
377 if (readback != ~i) {
378 post_log("Memory error at %08x, "
379 "wrote %08x, read %08x !\n",
380 mem + i, ~i, readback);
381
382 ret = -1;
383 break;
384 }
385 if (i % 1024 == 0)
386 WATCHDOG_RESET();
387 }
388
389 return ret;
390 }
391
memory_post_test_lines(unsigned long start,unsigned long size)392 static int memory_post_test_lines(unsigned long start, unsigned long size)
393 {
394 int ret = 0;
395
396 ret = memory_post_dataline((unsigned long long *)start);
397 WATCHDOG_RESET();
398 if (!ret)
399 ret = memory_post_addrline((ulong *)start, (ulong *)start,
400 size);
401 WATCHDOG_RESET();
402 if (!ret)
403 ret = memory_post_addrline((ulong *)(start+size-8),
404 (ulong *)start, size);
405 WATCHDOG_RESET();
406
407 return ret;
408 }
409
memory_post_test_patterns(unsigned long start,unsigned long size)410 static int memory_post_test_patterns(unsigned long start, unsigned long size)
411 {
412 int ret = 0;
413
414 ret = memory_post_test1(start, size, 0x00000000);
415 WATCHDOG_RESET();
416 if (!ret)
417 ret = memory_post_test1(start, size, 0xffffffff);
418 WATCHDOG_RESET();
419 if (!ret)
420 ret = memory_post_test1(start, size, 0x55555555);
421 WATCHDOG_RESET();
422 if (!ret)
423 ret = memory_post_test1(start, size, 0xaaaaaaaa);
424 WATCHDOG_RESET();
425 if (!ret)
426 ret = memory_post_test2(start, size);
427 WATCHDOG_RESET();
428 if (!ret)
429 ret = memory_post_test3(start, size);
430 WATCHDOG_RESET();
431 if (!ret)
432 ret = memory_post_test4(start, size);
433 WATCHDOG_RESET();
434
435 return ret;
436 }
437
memory_post_test_regions(unsigned long start,unsigned long size)438 static int memory_post_test_regions(unsigned long start, unsigned long size)
439 {
440 unsigned long i;
441 int ret = 0;
442
443 for (i = 0; i < (size >> 20) && (!ret); i++) {
444 if (!ret)
445 ret = memory_post_test_patterns(start + (i << 20),
446 0x800);
447 if (!ret)
448 ret = memory_post_test_patterns(start + (i << 20) +
449 0xff800, 0x800);
450 }
451
452 return ret;
453 }
454
memory_post_tests(unsigned long start,unsigned long size)455 static int memory_post_tests(unsigned long start, unsigned long size)
456 {
457 int ret = 0;
458
459 ret = memory_post_test_lines(start, size);
460 if (!ret)
461 ret = memory_post_test_patterns(start, size);
462
463 return ret;
464 }
465
466 /*
467 * !! this is only valid, if you have contiguous memory banks !!
468 */
469 __attribute__((weak))
arch_memory_test_prepare(u32 * vstart,u32 * size,phys_addr_t * phys_offset)470 int arch_memory_test_prepare(u32 *vstart, u32 *size, phys_addr_t *phys_offset)
471 {
472 bd_t *bd = gd->bd;
473
474 *vstart = CONFIG_SYS_SDRAM_BASE;
475 *size = (gd->ram_size >= 256 << 20 ?
476 256 << 20 : gd->ram_size) - (1 << 20);
477
478 /* Limit area to be tested with the board info struct */
479 if ((*vstart) + (*size) > (ulong)bd)
480 *size = (ulong)bd - *vstart;
481
482 return 0;
483 }
484
485 __attribute__((weak))
arch_memory_test_advance(u32 * vstart,u32 * size,phys_addr_t * phys_offset)486 int arch_memory_test_advance(u32 *vstart, u32 *size, phys_addr_t *phys_offset)
487 {
488 return 1;
489 }
490
491 __attribute__((weak))
arch_memory_test_cleanup(u32 * vstart,u32 * size,phys_addr_t * phys_offset)492 int arch_memory_test_cleanup(u32 *vstart, u32 *size, phys_addr_t *phys_offset)
493 {
494 return 0;
495 }
496
497 __attribute__((weak))
arch_memory_failure_handle(void)498 void arch_memory_failure_handle(void)
499 {
500 return;
501 }
502
memory_regions_post_test(int flags)503 int memory_regions_post_test(int flags)
504 {
505 int ret = 0;
506 phys_addr_t phys_offset = 0;
507 u32 memsize, vstart;
508
509 arch_memory_test_prepare(&vstart, &memsize, &phys_offset);
510
511 ret = memory_post_test_lines(vstart, memsize);
512 if (!ret)
513 ret = memory_post_test_regions(vstart, memsize);
514
515 return ret;
516 }
517
memory_post_test(int flags)518 int memory_post_test(int flags)
519 {
520 int ret = 0;
521 phys_addr_t phys_offset = 0;
522 u32 memsize, vstart;
523
524 arch_memory_test_prepare(&vstart, &memsize, &phys_offset);
525
526 do {
527 if (flags & POST_SLOWTEST) {
528 ret = memory_post_tests(vstart, memsize);
529 } else { /* POST_NORMAL */
530 ret = memory_post_test_regions(vstart, memsize);
531 }
532 } while (!ret &&
533 !arch_memory_test_advance(&vstart, &memsize, &phys_offset));
534
535 arch_memory_test_cleanup(&vstart, &memsize, &phys_offset);
536 if (ret)
537 arch_memory_failure_handle();
538
539 return ret;
540 }
541
542 #endif /* CONFIG_POST&(CONFIG_SYS_POST_MEMORY|CONFIG_SYS_POST_MEM_REGIONS) */
543