1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2015-2016 Socionext Inc.
4 * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
5 */
6
7 #include <common.h>
8 #include <debug_uart.h>
9 #include <spl.h>
10
11 #include "init.h"
12 #include "micro-support-card.h"
13 #include "soc-info.h"
14
15 struct uniphier_spl_initdata {
16 unsigned int soc_id;
17 void (*bcu_init)(const struct uniphier_board_data *bd);
18 void (*early_clk_init)(void);
19 int (*dpll_init)(const struct uniphier_board_data *bd);
20 int (*memconf_init)(const struct uniphier_board_data *bd);
21 void (*dram_clk_init)(void);
22 int (*umc_init)(const struct uniphier_board_data *bd);
23 };
24
25 static const struct uniphier_spl_initdata uniphier_spl_initdata[] = {
26 #if defined(CONFIG_ARCH_UNIPHIER_LD4)
27 {
28 .soc_id = UNIPHIER_LD4_ID,
29 .bcu_init = uniphier_ld4_bcu_init,
30 .early_clk_init = uniphier_ld4_early_clk_init,
31 .dpll_init = uniphier_ld4_dpll_init,
32 .memconf_init = uniphier_memconf_2ch_init,
33 .dram_clk_init = uniphier_ld4_dram_clk_init,
34 .umc_init = uniphier_ld4_umc_init,
35 },
36 #endif
37 #if defined(CONFIG_ARCH_UNIPHIER_PRO4)
38 {
39 .soc_id = UNIPHIER_PRO4_ID,
40 .early_clk_init = uniphier_ld4_early_clk_init,
41 .dpll_init = uniphier_pro4_dpll_init,
42 .memconf_init = uniphier_memconf_2ch_init,
43 .dram_clk_init = uniphier_ld4_dram_clk_init,
44 .umc_init = uniphier_pro4_umc_init,
45 },
46 #endif
47 #if defined(CONFIG_ARCH_UNIPHIER_SLD8)
48 {
49 .soc_id = UNIPHIER_SLD8_ID,
50 .bcu_init = uniphier_ld4_bcu_init,
51 .early_clk_init = uniphier_ld4_early_clk_init,
52 .dpll_init = uniphier_sld8_dpll_init,
53 .memconf_init = uniphier_memconf_2ch_init,
54 .dram_clk_init = uniphier_ld4_dram_clk_init,
55 .umc_init = uniphier_sld8_umc_init,
56 },
57 #endif
58 #if defined(CONFIG_ARCH_UNIPHIER_PRO5)
59 {
60 .soc_id = UNIPHIER_PRO5_ID,
61 .early_clk_init = uniphier_ld4_early_clk_init,
62 .dpll_init = uniphier_pro5_dpll_init,
63 .memconf_init = uniphier_memconf_2ch_init,
64 .dram_clk_init = uniphier_pro5_dram_clk_init,
65 .umc_init = uniphier_pro5_umc_init,
66 },
67 #endif
68 #if defined(CONFIG_ARCH_UNIPHIER_PXS2)
69 {
70 .soc_id = UNIPHIER_PXS2_ID,
71 .early_clk_init = uniphier_ld4_early_clk_init,
72 .dpll_init = uniphier_pxs2_dpll_init,
73 .memconf_init = uniphier_memconf_3ch_init,
74 .dram_clk_init = uniphier_pxs2_dram_clk_init,
75 .umc_init = uniphier_pxs2_umc_init,
76 },
77 #endif
78 #if defined(CONFIG_ARCH_UNIPHIER_LD6B)
79 {
80 .soc_id = UNIPHIER_LD6B_ID,
81 .early_clk_init = uniphier_ld4_early_clk_init,
82 .dpll_init = uniphier_pxs2_dpll_init,
83 .memconf_init = uniphier_memconf_3ch_init,
84 .dram_clk_init = uniphier_pxs2_dram_clk_init,
85 .umc_init = uniphier_pxs2_umc_init,
86 },
87 #endif
88 };
UNIPHIER_DEFINE_SOCDATA_FUNC(uniphier_get_spl_initdata,uniphier_spl_initdata)89 UNIPHIER_DEFINE_SOCDATA_FUNC(uniphier_get_spl_initdata, uniphier_spl_initdata)
90
91 void spl_board_init(void)
92 {
93 const struct uniphier_board_data *bd;
94 const struct uniphier_spl_initdata *initdata;
95 int ret;
96
97 #ifdef CONFIG_DEBUG_UART
98 debug_uart_init();
99 #endif
100
101 bd = uniphier_get_board_param();
102 if (!bd)
103 hang();
104
105 initdata = uniphier_get_spl_initdata();
106 if (!initdata)
107 hang();
108
109 if (initdata->bcu_init)
110 initdata->bcu_init(bd);
111
112 initdata->early_clk_init();
113
114 #ifdef CONFIG_SPL_SERIAL_SUPPORT
115 preloader_console_init();
116 #endif
117
118 ret = initdata->dpll_init(bd);
119 if (ret) {
120 pr_err("failed to init DPLL\n");
121 hang();
122 }
123
124 ret = initdata->memconf_init(bd);
125 if (ret) {
126 pr_err("failed to init MEMCONF\n");
127 hang();
128 }
129
130 initdata->dram_clk_init();
131
132 ret = initdata->umc_init(bd);
133 if (ret) {
134 pr_err("failed to init DRAM\n");
135 hang();
136 }
137 }
138