xref: /openbmc/linux/arch/mips/lantiq/falcon/reset.c (revision d2912cb1) 
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  *
4  * Copyright (C) 2012 Thomas Langer <thomas.langer@lantiq.com>
5  * Copyright (C) 2012 John Crispin <john@phrozen.org>
6  */
7 
8 #include <linux/init.h>
9 #include <linux/io.h>
10 #include <linux/pm.h>
11 #include <asm/reboot.h>
12 #include <linux/export.h>
13 
14 #include <lantiq_soc.h>
15 
16 /*
17  * Dummy implementation.  Used to allow platform code to find out what
18  * source was booted from
19  */
ltq_boot_select(void)20 unsigned char ltq_boot_select(void)
21 {
22 	return BS_SPI;
23 }
24 
25 #define BOOT_REG_BASE	(KSEG1 | 0x1F200000)
26 #define BOOT_PW1_REG	(BOOT_REG_BASE | 0x20)
27 #define BOOT_PW2_REG	(BOOT_REG_BASE | 0x24)
28 #define BOOT_PW1	0x4C545100
29 #define BOOT_PW2	0x0051544C
30 
31 #define WDT_REG_BASE	(KSEG1 | 0x1F8803F0)
32 #define WDT_PW1		0x00BE0000
33 #define WDT_PW2		0x00DC0000
34 
machine_restart(char * command)35 static void machine_restart(char *command)
36 {
37 	local_irq_disable();
38 
39 	/* reboot magic */
40 	ltq_w32(BOOT_PW1, (void *)BOOT_PW1_REG); /* 'LTQ\0' */
41 	ltq_w32(BOOT_PW2, (void *)BOOT_PW2_REG); /* '\0QTL' */
42 	ltq_w32(0, (void *)BOOT_REG_BASE); /* reset Bootreg RVEC */
43 
44 	/* watchdog magic */
45 	ltq_w32(WDT_PW1, (void *)WDT_REG_BASE);
46 	ltq_w32(WDT_PW2 |
47 		(0x3 << 26) | /* PWL */
48 		(0x2 << 24) | /* CLKDIV */
49 		(0x1 << 31) | /* enable */
50 		(1), /* reload */
51 		(void *)WDT_REG_BASE);
52 	unreachable();
53 }
54 
machine_halt(void)55 static void machine_halt(void)
56 {
57 	local_irq_disable();
58 	unreachable();
59 }
60 
machine_power_off(void)61 static void machine_power_off(void)
62 {
63 	local_irq_disable();
64 	unreachable();
65 }
66 
mips_reboot_setup(void)67 static int __init mips_reboot_setup(void)
68 {
69 	_machine_restart = machine_restart;
70 	_machine_halt = machine_halt;
71 	pm_power_off = machine_power_off;
72 	return 0;
73 }
74 
75 arch_initcall(mips_reboot_setup);
76