xref: /openbmc/qemu/include/hw/misc/mchp_pfsoc_ioscb.h (revision d6271b657286de80260413684a1f2a63f44ea17b)
1  /*
2   * Microchip PolarFire SoC IOSCB module emulation
3   *
4   * Copyright (c) 2020 Wind River Systems, Inc.
5   *
6   * Author:
7   *   Bin Meng <bin.meng@windriver.com>
8   *
9   * This program is free software; you can redistribute it and/or
10   * modify it under the terms of the GNU General Public License as
11   * published by the Free Software Foundation; either version 2 or
12   * (at your option) version 3 of the License.
13   *
14   * This program is distributed in the hope that it will be useful,
15   * but WITHOUT ANY WARRANTY; without even the implied warranty of
16   * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17   * GNU General Public License for more details.
18   *
19   * You should have received a copy of the GNU General Public License along
20   * with this program; if not, see <http://www.gnu.org/licenses/>.
21   */
22  
23  #ifndef MCHP_PFSOC_IOSCB_H
24  #define MCHP_PFSOC_IOSCB_H
25  
26  #include "hw/sysbus.h"
27  
28  typedef struct MchpPfSoCIoscbState {
29      SysBusDevice parent;
30      MemoryRegion container;
31      MemoryRegion lane01;
32      MemoryRegion lane23;
33      MemoryRegion ctrl;
34      MemoryRegion qspixip;
35      MemoryRegion mailbox;
36      MemoryRegion cfg;
37      MemoryRegion ccc;
38      MemoryRegion pll_mss;
39      MemoryRegion cfm_mss;
40      MemoryRegion pll_ddr;
41      MemoryRegion bc_ddr;
42      MemoryRegion io_calib_ddr;
43      MemoryRegion pll_sgmii;
44      MemoryRegion dll_sgmii;
45      MemoryRegion cfm_sgmii;
46      MemoryRegion bc_sgmii;
47      MemoryRegion io_calib_sgmii;
48      qemu_irq irq;
49  } MchpPfSoCIoscbState;
50  
51  #define TYPE_MCHP_PFSOC_IOSCB "mchp.pfsoc.ioscb"
52  
53  #define MCHP_PFSOC_IOSCB(obj) \
54      OBJECT_CHECK(MchpPfSoCIoscbState, (obj), TYPE_MCHP_PFSOC_IOSCB)
55  
56  #endif /* MCHP_PFSOC_IOSCB_H */
57