1 /*
2 * x86 KVM CPU type initialization
3 *
4 * Copyright 2021 SUSE LLC
5 *
6 * This work is licensed under the terms of the GNU GPL, version 2 or later.
7 * See the COPYING file in the top-level directory.
8 */
9
10 #include "qemu/osdep.h"
11 #include "cpu.h"
12 #include "host-cpu.h"
13 #include "qapi/error.h"
14 #include "system/system.h"
15 #include "hw/boards.h"
16
17 #include "kvm_i386.h"
18 #include "accel/accel-cpu-target.h"
19
kvm_set_guest_phys_bits(CPUState * cs)20 static void kvm_set_guest_phys_bits(CPUState *cs)
21 {
22 X86CPU *cpu = X86_CPU(cs);
23 uint32_t eax, guest_phys_bits;
24
25 eax = kvm_arch_get_supported_cpuid(cs->kvm_state, 0x80000008, 0, R_EAX);
26 guest_phys_bits = (eax >> 16) & 0xff;
27 if (!guest_phys_bits) {
28 return;
29 }
30 cpu->guest_phys_bits = guest_phys_bits;
31 if (cpu->guest_phys_bits > cpu->phys_bits) {
32 cpu->guest_phys_bits = cpu->phys_bits;
33 }
34
35 if (cpu->host_phys_bits && cpu->host_phys_bits_limit &&
36 cpu->guest_phys_bits > cpu->host_phys_bits_limit) {
37 cpu->guest_phys_bits = cpu->host_phys_bits_limit;
38 }
39 }
40
kvm_cpu_realizefn(CPUState * cs,Error ** errp)41 static bool kvm_cpu_realizefn(CPUState *cs, Error **errp)
42 {
43 X86CPU *cpu = X86_CPU(cs);
44 X86CPUClass *xcc = X86_CPU_GET_CLASS(cpu);
45 CPUX86State *env = &cpu->env;
46 bool ret;
47
48 /*
49 * The realize order is important, since x86_cpu_realize() checks if
50 * nothing else has been set by the user (or by accelerators) in
51 * cpu->ucode_rev and cpu->phys_bits, and updates the CPUID results in
52 * mwait.ecx.
53 * This accel realization code also assumes cpu features are already expanded.
54 *
55 * realize order:
56 *
57 * x86_cpu_realizefn():
58 * x86_cpu_expand_features()
59 * cpu_exec_realizefn():
60 * accel_cpu_common_realize()
61 * kvm_cpu_realizefn()
62 * host_cpu_realizefn()
63 * kvm_set_guest_phys_bits()
64 * check/update ucode_rev, phys_bits, guest_phys_bits, mwait
65 * cpu_common_realizefn() (via xcc->parent_realize)
66 */
67 if (xcc->max_features) {
68 if (enable_cpu_pm) {
69 if (kvm_has_waitpkg()) {
70 env->features[FEAT_7_0_ECX] |= CPUID_7_0_ECX_WAITPKG;
71 }
72
73 if (env->features[FEAT_1_ECX] & CPUID_EXT_MONITOR) {
74 host_cpuid(5, 0, &cpu->mwait.eax, &cpu->mwait.ebx,
75 &cpu->mwait.ecx, &cpu->mwait.edx);
76 }
77 }
78 if (cpu->ucode_rev == 0) {
79 cpu->ucode_rev =
80 kvm_arch_get_supported_msr_feature(kvm_state,
81 MSR_IA32_UCODE_REV);
82 }
83 }
84 ret = host_cpu_realizefn(cs, errp);
85 if (!ret) {
86 return ret;
87 }
88
89 if ((env->features[FEAT_8000_0001_EDX] & CPUID_EXT2_LM) &&
90 cpu->guest_phys_bits == -1) {
91 kvm_set_guest_phys_bits(cs);
92 }
93
94 return true;
95 }
96
lmce_supported(void)97 static bool lmce_supported(void)
98 {
99 uint64_t mce_cap = 0;
100
101 if (kvm_ioctl(kvm_state, KVM_X86_GET_MCE_CAP_SUPPORTED, &mce_cap) < 0) {
102 return false;
103 }
104 return !!(mce_cap & MCG_LMCE_P);
105 }
106
kvm_cpu_max_instance_init(X86CPU * cpu)107 static void kvm_cpu_max_instance_init(X86CPU *cpu)
108 {
109 CPUX86State *env = &cpu->env;
110 KVMState *s = kvm_state;
111
112 object_property_set_bool(OBJECT(cpu), "pmu", true, &error_abort);
113
114 if (lmce_supported()) {
115 object_property_set_bool(OBJECT(cpu), "lmce", true, &error_abort);
116 }
117
118 env->cpuid_min_level =
119 kvm_arch_get_supported_cpuid(s, 0x0, 0, R_EAX);
120 env->cpuid_min_xlevel =
121 kvm_arch_get_supported_cpuid(s, 0x80000000, 0, R_EAX);
122 env->cpuid_min_xlevel2 =
123 kvm_arch_get_supported_cpuid(s, 0xC0000000, 0, R_EAX);
124 }
125
kvm_cpu_xsave_init(void)126 static void kvm_cpu_xsave_init(void)
127 {
128 static bool first = true;
129 uint32_t eax, ebx, ecx, edx;
130 int i;
131
132 if (!first) {
133 return;
134 }
135 first = false;
136
137 /* x87 and SSE states are in the legacy region of the XSAVE area. */
138 x86_ext_save_areas[XSTATE_FP_BIT].offset = 0;
139 x86_ext_save_areas[XSTATE_SSE_BIT].offset = 0;
140
141 for (i = XSTATE_SSE_BIT + 1; i < XSAVE_STATE_AREA_COUNT; i++) {
142 ExtSaveArea *esa = &x86_ext_save_areas[i];
143
144 if (!esa->size) {
145 continue;
146 }
147 host_cpuid(0xd, i, &eax, &ebx, &ecx, &edx);
148 if (eax != 0) {
149 assert(esa->size == eax);
150 esa->offset = ebx;
151 esa->ecx = ecx;
152 }
153 }
154 }
155
156 /*
157 * KVM-specific features that are automatically added/removed
158 * from cpudef models when KVM is enabled.
159 * Only for builtin_x86_defs models initialized with x86_register_cpudef_types.
160 *
161 * NOTE: features can be enabled by default only if they were
162 * already available in the oldest kernel version supported
163 * by the KVM accelerator (see "OS requirements" section at
164 * docs/system/target-i386.rst)
165 */
166 static PropValue kvm_default_props[] = {
167 { "kvmclock", "on" },
168 { "kvm-nopiodelay", "on" },
169 { "kvm-asyncpf", "on" },
170 { "kvm-steal-time", "on" },
171 { "kvm-pv-eoi", "on" },
172 { "kvmclock-stable-bit", "on" },
173 { "x2apic", "on" },
174 { "kvm-msi-ext-dest-id", "off" },
175 { "acpi", "off" },
176 { "monitor", "off" },
177 { "svm", "off" },
178 { NULL, NULL },
179 };
180
181 /*
182 * Only for builtin_x86_defs models initialized with x86_register_cpudef_types.
183 */
x86_cpu_change_kvm_default(const char * prop,const char * value)184 static void x86_cpu_change_kvm_default(const char *prop, const char *value)
185 {
186 PropValue *pv;
187 for (pv = kvm_default_props; pv->prop; pv++) {
188 if (!strcmp(pv->prop, prop)) {
189 pv->value = value;
190 break;
191 }
192 }
193
194 /*
195 * It is valid to call this function only for properties that
196 * are already present in the kvm_default_props table.
197 */
198 assert(pv->prop);
199 }
200
kvm_cpu_instance_init(CPUState * cs)201 static void kvm_cpu_instance_init(CPUState *cs)
202 {
203 X86CPU *cpu = X86_CPU(cs);
204 X86CPUClass *xcc = X86_CPU_GET_CLASS(cpu);
205
206 host_cpu_instance_init(cpu);
207
208 if (xcc->model) {
209 /* only applies to builtin_x86_defs cpus */
210 if (!kvm_irqchip_in_kernel()) {
211 x86_cpu_change_kvm_default("x2apic", "off");
212 } else if (kvm_irqchip_is_split()) {
213 x86_cpu_change_kvm_default("kvm-msi-ext-dest-id", "on");
214 }
215
216 /* Special cases not set in the X86CPUDefinition structs: */
217 x86_cpu_apply_props(cpu, kvm_default_props);
218 }
219
220 if (xcc->max_features) {
221 kvm_cpu_max_instance_init(cpu);
222 }
223
224 kvm_cpu_xsave_init();
225 }
226
kvm_cpu_accel_class_init(ObjectClass * oc,const void * data)227 static void kvm_cpu_accel_class_init(ObjectClass *oc, const void *data)
228 {
229 AccelCPUClass *acc = ACCEL_CPU_CLASS(oc);
230
231 acc->cpu_target_realize = kvm_cpu_realizefn;
232 acc->cpu_instance_init = kvm_cpu_instance_init;
233 }
234 static const TypeInfo kvm_cpu_accel_type_info = {
235 .name = ACCEL_CPU_NAME("kvm"),
236
237 .parent = TYPE_ACCEL_CPU,
238 .class_init = kvm_cpu_accel_class_init,
239 .abstract = true,
240 };
kvm_cpu_accel_register_types(void)241 static void kvm_cpu_accel_register_types(void)
242 {
243 type_register_static(&kvm_cpu_accel_type_info);
244 }
245 type_init(kvm_cpu_accel_register_types);
246