1 /*
2 * x86 KVM CPU type initialization
3 *
4 * Copyright 2021 SUSE LLC
5 *
6 * This work is licensed under the terms of the GNU GPL, version 2 or later.
7 * See the COPYING file in the top-level directory.
8 */
9
10 #include "qemu/osdep.h"
11 #include "cpu.h"
12 #include "host-cpu.h"
13 #include "qapi/error.h"
14 #include "sysemu/sysemu.h"
15 #include "hw/boards.h"
16
17 #include "kvm_i386.h"
18 #include "hw/core/accel-cpu.h"
19
kvm_set_guest_phys_bits(CPUState * cs)20 static void kvm_set_guest_phys_bits(CPUState *cs)
21 {
22 X86CPU *cpu = X86_CPU(cs);
23 uint32_t eax, guest_phys_bits;
24
25 eax = kvm_arch_get_supported_cpuid(cs->kvm_state, 0x80000008, 0, R_EAX);
26 guest_phys_bits = (eax >> 16) & 0xff;
27 if (!guest_phys_bits) {
28 return;
29 }
30 cpu->guest_phys_bits = guest_phys_bits;
31 if (cpu->guest_phys_bits > cpu->phys_bits) {
32 cpu->guest_phys_bits = cpu->phys_bits;
33 }
34
35 if (cpu->host_phys_bits && cpu->host_phys_bits_limit &&
36 cpu->guest_phys_bits > cpu->host_phys_bits_limit) {
37 cpu->guest_phys_bits = cpu->host_phys_bits_limit;
38 }
39 }
40
kvm_cpu_realizefn(CPUState * cs,Error ** errp)41 static bool kvm_cpu_realizefn(CPUState *cs, Error **errp)
42 {
43 X86CPU *cpu = X86_CPU(cs);
44 CPUX86State *env = &cpu->env;
45 bool ret;
46
47 /*
48 * The realize order is important, since x86_cpu_realize() checks if
49 * nothing else has been set by the user (or by accelerators) in
50 * cpu->ucode_rev and cpu->phys_bits, and updates the CPUID results in
51 * mwait.ecx.
52 * This accel realization code also assumes cpu features are already expanded.
53 *
54 * realize order:
55 *
56 * x86_cpu_realizefn():
57 * x86_cpu_expand_features()
58 * cpu_exec_realizefn():
59 * accel_cpu_common_realize()
60 * kvm_cpu_realizefn()
61 * host_cpu_realizefn()
62 * kvm_set_guest_phys_bits()
63 * check/update ucode_rev, phys_bits, guest_phys_bits, mwait
64 * cpu_common_realizefn() (via xcc->parent_realize)
65 */
66 if (cpu->max_features) {
67 if (enable_cpu_pm) {
68 if (kvm_has_waitpkg()) {
69 env->features[FEAT_7_0_ECX] |= CPUID_7_0_ECX_WAITPKG;
70 }
71
72 if (env->features[FEAT_1_ECX] & CPUID_EXT_MONITOR) {
73 host_cpuid(5, 0, &cpu->mwait.eax, &cpu->mwait.ebx,
74 &cpu->mwait.ecx, &cpu->mwait.edx);
75 }
76 }
77 if (cpu->ucode_rev == 0) {
78 cpu->ucode_rev =
79 kvm_arch_get_supported_msr_feature(kvm_state,
80 MSR_IA32_UCODE_REV);
81 }
82 }
83 ret = host_cpu_realizefn(cs, errp);
84 if (!ret) {
85 return ret;
86 }
87
88 if ((env->features[FEAT_8000_0001_EDX] & CPUID_EXT2_LM) &&
89 cpu->guest_phys_bits == -1) {
90 kvm_set_guest_phys_bits(cs);
91 }
92
93 return true;
94 }
95
lmce_supported(void)96 static bool lmce_supported(void)
97 {
98 uint64_t mce_cap = 0;
99
100 if (kvm_ioctl(kvm_state, KVM_X86_GET_MCE_CAP_SUPPORTED, &mce_cap) < 0) {
101 return false;
102 }
103 return !!(mce_cap & MCG_LMCE_P);
104 }
105
kvm_cpu_max_instance_init(X86CPU * cpu)106 static void kvm_cpu_max_instance_init(X86CPU *cpu)
107 {
108 CPUX86State *env = &cpu->env;
109 KVMState *s = kvm_state;
110
111 host_cpu_max_instance_init(cpu);
112
113 if (lmce_supported()) {
114 object_property_set_bool(OBJECT(cpu), "lmce", true, &error_abort);
115 }
116
117 env->cpuid_min_level =
118 kvm_arch_get_supported_cpuid(s, 0x0, 0, R_EAX);
119 env->cpuid_min_xlevel =
120 kvm_arch_get_supported_cpuid(s, 0x80000000, 0, R_EAX);
121 env->cpuid_min_xlevel2 =
122 kvm_arch_get_supported_cpuid(s, 0xC0000000, 0, R_EAX);
123 }
124
kvm_cpu_xsave_init(void)125 static void kvm_cpu_xsave_init(void)
126 {
127 static bool first = true;
128 uint32_t eax, ebx, ecx, edx;
129 int i;
130
131 if (!first) {
132 return;
133 }
134 first = false;
135
136 /* x87 and SSE states are in the legacy region of the XSAVE area. */
137 x86_ext_save_areas[XSTATE_FP_BIT].offset = 0;
138 x86_ext_save_areas[XSTATE_SSE_BIT].offset = 0;
139
140 for (i = XSTATE_SSE_BIT + 1; i < XSAVE_STATE_AREA_COUNT; i++) {
141 ExtSaveArea *esa = &x86_ext_save_areas[i];
142
143 if (!esa->size) {
144 continue;
145 }
146 if ((x86_cpu_get_supported_feature_word(NULL, esa->feature) & esa->bits)
147 != esa->bits) {
148 continue;
149 }
150 host_cpuid(0xd, i, &eax, &ebx, &ecx, &edx);
151 if (eax != 0) {
152 assert(esa->size == eax);
153 esa->offset = ebx;
154 esa->ecx = ecx;
155 }
156 }
157 }
158
159 /*
160 * KVM-specific features that are automatically added/removed
161 * from cpudef models when KVM is enabled.
162 * Only for builtin_x86_defs models initialized with x86_register_cpudef_types.
163 *
164 * NOTE: features can be enabled by default only if they were
165 * already available in the oldest kernel version supported
166 * by the KVM accelerator (see "OS requirements" section at
167 * docs/system/target-i386.rst)
168 */
169 static PropValue kvm_default_props[] = {
170 { "kvmclock", "on" },
171 { "kvm-nopiodelay", "on" },
172 { "kvm-asyncpf", "on" },
173 { "kvm-steal-time", "on" },
174 { "kvm-pv-eoi", "on" },
175 { "kvmclock-stable-bit", "on" },
176 { "x2apic", "on" },
177 { "kvm-msi-ext-dest-id", "off" },
178 { "acpi", "off" },
179 { "monitor", "off" },
180 { "svm", "off" },
181 { NULL, NULL },
182 };
183
184 /*
185 * Only for builtin_x86_defs models initialized with x86_register_cpudef_types.
186 */
x86_cpu_change_kvm_default(const char * prop,const char * value)187 static void x86_cpu_change_kvm_default(const char *prop, const char *value)
188 {
189 PropValue *pv;
190 for (pv = kvm_default_props; pv->prop; pv++) {
191 if (!strcmp(pv->prop, prop)) {
192 pv->value = value;
193 break;
194 }
195 }
196
197 /*
198 * It is valid to call this function only for properties that
199 * are already present in the kvm_default_props table.
200 */
201 assert(pv->prop);
202 }
203
kvm_cpu_instance_init(CPUState * cs)204 static void kvm_cpu_instance_init(CPUState *cs)
205 {
206 X86CPU *cpu = X86_CPU(cs);
207 X86CPUClass *xcc = X86_CPU_GET_CLASS(cpu);
208
209 host_cpu_instance_init(cpu);
210
211 if (xcc->model) {
212 /* only applies to builtin_x86_defs cpus */
213 if (!kvm_irqchip_in_kernel()) {
214 x86_cpu_change_kvm_default("x2apic", "off");
215 } else if (kvm_irqchip_is_split()) {
216 x86_cpu_change_kvm_default("kvm-msi-ext-dest-id", "on");
217 }
218
219 /* Special cases not set in the X86CPUDefinition structs: */
220 x86_cpu_apply_props(cpu, kvm_default_props);
221 }
222
223 if (cpu->max_features) {
224 kvm_cpu_max_instance_init(cpu);
225 }
226
227 kvm_cpu_xsave_init();
228 }
229
kvm_cpu_accel_class_init(ObjectClass * oc,void * data)230 static void kvm_cpu_accel_class_init(ObjectClass *oc, void *data)
231 {
232 AccelCPUClass *acc = ACCEL_CPU_CLASS(oc);
233
234 acc->cpu_target_realize = kvm_cpu_realizefn;
235 acc->cpu_instance_init = kvm_cpu_instance_init;
236 }
237 static const TypeInfo kvm_cpu_accel_type_info = {
238 .name = ACCEL_CPU_NAME("kvm"),
239
240 .parent = TYPE_ACCEL_CPU,
241 .class_init = kvm_cpu_accel_class_init,
242 .abstract = true,
243 };
kvm_cpu_accel_register_types(void)244 static void kvm_cpu_accel_register_types(void)
245 {
246 type_register_static(&kvm_cpu_accel_type_info);
247 }
248 type_init(kvm_cpu_accel_register_types);
249