1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2 /*
3  * Copyright (C) 2014 Intel Mobile Communications GmbH
4  */
5 #ifndef __iwl_scd_h__
6 #define __iwl_scd_h__
7 
8 #include "iwl-trans.h"
9 #include "iwl-io.h"
10 #include "iwl-prph.h"
11 
12 
iwl_scd_txq_set_chain(struct iwl_trans * trans,u16 txq_id)13 static inline void iwl_scd_txq_set_chain(struct iwl_trans *trans,
14 					 u16 txq_id)
15 {
16 	iwl_set_bits_prph(trans, SCD_QUEUECHAIN_SEL, BIT(txq_id));
17 }
18 
iwl_scd_txq_enable_agg(struct iwl_trans * trans,u16 txq_id)19 static inline void iwl_scd_txq_enable_agg(struct iwl_trans *trans,
20 					  u16 txq_id)
21 {
22 	iwl_set_bits_prph(trans, SCD_AGGR_SEL, BIT(txq_id));
23 }
24 
iwl_scd_txq_disable_agg(struct iwl_trans * trans,u16 txq_id)25 static inline void iwl_scd_txq_disable_agg(struct iwl_trans *trans,
26 					   u16 txq_id)
27 {
28 	iwl_clear_bits_prph(trans, SCD_AGGR_SEL, BIT(txq_id));
29 }
30 
iwl_scd_disable_agg(struct iwl_trans * trans)31 static inline void iwl_scd_disable_agg(struct iwl_trans *trans)
32 {
33 	iwl_set_bits_prph(trans, SCD_AGGR_SEL, 0);
34 }
35 
iwl_scd_activate_fifos(struct iwl_trans * trans)36 static inline void iwl_scd_activate_fifos(struct iwl_trans *trans)
37 {
38 	iwl_write_prph(trans, SCD_TXFACT, IWL_MASK(0, 7));
39 }
40 
iwl_scd_deactivate_fifos(struct iwl_trans * trans)41 static inline void iwl_scd_deactivate_fifos(struct iwl_trans *trans)
42 {
43 	iwl_write_prph(trans, SCD_TXFACT, 0);
44 }
45 
iwl_scd_enable_set_active(struct iwl_trans * trans,u32 value)46 static inline void iwl_scd_enable_set_active(struct iwl_trans *trans,
47 					     u32 value)
48 {
49 	iwl_write_prph(trans, SCD_EN_CTRL, value);
50 }
51 
SCD_QUEUE_WRPTR(unsigned int chnl)52 static inline unsigned int SCD_QUEUE_WRPTR(unsigned int chnl)
53 {
54 	if (chnl < 20)
55 		return SCD_BASE + 0x18 + chnl * 4;
56 	WARN_ON_ONCE(chnl >= 32);
57 	return SCD_BASE + 0x284 + (chnl - 20) * 4;
58 }
59 
SCD_QUEUE_RDPTR(unsigned int chnl)60 static inline unsigned int SCD_QUEUE_RDPTR(unsigned int chnl)
61 {
62 	if (chnl < 20)
63 		return SCD_BASE + 0x68 + chnl * 4;
64 	WARN_ON_ONCE(chnl >= 32);
65 	return SCD_BASE + 0x2B4 + chnl * 4;
66 }
67 
SCD_QUEUE_STATUS_BITS(unsigned int chnl)68 static inline unsigned int SCD_QUEUE_STATUS_BITS(unsigned int chnl)
69 {
70 	if (chnl < 20)
71 		return SCD_BASE + 0x10c + chnl * 4;
72 	WARN_ON_ONCE(chnl >= 32);
73 	return SCD_BASE + 0x334 + chnl * 4;
74 }
75 
iwl_scd_txq_set_inactive(struct iwl_trans * trans,u16 txq_id)76 static inline void iwl_scd_txq_set_inactive(struct iwl_trans *trans,
77 					    u16 txq_id)
78 {
79 	iwl_write_prph(trans, SCD_QUEUE_STATUS_BITS(txq_id),
80 		       (0 << SCD_QUEUE_STTS_REG_POS_ACTIVE)|
81 		       (1 << SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
82 }
83 
84 #endif
85