xref: /openbmc/linux/drivers/ata/pata_it8213.c (revision 25df73d9)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  *    pata_it8213.c - iTE Tech. Inc.  IT8213 PATA driver
4  *
5  *    The IT8213 is a very Intel ICH like device for timing purposes, having
6  *    a similar register layout and the same split clock arrangement. Cable
7  *    detection is different, and it does not have slave channels or all the
8  *    clutter of later ICH/SATA setups.
9  */
10 
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <linux/pci.h>
14 #include <linux/blkdev.h>
15 #include <linux/delay.h>
16 #include <linux/device.h>
17 #include <scsi/scsi_host.h>
18 #include <linux/libata.h>
19 #include <linux/ata.h>
20 
21 #define DRV_NAME	"pata_it8213"
22 #define DRV_VERSION	"0.0.3"
23 
24 /**
25  *	it8213_pre_reset	-	probe begin
26  *	@link: link
27  *	@deadline: deadline jiffies for the operation
28  *
29  *	Filter out ports by the enable bits before doing the normal reset
30  *	and probe.
31  */
32 
it8213_pre_reset(struct ata_link * link,unsigned long deadline)33 static int it8213_pre_reset(struct ata_link *link, unsigned long deadline)
34 {
35 	static const struct pci_bits it8213_enable_bits[] = {
36 		{ 0x41U, 1U, 0x80UL, 0x80UL },	/* port 0 */
37 	};
38 	struct ata_port *ap = link->ap;
39 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
40 	if (!pci_test_config_bits(pdev, &it8213_enable_bits[ap->port_no]))
41 		return -ENOENT;
42 
43 	return ata_sff_prereset(link, deadline);
44 }
45 
46 /**
47  *	it8213_cable_detect	-	check for 40/80 pin
48  *	@ap: Port
49  *
50  *	Perform cable detection for the 8213 ATA interface. This is
51  *	different to the PIIX arrangement
52  */
53 
it8213_cable_detect(struct ata_port * ap)54 static int it8213_cable_detect(struct ata_port *ap)
55 {
56 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
57 	u8 tmp;
58 	pci_read_config_byte(pdev, 0x42, &tmp);
59 	if (tmp & 2)	/* The initial docs are incorrect */
60 		return ATA_CBL_PATA40;
61 	return ATA_CBL_PATA80;
62 }
63 
64 /**
65  *	it8213_set_piomode - Initialize host controller PATA PIO timings
66  *	@ap: Port whose timings we are configuring
67  *	@adev: Device whose timings we are configuring
68  *
69  *	Set PIO mode for device, in host controller PCI config space.
70  *
71  *	LOCKING:
72  *	None (inherited from caller).
73  */
74 
it8213_set_piomode(struct ata_port * ap,struct ata_device * adev)75 static void it8213_set_piomode (struct ata_port *ap, struct ata_device *adev)
76 {
77 	unsigned int pio	= adev->pio_mode - XFER_PIO_0;
78 	struct pci_dev *dev	= to_pci_dev(ap->host->dev);
79 	unsigned int master_port = ap->port_no ? 0x42 : 0x40;
80 	u16 master_data;
81 	int control = 0;
82 
83 	/*
84 	 *	See Intel Document 298600-004 for the timing programing rules
85 	 *	for PIIX/ICH. The 8213 is a clone so very similar
86 	 */
87 
88 	static const	 /* ISP  RTC */
89 	u8 timings[][2]	= { { 0, 0 },
90 			    { 0, 0 },
91 			    { 1, 0 },
92 			    { 2, 1 },
93 			    { 2, 3 }, };
94 
95 	if (pio > 1)
96 		control |= 1;	/* TIME */
97 	if (ata_pio_need_iordy(adev))	/* PIO 3/4 require IORDY */
98 		control |= 2;	/* IE */
99 	/* Bit 2 is set for ATAPI on the IT8213 - reverse of ICH/PIIX */
100 	if (adev->class != ATA_DEV_ATA)
101 		control |= 4;	/* PPE */
102 
103 	pci_read_config_word(dev, master_port, &master_data);
104 
105 	/* Set PPE, IE, and TIME as appropriate */
106 	if (adev->devno == 0) {
107 		master_data &= 0xCCF0;
108 		master_data |= control;
109 		master_data |= (timings[pio][0] << 12) |
110 			(timings[pio][1] << 8);
111 	} else {
112 		u8 slave_data;
113 
114 		master_data &= 0xFF0F;
115 		master_data |= (control << 4);
116 
117 		/* Slave timing in separate register */
118 		pci_read_config_byte(dev, 0x44, &slave_data);
119 		slave_data &= 0xF0;
120 		slave_data |= (timings[pio][0] << 2) | timings[pio][1];
121 		pci_write_config_byte(dev, 0x44, slave_data);
122 	}
123 
124 	master_data |= 0x4000;	/* Ensure SITRE is set */
125 	pci_write_config_word(dev, master_port, master_data);
126 }
127 
128 /**
129  *	it8213_set_dmamode - Initialize host controller PATA DMA timings
130  *	@ap: Port whose timings we are configuring
131  *	@adev: Device to program
132  *
133  *	Set UDMA/MWDMA mode for device, in host controller PCI config space.
134  *	This device is basically an ICH alike.
135  *
136  *	LOCKING:
137  *	None (inherited from caller).
138  */
139 
it8213_set_dmamode(struct ata_port * ap,struct ata_device * adev)140 static void it8213_set_dmamode (struct ata_port *ap, struct ata_device *adev)
141 {
142 	struct pci_dev *dev	= to_pci_dev(ap->host->dev);
143 	u16 master_data;
144 	u8 speed		= adev->dma_mode;
145 	int devid		= adev->devno;
146 	u8 udma_enable;
147 
148 	static const	 /* ISP  RTC */
149 	u8 timings[][2]	= { { 0, 0 },
150 			    { 0, 0 },
151 			    { 1, 0 },
152 			    { 2, 1 },
153 			    { 2, 3 }, };
154 
155 	pci_read_config_word(dev, 0x40, &master_data);
156 	pci_read_config_byte(dev, 0x48, &udma_enable);
157 
158 	if (speed >= XFER_UDMA_0) {
159 		unsigned int udma = adev->dma_mode - XFER_UDMA_0;
160 		u16 udma_timing;
161 		u16 ideconf;
162 		int u_clock, u_speed;
163 
164 		/* Clocks follow the PIIX style */
165 		u_speed = min(2 - (udma & 1), udma);
166 		if (udma > 4)
167 			u_clock = 0x1000;	/* 100Mhz */
168 		else if (udma > 2)
169 			u_clock = 1;		/* 66Mhz */
170 		else
171 			u_clock = 0;		/* 33Mhz */
172 
173 		udma_enable |= (1 << devid);
174 
175 		/* Load the UDMA cycle time */
176 		pci_read_config_word(dev, 0x4A, &udma_timing);
177 		udma_timing &= ~(3 << (4 * devid));
178 		udma_timing |= u_speed << (4 * devid);
179 		pci_write_config_word(dev, 0x4A, udma_timing);
180 
181 		/* Load the clock selection */
182 		pci_read_config_word(dev, 0x54, &ideconf);
183 		ideconf &= ~(0x1001 << devid);
184 		ideconf |= u_clock << devid;
185 		pci_write_config_word(dev, 0x54, ideconf);
186 	} else {
187 		/*
188 		 * MWDMA is driven by the PIO timings. We must also enable
189 		 * IORDY unconditionally along with TIME1. PPE has already
190 		 * been set when the PIO timing was set.
191 		 */
192 		unsigned int mwdma	= adev->dma_mode - XFER_MW_DMA_0;
193 		unsigned int control;
194 		u8 slave_data;
195 		static const unsigned int needed_pio[3] = {
196 			XFER_PIO_0, XFER_PIO_3, XFER_PIO_4
197 		};
198 		int pio = needed_pio[mwdma] - XFER_PIO_0;
199 
200 		control = 3;	/* IORDY|TIME1 */
201 
202 		/* If the drive MWDMA is faster than it can do PIO then
203 		   we must force PIO into PIO0 */
204 
205 		if (adev->pio_mode < needed_pio[mwdma])
206 			/* Enable DMA timing only */
207 			control |= 8;	/* PIO cycles in PIO0 */
208 
209 		if (devid) {	/* Slave */
210 			master_data &= 0xFF4F;  /* Mask out IORDY|TIME1|DMAONLY */
211 			master_data |= control << 4;
212 			pci_read_config_byte(dev, 0x44, &slave_data);
213 			slave_data &= 0xF0;
214 			/* Load the matching timing */
215 			slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << (ap->port_no ? 4 : 0);
216 			pci_write_config_byte(dev, 0x44, slave_data);
217 		} else { 	/* Master */
218 			master_data &= 0xCCF4;	/* Mask out IORDY|TIME1|DMAONLY
219 						   and master timing bits */
220 			master_data |= control;
221 			master_data |=
222 				(timings[pio][0] << 12) |
223 				(timings[pio][1] << 8);
224 		}
225 		udma_enable &= ~(1 << devid);
226 		pci_write_config_word(dev, 0x40, master_data);
227 	}
228 	pci_write_config_byte(dev, 0x48, udma_enable);
229 }
230 
231 static const struct scsi_host_template it8213_sht = {
232 	ATA_BMDMA_SHT(DRV_NAME),
233 };
234 
235 
236 static struct ata_port_operations it8213_ops = {
237 	.inherits		= &ata_bmdma_port_ops,
238 	.cable_detect		= it8213_cable_detect,
239 	.set_piomode		= it8213_set_piomode,
240 	.set_dmamode		= it8213_set_dmamode,
241 	.prereset		= it8213_pre_reset,
242 };
243 
244 
245 /**
246  *	it8213_init_one - Register 8213 ATA PCI device with kernel services
247  *	@pdev: PCI device to register
248  *	@ent: Entry in it8213_pci_tbl matching with @pdev
249  *
250  *	Called from kernel PCI layer.
251  *
252  *	LOCKING:
253  *	Inherited from PCI layer (may sleep).
254  *
255  *	RETURNS:
256  *	Zero on success, or -ERRNO value.
257  */
258 
it8213_init_one(struct pci_dev * pdev,const struct pci_device_id * ent)259 static int it8213_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
260 {
261 	static const struct ata_port_info info = {
262 		.flags		= ATA_FLAG_SLAVE_POSS,
263 		.pio_mask	= ATA_PIO4,
264 		.mwdma_mask	= ATA_MWDMA12_ONLY,
265 		.udma_mask	= ATA_UDMA6,
266 		.port_ops	= &it8213_ops,
267 	};
268 	/* Current IT8213 stuff is single port */
269 	const struct ata_port_info *ppi[] = { &info, &ata_dummy_port_info };
270 
271 	ata_print_version_once(&pdev->dev, DRV_VERSION);
272 
273 	return ata_pci_bmdma_init_one(pdev, ppi, &it8213_sht, NULL, 0);
274 }
275 
276 static const struct pci_device_id it8213_pci_tbl[] = {
277 	{ PCI_VDEVICE(ITE, PCI_DEVICE_ID_ITE_8213), },
278 
279 	{ }	/* terminate list */
280 };
281 
282 static struct pci_driver it8213_pci_driver = {
283 	.name			= DRV_NAME,
284 	.id_table		= it8213_pci_tbl,
285 	.probe			= it8213_init_one,
286 	.remove			= ata_pci_remove_one,
287 #ifdef CONFIG_PM_SLEEP
288 	.suspend		= ata_pci_device_suspend,
289 	.resume			= ata_pci_device_resume,
290 #endif
291 };
292 
293 module_pci_driver(it8213_pci_driver);
294 
295 MODULE_AUTHOR("Alan Cox");
296 MODULE_DESCRIPTION("SCSI low-level driver for the ITE 8213");
297 MODULE_LICENSE("GPL");
298 MODULE_DEVICE_TABLE(pci, it8213_pci_tbl);
299 MODULE_VERSION(DRV_VERSION);
300