1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Support for Intel Camera Imaging ISP subsystem.
4  * Copyright (c) 2015, Intel Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms and conditions of the GNU General Public License,
8  * version 2, as published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  */
15 
16 #include <type_support.h>
17 
18 //CSI reveiver has 3 ports.
19 #define		N_CSI_PORTS (3)
20 //AM: Use previous define for this.
21 
22 //MIPI allows upto 4 channels.
23 #define		N_CHANNELS  (4)
24 // 12KB = 256bit x 384 words
25 #define		IB_CAPACITY_IN_WORDS (384)
26 
27 typedef enum {
28 	MIPI_0LANE_CFG = 0,
29 	MIPI_1LANE_CFG = 1,
30 	MIPI_2LANE_CFG = 2,
31 	MIPI_3LANE_CFG = 3,
32 	MIPI_4LANE_CFG = 4
33 } mipi_lane_cfg_t;
34 
35 typedef enum {
36 	INPUT_SYSTEM_SOURCE_SENSOR = 0,
37 	INPUT_SYSTEM_SOURCE_FIFO,
38 	INPUT_SYSTEM_SOURCE_TPG,
39 	INPUT_SYSTEM_SOURCE_PRBS,
40 	INPUT_SYSTEM_SOURCE_MEMORY,
41 	N_INPUT_SYSTEM_SOURCE
42 } input_system_source_t;
43 
44 /* internal routing configuration */
45 typedef enum {
46 	INPUT_SYSTEM_DISCARD_ALL = 0,
47 	INPUT_SYSTEM_CSI_BACKEND = 1,
48 	INPUT_SYSTEM_INPUT_BUFFER = 2,
49 	INPUT_SYSTEM_MULTICAST = 3,
50 	N_INPUT_SYSTEM_CONNECTION
51 } input_system_connection_t;
52 
53 typedef enum {
54 	INPUT_SYSTEM_MIPI_PORT0,
55 	INPUT_SYSTEM_MIPI_PORT1,
56 	INPUT_SYSTEM_MIPI_PORT2,
57 	INPUT_SYSTEM_ACQUISITION_UNIT,
58 	N_INPUT_SYSTEM_MULTIPLEX
59 } input_system_multiplex_t;
60 
61 typedef enum {
62 	INPUT_SYSTEM_SINK_MEMORY = 0,
63 	INPUT_SYSTEM_SINK_ISP,
64 	INPUT_SYSTEM_SINK_SP,
65 	N_INPUT_SYSTEM_SINK
66 } input_system_sink_t;
67 
68 typedef enum {
69 	INPUT_SYSTEM_FIFO_CAPTURE = 0,
70 	INPUT_SYSTEM_FIFO_CAPTURE_WITH_COUNTING,
71 	INPUT_SYSTEM_SRAM_BUFFERING,
72 	INPUT_SYSTEM_XMEM_BUFFERING,
73 	INPUT_SYSTEM_XMEM_CAPTURE,
74 	INPUT_SYSTEM_XMEM_ACQUIRE,
75 	N_INPUT_SYSTEM_BUFFERING_MODE
76 } buffering_mode_t;
77 
78 typedef struct isp2400_input_system_cfg_s	input_system_cfg_t;
79 typedef struct sync_generator_cfg_s	sync_generator_cfg_t;
80 typedef struct tpg_cfg_s			tpg_cfg_t;
81 typedef struct prbs_cfg_s			prbs_cfg_t;
82 
83 /* MW: uint16_t should be sufficient */
84 struct isp2400_input_system_cfg_s {
85 	u32	no_side_band;
86 	u32	fmt_type;
87 	u32	ch_id;
88 	u32	input_mode;
89 };
90 
91 struct sync_generator_cfg_s {
92 	u32	width;
93 	u32	height;
94 	u32	hblank_cycles;
95 	u32	vblank_cycles;
96 };
97 
98 /* MW: tpg & prbs are exclusive */
99 struct tpg_cfg_s {
100 	u32	x_mask;
101 	u32	y_mask;
102 	u32	x_delta;
103 	u32	y_delta;
104 	u32	xy_mask;
105 	sync_generator_cfg_t sync_gen_cfg;
106 };
107 
108 struct prbs_cfg_s {
109 	u32	seed;
110 	sync_generator_cfg_t sync_gen_cfg;
111 };
112 
113 struct gpfifo_cfg_s {
114 // TBD.
115 	sync_generator_cfg_t sync_gen_cfg;
116 };
117 
118 typedef struct gpfifo_cfg_s		gpfifo_cfg_t;
119 
120 //ALX:Commented out to pass the compilation.
121 //typedef struct isp2400_input_system_cfg_s input_system_cfg_t;
122 
123 struct ib_buffer_s {
124 	u32	mem_reg_size;
125 	u32	nof_mem_regs;
126 	u32	mem_reg_addr;
127 };
128 
129 typedef struct ib_buffer_s	isp2400_ib_buffer_t;
130 
131 struct csi_cfg_s {
132 	u32			csi_port;
133 	buffering_mode_t	buffering_mode;
134 	isp2400_ib_buffer_t	csi_buffer;
135 	isp2400_ib_buffer_t	acquisition_buffer;
136 	u32			nof_xmem_buffers;
137 };
138 
139 typedef struct csi_cfg_s	 csi_cfg_t;
140 
141 typedef enum {
142 	INPUT_SYSTEM_CFG_FLAG_RESET	= 0,
143 	INPUT_SYSTEM_CFG_FLAG_SET		= 1U << 0,
144 	INPUT_SYSTEM_CFG_FLAG_BLOCKED	= 1U << 1,
145 	INPUT_SYSTEM_CFG_FLAG_REQUIRED	= 1U << 2,
146 	INPUT_SYSTEM_CFG_FLAG_CONFLICT	= 1U << 3	// To mark a conflicting configuration.
147 } isp2400_input_system_cfg_flag_t;
148 
149 typedef u32 input_system_config_flags_t;
150