1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2017 - 2019 Pensando Systems, Inc */
3 
4 #include <linux/module.h>
5 #include <linux/netdevice.h>
6 #include <linux/etherdevice.h>
7 #include <linux/pci.h>
8 
9 #include "ionic.h"
10 #include "ionic_bus.h"
11 #include "ionic_lif.h"
12 #include "ionic_debugfs.h"
13 
14 /* Supported devices */
15 static const struct pci_device_id ionic_id_table[] = {
16 	{ PCI_VDEVICE(PENSANDO, PCI_DEVICE_ID_PENSANDO_IONIC_ETH_PF) },
17 	{ PCI_VDEVICE(PENSANDO, PCI_DEVICE_ID_PENSANDO_IONIC_ETH_VF) },
18 	{ 0, }	/* end of table */
19 };
20 MODULE_DEVICE_TABLE(pci, ionic_id_table);
21 
ionic_bus_get_irq(struct ionic * ionic,unsigned int num)22 int ionic_bus_get_irq(struct ionic *ionic, unsigned int num)
23 {
24 	return pci_irq_vector(ionic->pdev, num);
25 }
26 
ionic_bus_info(struct ionic * ionic)27 const char *ionic_bus_info(struct ionic *ionic)
28 {
29 	return pci_name(ionic->pdev);
30 }
31 
ionic_bus_alloc_irq_vectors(struct ionic * ionic,unsigned int nintrs)32 int ionic_bus_alloc_irq_vectors(struct ionic *ionic, unsigned int nintrs)
33 {
34 	return pci_alloc_irq_vectors(ionic->pdev, nintrs, nintrs,
35 				     PCI_IRQ_MSIX);
36 }
37 
ionic_bus_free_irq_vectors(struct ionic * ionic)38 void ionic_bus_free_irq_vectors(struct ionic *ionic)
39 {
40 	if (!ionic->nintrs)
41 		return;
42 
43 	pci_free_irq_vectors(ionic->pdev);
44 }
45 
ionic_map_bars(struct ionic * ionic)46 static int ionic_map_bars(struct ionic *ionic)
47 {
48 	struct pci_dev *pdev = ionic->pdev;
49 	struct device *dev = ionic->dev;
50 	struct ionic_dev_bar *bars;
51 	unsigned int i, j;
52 
53 	bars = ionic->bars;
54 	ionic->num_bars = 0;
55 
56 	for (i = 0, j = 0; i < IONIC_BARS_MAX; i++) {
57 		if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM))
58 			continue;
59 		bars[j].len = pci_resource_len(pdev, i);
60 
61 		/* only map the whole bar 0 */
62 		if (j > 0) {
63 			bars[j].vaddr = NULL;
64 		} else {
65 			bars[j].vaddr = pci_iomap(pdev, i, bars[j].len);
66 			if (!bars[j].vaddr) {
67 				dev_err(dev,
68 					"Cannot memory-map BAR %d, aborting\n",
69 					i);
70 				return -ENODEV;
71 			}
72 		}
73 
74 		bars[j].bus_addr = pci_resource_start(pdev, i);
75 		bars[j].res_index = i;
76 		ionic->num_bars++;
77 		j++;
78 	}
79 
80 	return 0;
81 }
82 
ionic_unmap_bars(struct ionic * ionic)83 static void ionic_unmap_bars(struct ionic *ionic)
84 {
85 	struct ionic_dev_bar *bars = ionic->bars;
86 	unsigned int i;
87 
88 	for (i = 0; i < IONIC_BARS_MAX; i++) {
89 		if (bars[i].vaddr) {
90 			iounmap(bars[i].vaddr);
91 			bars[i].bus_addr = 0;
92 			bars[i].vaddr = NULL;
93 			bars[i].len = 0;
94 		}
95 	}
96 }
97 
ionic_bus_map_dbpage(struct ionic * ionic,int page_num)98 void __iomem *ionic_bus_map_dbpage(struct ionic *ionic, int page_num)
99 {
100 	return pci_iomap_range(ionic->pdev,
101 			       ionic->bars[IONIC_PCI_BAR_DBELL].res_index,
102 			       (u64)page_num << PAGE_SHIFT, PAGE_SIZE);
103 }
104 
ionic_bus_unmap_dbpage(struct ionic * ionic,void __iomem * page)105 void ionic_bus_unmap_dbpage(struct ionic *ionic, void __iomem *page)
106 {
107 	iounmap(page);
108 }
109 
ionic_vf_dealloc_locked(struct ionic * ionic)110 static void ionic_vf_dealloc_locked(struct ionic *ionic)
111 {
112 	struct ionic_vf_setattr_cmd vfc = { .attr = IONIC_VF_ATTR_STATSADDR };
113 	struct ionic_vf *v;
114 	int i;
115 
116 	if (!ionic->vfs)
117 		return;
118 
119 	for (i = ionic->num_vfs - 1; i >= 0; i--) {
120 		v = &ionic->vfs[i];
121 
122 		if (v->stats_pa) {
123 			vfc.stats_pa = 0;
124 			ionic_set_vf_config(ionic, i, &vfc);
125 			dma_unmap_single(ionic->dev, v->stats_pa,
126 					 sizeof(v->stats), DMA_FROM_DEVICE);
127 			v->stats_pa = 0;
128 		}
129 	}
130 
131 	kfree(ionic->vfs);
132 	ionic->vfs = NULL;
133 	ionic->num_vfs = 0;
134 }
135 
ionic_vf_dealloc(struct ionic * ionic)136 static void ionic_vf_dealloc(struct ionic *ionic)
137 {
138 	down_write(&ionic->vf_op_lock);
139 	ionic_vf_dealloc_locked(ionic);
140 	up_write(&ionic->vf_op_lock);
141 }
142 
ionic_vf_alloc(struct ionic * ionic,int num_vfs)143 static int ionic_vf_alloc(struct ionic *ionic, int num_vfs)
144 {
145 	struct ionic_vf_setattr_cmd vfc = { .attr = IONIC_VF_ATTR_STATSADDR };
146 	struct ionic_vf *v;
147 	int err = 0;
148 	int i;
149 
150 	down_write(&ionic->vf_op_lock);
151 
152 	ionic->vfs = kcalloc(num_vfs, sizeof(struct ionic_vf), GFP_KERNEL);
153 	if (!ionic->vfs) {
154 		err = -ENOMEM;
155 		goto out;
156 	}
157 
158 	for (i = 0; i < num_vfs; i++) {
159 		v = &ionic->vfs[i];
160 		v->stats_pa = dma_map_single(ionic->dev, &v->stats,
161 					     sizeof(v->stats), DMA_FROM_DEVICE);
162 		if (dma_mapping_error(ionic->dev, v->stats_pa)) {
163 			v->stats_pa = 0;
164 			err = -ENODEV;
165 			goto out;
166 		}
167 
168 		ionic->num_vfs++;
169 
170 		/* ignore failures from older FW, we just won't get stats */
171 		vfc.stats_pa = cpu_to_le64(v->stats_pa);
172 		ionic_set_vf_config(ionic, i, &vfc);
173 	}
174 
175 out:
176 	if (err)
177 		ionic_vf_dealloc_locked(ionic);
178 	up_write(&ionic->vf_op_lock);
179 	return err;
180 }
181 
ionic_sriov_configure(struct pci_dev * pdev,int num_vfs)182 static int ionic_sriov_configure(struct pci_dev *pdev, int num_vfs)
183 {
184 	struct ionic *ionic = pci_get_drvdata(pdev);
185 	struct device *dev = ionic->dev;
186 	int ret = 0;
187 
188 	if (ionic->lif &&
189 	    test_bit(IONIC_LIF_F_FW_RESET, ionic->lif->state))
190 		return -EBUSY;
191 
192 	if (num_vfs > 0) {
193 		ret = pci_enable_sriov(pdev, num_vfs);
194 		if (ret) {
195 			dev_err(dev, "Cannot enable SRIOV: %d\n", ret);
196 			goto out;
197 		}
198 
199 		ret = ionic_vf_alloc(ionic, num_vfs);
200 		if (ret) {
201 			dev_err(dev, "Cannot alloc VFs: %d\n", ret);
202 			pci_disable_sriov(pdev);
203 			goto out;
204 		}
205 
206 		ret = num_vfs;
207 	} else {
208 		pci_disable_sriov(pdev);
209 		ionic_vf_dealloc(ionic);
210 	}
211 
212 out:
213 	return ret;
214 }
215 
ionic_clear_pci(struct ionic * ionic)216 static void ionic_clear_pci(struct ionic *ionic)
217 {
218 	ionic_unmap_bars(ionic);
219 	pci_release_regions(ionic->pdev);
220 	pci_disable_device(ionic->pdev);
221 }
222 
ionic_setup_one(struct ionic * ionic)223 static int ionic_setup_one(struct ionic *ionic)
224 {
225 	struct pci_dev *pdev = ionic->pdev;
226 	struct device *dev = ionic->dev;
227 	int err;
228 
229 	ionic_debugfs_add_dev(ionic);
230 
231 	/* Setup PCI device */
232 	err = pci_enable_device_mem(pdev);
233 	if (err) {
234 		dev_err(dev, "Cannot enable PCI device: %d, aborting\n", err);
235 		goto err_out_debugfs_del_dev;
236 	}
237 
238 	err = pci_request_regions(pdev, IONIC_DRV_NAME);
239 	if (err) {
240 		dev_err(dev, "Cannot request PCI regions: %d, aborting\n", err);
241 		goto err_out_clear_pci;
242 	}
243 	pcie_print_link_status(pdev);
244 
245 	err = ionic_map_bars(ionic);
246 	if (err)
247 		goto err_out_clear_pci;
248 
249 	/* Configure the device */
250 	err = ionic_setup(ionic);
251 	if (err) {
252 		dev_err(dev, "Cannot setup device: %d, aborting\n", err);
253 		goto err_out_clear_pci;
254 	}
255 	pci_set_master(pdev);
256 
257 	err = ionic_identify(ionic);
258 	if (err) {
259 		dev_err(dev, "Cannot identify device: %d, aborting\n", err);
260 		goto err_out_teardown;
261 	}
262 	ionic_debugfs_add_ident(ionic);
263 
264 	err = ionic_init(ionic);
265 	if (err) {
266 		dev_err(dev, "Cannot init device: %d, aborting\n", err);
267 		goto err_out_teardown;
268 	}
269 
270 	/* Configure the port */
271 	err = ionic_port_identify(ionic);
272 	if (err) {
273 		dev_err(dev, "Cannot identify port: %d, aborting\n", err);
274 		goto err_out_teardown;
275 	}
276 
277 	err = ionic_port_init(ionic);
278 	if (err) {
279 		dev_err(dev, "Cannot init port: %d, aborting\n", err);
280 		goto err_out_teardown;
281 	}
282 
283 	return 0;
284 
285 err_out_teardown:
286 	ionic_dev_teardown(ionic);
287 err_out_clear_pci:
288 	ionic_clear_pci(ionic);
289 err_out_debugfs_del_dev:
290 	ionic_debugfs_del_dev(ionic);
291 
292 	return err;
293 }
294 
ionic_probe(struct pci_dev * pdev,const struct pci_device_id * ent)295 static int ionic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
296 {
297 	struct device *dev = &pdev->dev;
298 	struct ionic *ionic;
299 	int num_vfs;
300 	int err;
301 
302 	ionic = ionic_devlink_alloc(dev);
303 	if (!ionic)
304 		return -ENOMEM;
305 
306 	ionic->pdev = pdev;
307 	ionic->dev = dev;
308 	pci_set_drvdata(pdev, ionic);
309 	mutex_init(&ionic->dev_cmd_lock);
310 
311 	/* Query system for DMA addressing limitation for the device. */
312 	err = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(IONIC_ADDR_LEN));
313 	if (err) {
314 		dev_err(dev, "Unable to obtain 64-bit DMA for consistent allocations, aborting.  err=%d\n",
315 			err);
316 		goto err_out;
317 	}
318 
319 	err = ionic_setup_one(ionic);
320 	if (err)
321 		goto err_out;
322 
323 	/* Allocate and init the LIF */
324 	err = ionic_lif_size(ionic);
325 	if (err) {
326 		dev_err(dev, "Cannot size LIF: %d, aborting\n", err);
327 		goto err_out_pci;
328 	}
329 
330 	err = ionic_lif_alloc(ionic);
331 	if (err) {
332 		dev_err(dev, "Cannot allocate LIF: %d, aborting\n", err);
333 		goto err_out_free_irqs;
334 	}
335 
336 	err = ionic_lif_init(ionic->lif);
337 	if (err) {
338 		dev_err(dev, "Cannot init LIF: %d, aborting\n", err);
339 		goto err_out_free_lifs;
340 	}
341 
342 	init_rwsem(&ionic->vf_op_lock);
343 	num_vfs = pci_num_vf(pdev);
344 	if (num_vfs) {
345 		dev_info(dev, "%d VFs found already enabled\n", num_vfs);
346 		err = ionic_vf_alloc(ionic, num_vfs);
347 		if (err)
348 			dev_err(dev, "Cannot enable existing VFs: %d\n", err);
349 	}
350 
351 	err = ionic_devlink_register(ionic);
352 	if (err) {
353 		dev_err(dev, "Cannot register devlink: %d\n", err);
354 		goto err_out_deinit_lifs;
355 	}
356 
357 	err = ionic_lif_register(ionic->lif);
358 	if (err) {
359 		dev_err(dev, "Cannot register LIF: %d, aborting\n", err);
360 		goto err_out_deregister_devlink;
361 	}
362 
363 	mod_timer(&ionic->watchdog_timer,
364 		  round_jiffies(jiffies + ionic->watchdog_period));
365 
366 	return 0;
367 
368 err_out_deregister_devlink:
369 	ionic_devlink_unregister(ionic);
370 err_out_deinit_lifs:
371 	ionic_vf_dealloc(ionic);
372 	ionic_lif_deinit(ionic->lif);
373 err_out_free_lifs:
374 	ionic_lif_free(ionic->lif);
375 	ionic->lif = NULL;
376 err_out_free_irqs:
377 	ionic_bus_free_irq_vectors(ionic);
378 err_out_pci:
379 	ionic_dev_teardown(ionic);
380 	ionic_clear_pci(ionic);
381 err_out:
382 	mutex_destroy(&ionic->dev_cmd_lock);
383 	ionic_devlink_free(ionic);
384 
385 	return err;
386 }
387 
ionic_remove(struct pci_dev * pdev)388 static void ionic_remove(struct pci_dev *pdev)
389 {
390 	struct ionic *ionic = pci_get_drvdata(pdev);
391 
392 	del_timer_sync(&ionic->watchdog_timer);
393 
394 	if (ionic->lif) {
395 		/* prevent adminq cmds if already known as down */
396 		if (test_and_clear_bit(IONIC_LIF_F_FW_RESET, ionic->lif->state))
397 			set_bit(IONIC_LIF_F_FW_STOPPING, ionic->lif->state);
398 
399 		ionic_lif_unregister(ionic->lif);
400 		ionic_devlink_unregister(ionic);
401 		ionic_lif_deinit(ionic->lif);
402 		ionic_lif_free(ionic->lif);
403 		ionic->lif = NULL;
404 		ionic_bus_free_irq_vectors(ionic);
405 	}
406 
407 	ionic_port_reset(ionic);
408 	ionic_reset(ionic);
409 	ionic_dev_teardown(ionic);
410 	ionic_clear_pci(ionic);
411 	ionic_debugfs_del_dev(ionic);
412 	mutex_destroy(&ionic->dev_cmd_lock);
413 	ionic_devlink_free(ionic);
414 }
415 
ionic_reset_prepare(struct pci_dev * pdev)416 static void ionic_reset_prepare(struct pci_dev *pdev)
417 {
418 	struct ionic *ionic = pci_get_drvdata(pdev);
419 	struct ionic_lif *lif = ionic->lif;
420 
421 	dev_dbg(ionic->dev, "%s: device stopping\n", __func__);
422 
423 	del_timer_sync(&ionic->watchdog_timer);
424 	cancel_work_sync(&lif->deferred.work);
425 
426 	mutex_lock(&lif->queue_lock);
427 	ionic_stop_queues_reconfig(lif);
428 	ionic_txrx_free(lif);
429 	ionic_lif_deinit(lif);
430 	ionic_qcqs_free(lif);
431 	mutex_unlock(&lif->queue_lock);
432 
433 	ionic_dev_teardown(ionic);
434 	ionic_clear_pci(ionic);
435 	ionic_debugfs_del_dev(ionic);
436 }
437 
ionic_reset_done(struct pci_dev * pdev)438 static void ionic_reset_done(struct pci_dev *pdev)
439 {
440 	struct ionic *ionic = pci_get_drvdata(pdev);
441 	struct ionic_lif *lif = ionic->lif;
442 	int err;
443 
444 	err = ionic_setup_one(ionic);
445 	if (err)
446 		goto err_out;
447 
448 	ionic_debugfs_add_sizes(ionic);
449 	ionic_debugfs_add_lif(ionic->lif);
450 
451 	err = ionic_restart_lif(lif);
452 	if (err)
453 		goto err_out;
454 
455 	mod_timer(&ionic->watchdog_timer, jiffies + 1);
456 
457 err_out:
458 	dev_dbg(ionic->dev, "%s: device recovery %s\n",
459 		__func__, err ? "failed" : "done");
460 }
461 
462 static const struct pci_error_handlers ionic_err_handler = {
463 	/* FLR handling */
464 	.reset_prepare      = ionic_reset_prepare,
465 	.reset_done         = ionic_reset_done,
466 };
467 
468 static struct pci_driver ionic_driver = {
469 	.name = IONIC_DRV_NAME,
470 	.id_table = ionic_id_table,
471 	.probe = ionic_probe,
472 	.remove = ionic_remove,
473 	.sriov_configure = ionic_sriov_configure,
474 	.err_handler = &ionic_err_handler
475 };
476 
ionic_bus_register_driver(void)477 int ionic_bus_register_driver(void)
478 {
479 	return pci_register_driver(&ionic_driver);
480 }
481 
ionic_bus_unregister_driver(void)482 void ionic_bus_unregister_driver(void)
483 {
484 	pci_unregister_driver(&ionic_driver);
485 }
486