Searched defs:iommu_pmu (Results 1 – 2 of 2) sorted by relevance
234 iommu_event_base(struct iommu_pmu *iommu_pmu, int idx) in iommu_event_base()240 iommu_config_base(struct iommu_pmu *iommu_pmu, int idx) in iommu_config_base()259 static inline bool is_iommu_pmu_event(struct iommu_pmu *iommu_pmu, in is_iommu_pmu_event()267 struct iommu_pmu *iommu_pmu = iommu_event_to_pmu(event); in iommu_pmu_validate_event() local278 struct iommu_pmu *iommu_pmu = iommu_event_to_pmu(event); in iommu_pmu_validate_group() local322 struct iommu_pmu *iommu_pmu = iommu_event_to_pmu(event); in iommu_pmu_event_update() local345 struct iommu_pmu *iommu_pmu = iommu_event_to_pmu(event); in iommu_pmu_start() local382 struct iommu_pmu *iommu_pmu = iommu_event_to_pmu(event); in iommu_pmu_stop() local396 iommu_pmu_validate_per_cntr_event(struct iommu_pmu *iommu_pmu, in iommu_pmu_validate_per_cntr_event()408 static int iommu_pmu_assign_event(struct iommu_pmu *iommu_pmu, in iommu_pmu_assign_event()[all …]
627 struct iommu_pmu { struct628 struct intel_iommu *iommu;629 u32 num_cntr; /* Number of counters */630 u32 num_eg; /* Number of event group */631 u32 cntr_width; /* Counter width */632 u32 cntr_stride; /* Counter Stride */633 u32 filter; /* Bitmask of filter support */634 void __iomem *base; /* the PerfMon base address */635 void __iomem *cfg_reg; /* counter configuration base address */636 void __iomem *cntr_reg; /* counter 0 address*/[all …]