Searched defs:input_rate (Results 1 – 19 of 19) sorted by relevance
| /openbmc/linux/drivers/clk/mmp/ |
| D | clk-pll.c | |
| D | clk.h | |
| /openbmc/u-boot/drivers/clk/rockchip/ |
| H A D | clk_rk3036.c | 26 #define RATE_TO_DIV(input_rate, output_rate) \ argument
29 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
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| H A D | clk_rk3328.c | 28 #define RATE_TO_DIV(input_rate, output_rate) \ argument
30 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
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| H A D | clk_rk322x.c | 26 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
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| H A D | clk_rk3128.c | 27 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
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| H A D | clk_rk3188.c | 71 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
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| H A D | clk_rk3368.c | 41 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
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| H A D | clk_rv1108.c | 29 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
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| H A D | clk_rk3399.c | 40 #define RATE_TO_DIV(input_rate, output_rate) \ argument
42 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
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| H A D | clk_rk3288.c | 131 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
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| /openbmc/u-boot/drivers/clk/aspeed/ |
| H A D | clk_ast2400.c | 269 ulong input_rate; member
278 static bool ast2400_get_clock_config_default(ulong input_rate, in ast2400_get_clock_config_default()
307 static ulong ast2400_calc_clock_config(ulong input_rate, ulong requested_rate, in ast2400_calc_clock_config()
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| H A D | clk_ast2500.c | 243 ulong input_rate; member
252 static bool ast2500_get_clock_config_default(ulong input_rate, in ast2500_get_clock_config_default()
281 static ulong ast2500_calc_clock_config(ulong input_rate, ulong requested_rate, in ast2500_calc_clock_config()
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| /openbmc/u-boot/arch/arm/include/asm/arch-rockchip/ |
| H A D | clock.h | 62 static inline u32 clk_get_divisor(ulong input_rate, uint output_rate) in clk_get_divisor()
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| /openbmc/linux/drivers/clk/tegra/ |
| D | clk-pll.c | |
| D | clk-tegra210.c | |
| D | clk.h | |
| /openbmc/u-boot/drivers/spi/ |
| H A D | rk_spi.c | 48 uint input_rate; member
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| /openbmc/u-boot/arch/arm/mach-exynos/ |
| H A D | clock.c | 1408 unsigned int fine_scalar_bits, unsigned int input_rate, in clock_calc_best_scalar()
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