1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright 2010-2011 Freescale Semiconductor, Inc.
4  */
5 
6 #include <common.h>
7 #include <asm/fsl_lbc.h>
8 
9 #ifdef CONFIG_MPC85xx
10 /* Boards should provide their own version of this if they use lbc sdram */
__lbc_sdram_init(void)11 static void __lbc_sdram_init(void)
12 {
13 	/* Do nothing */
14 }
15 void lbc_sdram_init(void) __attribute__((weak, alias("__lbc_sdram_init")));
16 #endif
17 
18 
print_lbc_regs(void)19 void print_lbc_regs(void)
20 {
21 	int i;
22 
23 	printf("\nLocal Bus Controller Registers\n");
24 	for (i = 0; i < 8; i++) {
25 		printf("BR%d\t0x%08X\tOR%d\t0x%08X\n",
26 		       i, get_lbc_br(i), i, get_lbc_or(i));
27 	}
28 	printf("LBCR\t0x%08X\tLCRR\t0x%08X\n",
29 		       get_lbc_lbcr(), get_lbc_lcrr());
30 }
31 
init_early_memctl_regs(void)32 void init_early_memctl_regs(void)
33 {
34 	uint init_br1 = 1;
35 
36 #ifdef CONFIG_SYS_FSL_ERRATUM_ELBC_A001
37 	/* Set the local bus monitor timeout value to the maximum */
38 	clrsetbits_be32(&(LBC_BASE_ADDR)->lbcr, LBCR_BMT|LBCR_BMTPS, 0xf);
39 #endif
40 
41 #ifdef CONFIG_MPC85xx
42 	/* if cs1 is already set via debugger, leave cs0/cs1 alone */
43 	if (get_lbc_br(1) & BR_V)
44 		init_br1 = 0;
45 #endif
46 
47 	/*
48 	 * Map banks 0 (and maybe 1) to the FLASH banks 0 (and 1) at
49 	 * preliminary addresses - these have to be modified later
50 	 * when FLASH size has been determined
51 	 */
52 #if defined(CONFIG_SYS_OR0_REMAP)
53 	set_lbc_or(0, CONFIG_SYS_OR0_REMAP);
54 #endif
55 #if defined(CONFIG_SYS_OR1_REMAP)
56 	set_lbc_or(1, CONFIG_SYS_OR1_REMAP);
57 #endif
58 	/* now restrict to preliminary range */
59 	if (init_br1) {
60 #if defined(CONFIG_SYS_BR0_PRELIM) && defined(CONFIG_SYS_OR0_PRELIM)
61 		set_lbc_br(0, CONFIG_SYS_BR0_PRELIM);
62 		set_lbc_or(0, CONFIG_SYS_OR0_PRELIM);
63 #endif
64 
65 #if defined(CONFIG_SYS_BR1_PRELIM) && defined(CONFIG_SYS_OR1_PRELIM)
66 		set_lbc_or(1, CONFIG_SYS_OR1_PRELIM);
67 		set_lbc_br(1, CONFIG_SYS_BR1_PRELIM);
68 #endif
69 	}
70 
71 #if defined(CONFIG_SYS_BR2_PRELIM) && defined(CONFIG_SYS_OR2_PRELIM)
72 	set_lbc_or(2, CONFIG_SYS_OR2_PRELIM);
73 	set_lbc_br(2, CONFIG_SYS_BR2_PRELIM);
74 #endif
75 
76 #if defined(CONFIG_SYS_BR3_PRELIM) && defined(CONFIG_SYS_OR3_PRELIM)
77 	set_lbc_or(3, CONFIG_SYS_OR3_PRELIM);
78 	set_lbc_br(3, CONFIG_SYS_BR3_PRELIM);
79 #endif
80 
81 #if defined(CONFIG_SYS_BR4_PRELIM) && defined(CONFIG_SYS_OR4_PRELIM)
82 	set_lbc_or(4, CONFIG_SYS_OR4_PRELIM);
83 	set_lbc_br(4, CONFIG_SYS_BR4_PRELIM);
84 #endif
85 
86 #if defined(CONFIG_SYS_BR5_PRELIM) && defined(CONFIG_SYS_OR5_PRELIM)
87 	set_lbc_or(5, CONFIG_SYS_OR5_PRELIM);
88 	set_lbc_br(5, CONFIG_SYS_BR5_PRELIM);
89 #endif
90 
91 #if defined(CONFIG_SYS_BR6_PRELIM) && defined(CONFIG_SYS_OR6_PRELIM)
92 	set_lbc_or(6, CONFIG_SYS_OR6_PRELIM);
93 	set_lbc_br(6, CONFIG_SYS_BR6_PRELIM);
94 #endif
95 
96 #if defined(CONFIG_SYS_BR7_PRELIM) && defined(CONFIG_SYS_OR7_PRELIM)
97 	set_lbc_or(7, CONFIG_SYS_OR7_PRELIM);
98 	set_lbc_br(7, CONFIG_SYS_BR7_PRELIM);
99 #endif
100 }
101 
102 /*
103  * Configures a UPM. The function requires the respective MxMR to be set
104  * before calling this function. "size" is the number or entries, not a sizeof.
105  */
upmconfig(uint upm,uint * table,uint size)106 void upmconfig(uint upm, uint *table, uint size)
107 {
108 	fsl_lbc_t *lbc = LBC_BASE_ADDR;
109 	int i, mad, old_mad = 0;
110 	u32 mask = (~MxMR_OP_MSK & ~MxMR_MAD_MSK);
111 	u32 msel = BR_UPMx_TO_MSEL(upm);
112 	u32 *mxmr = &lbc->mamr + upm;
113 	volatile u8 *dummy = NULL;
114 
115 	if (upm < UPMA || upm > UPMC) {
116 		printf("Error: %s() Bad UPM index %d\n", __func__, upm);
117 		hang();
118 	}
119 
120 	/*
121 	 * Find the address for the dummy write - scan all of the BRs until we
122 	 * find one matching the UPM and extract the base address bits from it.
123 	 */
124 	for (i = 0; i < 8; i++) {
125 		if ((get_lbc_br(i) & (BR_V | BR_MSEL)) == (BR_V | msel)) {
126 			dummy = (volatile u8 *)(get_lbc_br(i) & BR_BA);
127 			break;
128 		}
129 	}
130 
131 	if (!dummy) {
132 		printf("Error: %s() No matching BR\n", __func__);
133 		hang();
134 	}
135 
136 	/* Program UPM using steps outlined by the reference manual */
137 	for (i = 0; i < size; i++) {
138 		out_be32(mxmr, (in_be32(mxmr) & mask) | MxMR_OP_WARR | i);
139 		out_be32(&lbc->mdr, table[i]);
140 		(void)in_be32(&lbc->mdr);
141 		*dummy = 0;
142 		do {
143 			mad = in_be32(mxmr) & MxMR_MAD_MSK;
144 		} while (mad <= old_mad && !(!mad && i == (size-1)));
145 		old_mad = mad;
146 	}
147 
148 	/* Return to normal operation */
149 	out_be32(mxmr, (in_be32(mxmr) & mask) | MxMR_OP_NORM);
150 }
151