1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright 2022 NXP
4 */
5
6 #include <linux/clk.h>
7 #include <linux/delay.h>
8 #include <linux/iopoll.h>
9 #include <linux/mod_devicetable.h>
10 #include <linux/module.h>
11 #include <linux/platform_device.h>
12 #include <linux/pm_domain.h>
13
14 #define MIX_SLICE_SW_CTRL_OFF 0x20
15 #define SLICE_SW_CTRL_PSW_CTRL_OFF_MASK BIT(4)
16 #define SLICE_SW_CTRL_PDN_SOFT_MASK BIT(31)
17
18 #define MIX_FUNC_STAT_OFF 0xB4
19
20 #define FUNC_STAT_PSW_STAT_MASK BIT(0)
21 #define FUNC_STAT_RST_STAT_MASK BIT(2)
22 #define FUNC_STAT_ISO_STAT_MASK BIT(4)
23 #define FUNC_STAT_SSAR_STAT_MASK BIT(8)
24
25 struct imx93_power_domain {
26 struct generic_pm_domain genpd;
27 struct device *dev;
28 void __iomem *addr;
29 struct clk_bulk_data *clks;
30 int num_clks;
31 bool init_off;
32 };
33
34 #define to_imx93_pd(_genpd) container_of(_genpd, struct imx93_power_domain, genpd)
35
imx93_pd_on(struct generic_pm_domain * genpd)36 static int imx93_pd_on(struct generic_pm_domain *genpd)
37 {
38 struct imx93_power_domain *domain = to_imx93_pd(genpd);
39 void __iomem *addr = domain->addr;
40 u32 val;
41 int ret;
42
43 ret = clk_bulk_prepare_enable(domain->num_clks, domain->clks);
44 if (ret) {
45 dev_err(domain->dev, "failed to enable clocks for domain: %s\n", genpd->name);
46 return ret;
47 }
48
49 val = readl(addr + MIX_SLICE_SW_CTRL_OFF);
50 val &= ~SLICE_SW_CTRL_PDN_SOFT_MASK;
51 writel(val, addr + MIX_SLICE_SW_CTRL_OFF);
52
53 ret = readl_poll_timeout(addr + MIX_FUNC_STAT_OFF, val,
54 !(val & FUNC_STAT_SSAR_STAT_MASK), 1, 10000);
55 if (ret) {
56 dev_err(domain->dev, "pd_on timeout: name: %s, stat: %x\n", genpd->name, val);
57 return ret;
58 }
59
60 return 0;
61 }
62
imx93_pd_off(struct generic_pm_domain * genpd)63 static int imx93_pd_off(struct generic_pm_domain *genpd)
64 {
65 struct imx93_power_domain *domain = to_imx93_pd(genpd);
66 void __iomem *addr = domain->addr;
67 int ret;
68 u32 val;
69
70 /* Power off MIX */
71 val = readl(addr + MIX_SLICE_SW_CTRL_OFF);
72 val |= SLICE_SW_CTRL_PDN_SOFT_MASK;
73 writel(val, addr + MIX_SLICE_SW_CTRL_OFF);
74
75 ret = readl_poll_timeout(addr + MIX_FUNC_STAT_OFF, val,
76 val & FUNC_STAT_PSW_STAT_MASK, 1, 10000);
77 if (ret) {
78 dev_err(domain->dev, "pd_off timeout: name: %s, stat: %x\n", genpd->name, val);
79 return ret;
80 }
81
82 clk_bulk_disable_unprepare(domain->num_clks, domain->clks);
83
84 return 0;
85 };
86
imx93_pd_remove(struct platform_device * pdev)87 static int imx93_pd_remove(struct platform_device *pdev)
88 {
89 struct imx93_power_domain *domain = platform_get_drvdata(pdev);
90 struct device *dev = &pdev->dev;
91 struct device_node *np = dev->of_node;
92
93 if (!domain->init_off)
94 clk_bulk_disable_unprepare(domain->num_clks, domain->clks);
95
96 of_genpd_del_provider(np);
97 pm_genpd_remove(&domain->genpd);
98
99 return 0;
100 }
101
imx93_pd_probe(struct platform_device * pdev)102 static int imx93_pd_probe(struct platform_device *pdev)
103 {
104 struct device *dev = &pdev->dev;
105 struct device_node *np = dev->of_node;
106 struct imx93_power_domain *domain;
107 int ret;
108
109 domain = devm_kzalloc(dev, sizeof(*domain), GFP_KERNEL);
110 if (!domain)
111 return -ENOMEM;
112
113 domain->addr = devm_platform_ioremap_resource(pdev, 0);
114 if (IS_ERR(domain->addr))
115 return PTR_ERR(domain->addr);
116
117 domain->num_clks = devm_clk_bulk_get_all(dev, &domain->clks);
118 if (domain->num_clks < 0)
119 return dev_err_probe(dev, domain->num_clks, "Failed to get domain's clocks\n");
120
121 domain->genpd.name = dev_name(dev);
122 domain->genpd.power_off = imx93_pd_off;
123 domain->genpd.power_on = imx93_pd_on;
124 domain->dev = dev;
125
126 domain->init_off = readl(domain->addr + MIX_FUNC_STAT_OFF) & FUNC_STAT_ISO_STAT_MASK;
127 /* Just to sync the status of hardware */
128 if (!domain->init_off) {
129 ret = clk_bulk_prepare_enable(domain->num_clks, domain->clks);
130 if (ret) {
131 dev_err(domain->dev, "failed to enable clocks for domain: %s\n",
132 domain->genpd.name);
133 return ret;
134 }
135 }
136
137 ret = pm_genpd_init(&domain->genpd, NULL, domain->init_off);
138 if (ret)
139 goto err_clk_unprepare;
140
141 platform_set_drvdata(pdev, domain);
142
143 ret = of_genpd_add_provider_simple(np, &domain->genpd);
144 if (ret)
145 goto err_genpd_remove;
146
147 return 0;
148
149 err_genpd_remove:
150 pm_genpd_remove(&domain->genpd);
151
152 err_clk_unprepare:
153 if (!domain->init_off)
154 clk_bulk_disable_unprepare(domain->num_clks, domain->clks);
155
156 return ret;
157 }
158
159 static const struct of_device_id imx93_pd_ids[] = {
160 { .compatible = "fsl,imx93-src-slice" },
161 { }
162 };
163 MODULE_DEVICE_TABLE(of, imx93_pd_ids);
164
165 static struct platform_driver imx93_power_domain_driver = {
166 .driver = {
167 .name = "imx93_power_domain",
168 .of_match_table = imx93_pd_ids,
169 },
170 .probe = imx93_pd_probe,
171 .remove = imx93_pd_remove,
172 };
173 module_platform_driver(imx93_power_domain_driver);
174
175 MODULE_AUTHOR("Peng Fan <peng.fan@nxp.com>");
176 MODULE_DESCRIPTION("NXP i.MX93 power domain driver");
177 MODULE_LICENSE("GPL");
178