| /openbmc/u-boot/drivers/ddr/marvell/a38x/ |
| H A D | ddr3_training.c | 279 int ddr3_tip_configure_cs(u32 dev_num, u32 if_id, u32 cs_num, u32 enable) in ddr3_tip_configure_cs()
337 u32 if_id; in hws_ddr3_tip_init_controller() local
676 static int ddr3_tip_rev2_rank_control(u32 dev_num, u32 if_id) in ddr3_tip_rev2_rank_control()
730 static int ddr3_tip_rev3_rank_control(u32 dev_num, u32 if_id) in ddr3_tip_rev3_rank_control()
763 static int ddr3_tip_rank_control(u32 dev_num, u32 if_id) in ddr3_tip_rank_control()
992 u32 if_id, u32 reg_addr, u32 data_value, u32 mask) in ddr3_tip_if_write()
1003 u32 if_id, u32 reg_addr, u32 *data, u32 mask) in ddr3_tip_if_read()
1014 u32 if_id, u32 exp_value, u32 mask, u32 offset, in ddr3_tip_if_polling()
1065 int ddr3_tip_bus_read(u32 dev_num, u32 if_id, in ddr3_tip_bus_read()
1077 u32 if_id, enum hws_access_type phy_access, in ddr3_tip_bus_write()
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| H A D | ddr3_training_leveling.c | 41 u32 bus_num, if_id, cl_val; in ddr3_tip_dynamic_read_leveling() local
317 u32 c_cs, if_id, cs_mask = 0; in ddr3_tip_legacy_dynamic_write_leveling() local
358 u32 c_cs, if_id, cs_mask = 0; in ddr3_tip_legacy_dynamic_read_leveling() local
400 u32 bus_num, if_id, cl_val, bit_num; in ddr3_tip_dynamic_per_bit_read_leveling() local
764 int ddr3_tip_calc_cs_mask(u32 dev_num, u32 if_id, u32 effective_cs, in ddr3_tip_calc_cs_mask()
807 u32 reg_data = 0, temp = 0, iter, if_id, bus_cnt; in ddr3_tip_dynamic_write_leveling() local
1177 u32 if_id, bus_id, data, data_tmp; in ddr3_tip_dynamic_write_leveling_supp() local
1287 static int ddr3_tip_wl_supp_align_phase_shift(u32 dev_num, u32 if_id, in ddr3_tip_wl_supp_align_phase_shift()
1367 static int ddr3_tip_xsb_compare_test(u32 dev_num, u32 if_id, u32 bus_id, in ddr3_tip_xsb_compare_test()
1606 u32 bus_id = 0, if_id = 0; in ddr3_tip_print_wl_supp_result() local
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| H A D | ddr3_debug.c | 113 u32 if_id, reg_addr, data_value, bus_id; in ddr3_tip_reg_dump() local
345 u32 if_id = 0; in ddr3_tip_print_log() local
513 u8 if_id = 0, csindex = 0, bus_id = 0, idx = 0; in ddr3_tip_print_stability_log() local
676 u32 if_id = 0, bus_id = 0; in ddr3_tip_read_adll_value() local
709 u32 if_id = 0, bus_id = 0; in ddr3_tip_write_adll_value() local
745 u32 if_id = 0, bus_id = 0; in read_phase_value() local
772 u32 if_id = 0, bus_id = 0; in write_leveling_value() local
834 u32 bus_cnt = 0, if_id, data_p1, data_p2, ui_data3, dev_num = 0; in ddr3_tip_print_adll() local
904 static u32 ddr3_tip_compare(u32 if_id, u32 *p_src, u32 *p_dst, in ddr3_tip_compare()
949 int if_id = 0; in ddr3_tip_run_sweep_test() local
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| H A D | ddr3_training_hw_algo.c | 43 int ddr3_tip_write_additional_odt_setting(u32 dev_num, u32 if_id) in ddr3_tip_write_additional_odt_setting()
113 int get_valid_win_rx(u32 dev_num, u32 if_id, u8 res[4]) in get_valid_win_rx()
162 u32 pup = 0, if_id = 0, num_pup = 0, rep = 0; in ddr3_tip_vref() local
631 u32 if_id = 0; in ddr3_tip_cmd_addr_init_delay() local
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| H A D | ddr3_training_ip_engine.c | 572 u32 if_id, enum hws_pattern pattern, in ddr3_tip_load_pattern_to_odpg()
626 u32 if_id, enum hws_dir direction, u32 tx_phases, in ddr3_tip_configure_odpg()
692 int ddr3_tip_read_training_result(u32 dev_num, u32 if_id, in ddr3_tip_read_training_result()
849 u32 pattern = 0, if_id; in ddr3_tip_load_all_pattern_to_mem() local
876 u32 reg_data, if_id; in ddr3_tip_load_pattern_to_mem() local
957 u32 if_id, in ddr3_tip_ip_training_wrapper_int()
1095 u32 if_id, in ddr3_tip_ip_training_wrapper()
1445 u8 mv_ddr_tip_sub_phy_byte_status_get(u32 if_id, u32 subphy_id) in mv_ddr_tip_sub_phy_byte_status_get()
1450 void mv_ddr_tip_sub_phy_byte_status_set(u32 if_id, u32 subphy_id, u8 byte_status_data) in mv_ddr_tip_sub_phy_byte_status_set()
1460 u32 bus_cnt = 0, if_id, dev_num = 0; in ddr3_tip_load_phy_values() local
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| H A D | ddr3_training_pbs.c | 48 u32 pup = 0, bit = 0, if_id = 0, all_lock = 0, cs_num = 0; in ddr3_tip_pbs() local
942 u32 data_value = 0, bit = 0, if_id = 0, pup = 0; in ddr3_tip_print_pbs_result() local
992 u32 if_id, pup, bit; in ddr3_tip_clean_pbs_result() local
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| H A D | ddr3_training_centralization.c | 56 u32 if_id, pattern_id, bit_id; in ddr3_tip_centralization() local
497 u32 if_id, pup_id, pattern_id, bit_id; in ddr3_tip_special_rx() local
698 u32 if_id = 0, bus_id = 0; in ddr3_tip_print_centralization_result() local
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| H A D | mv_ddr_plat.c | 738 static int ddr3_tip_a38x_set_divider(u8 dev_num, u32 if_id, in ddr3_tip_a38x_set_divider()
853 int ddr3_tip_ext_read(u32 dev_num, u32 if_id, u32 reg_addr, in ddr3_tip_ext_read()
867 int ddr3_tip_ext_write(u32 dev_num, u32 if_id, u32 reg_addr, in ddr3_tip_ext_write()
1373 u32 if_id, phy_id; in ddr3_tip_configure_phy() local
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| H A D | ddr3_training_bist.c | 74 int ddr3_tip_bist_read_result(u32 dev_num, u32 if_id, in ddr3_tip_bist_read_result()
169 u32 if_id, enum hws_bist_operation oper_type) in ddr3_tip_bist_operation()
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| H A D | mv_ddr_topology.h | 267 #define IS_IF_ACTIVE(if_mask, if_id) \ argument
276 #define IS_BUS_ACTIVE(if_mask , if_id) \ argument
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| /openbmc/u-boot/include/fsl-mc/ |
| H A D | fsl_dprc.h | 872 uint16_t if_id; member
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