xref: /openbmc/linux/drivers/gpu/drm/i915/i915_ioctl.c (revision 198bca93)
1 // SPDX-License-Identifier: MIT
2 /*
3  * Copyright © 2022 Intel Corporation
4  */
5 
6 #include "gt/intel_engine_regs.h"
7 
8 #include "i915_drv.h"
9 #include "i915_gem.h"
10 #include "i915_ioctl.h"
11 #include "i915_reg.h"
12 #include "intel_runtime_pm.h"
13 #include "intel_uncore.h"
14 
15 /*
16  * This file is for small ioctl functions that are out of place everywhere else,
17  * and not big enough to warrant a file of their own.
18  *
19  * This is not the dumping ground for random ioctls.
20  */
21 
22 struct reg_whitelist {
23 	i915_reg_t offset_ldw;
24 	i915_reg_t offset_udw;
25 	u8 min_graphics_ver;
26 	u8 max_graphics_ver;
27 	u8 size;
28 };
29 
30 static const struct reg_whitelist reg_read_whitelist[] = {
31 	{
32 		.offset_ldw = RING_TIMESTAMP(RENDER_RING_BASE),
33 		.offset_udw = RING_TIMESTAMP_UDW(RENDER_RING_BASE),
34 		.min_graphics_ver = 4,
35 		.max_graphics_ver = 12,
36 		.size = 8
37 	}
38 };
39 
i915_reg_read_ioctl(struct drm_device * dev,void * data,struct drm_file * unused)40 int i915_reg_read_ioctl(struct drm_device *dev,
41 			void *data, struct drm_file *unused)
42 {
43 	struct drm_i915_private *i915 = to_i915(dev);
44 	struct intel_uncore *uncore = &i915->uncore;
45 	struct drm_i915_reg_read *reg = data;
46 	struct reg_whitelist const *entry;
47 	intel_wakeref_t wakeref;
48 	unsigned int flags;
49 	int remain;
50 	int ret = 0;
51 
52 	entry = reg_read_whitelist;
53 	remain = ARRAY_SIZE(reg_read_whitelist);
54 	while (remain) {
55 		u32 entry_offset = i915_mmio_reg_offset(entry->offset_ldw);
56 
57 		GEM_BUG_ON(!is_power_of_2(entry->size));
58 		GEM_BUG_ON(entry->size > 8);
59 		GEM_BUG_ON(entry_offset & (entry->size - 1));
60 
61 		if (IS_GRAPHICS_VER(i915, entry->min_graphics_ver, entry->max_graphics_ver) &&
62 		    entry_offset == (reg->offset & -entry->size))
63 			break;
64 		entry++;
65 		remain--;
66 	}
67 
68 	if (!remain)
69 		return -EINVAL;
70 
71 	flags = reg->offset & (entry->size - 1);
72 
73 	with_intel_runtime_pm(&i915->runtime_pm, wakeref) {
74 		if (entry->size == 8 && flags == I915_REG_READ_8B_WA)
75 			reg->val = intel_uncore_read64_2x32(uncore,
76 							    entry->offset_ldw,
77 							    entry->offset_udw);
78 		else if (entry->size == 8 && flags == 0)
79 			reg->val = intel_uncore_read64(uncore,
80 						       entry->offset_ldw);
81 		else if (entry->size == 4 && flags == 0)
82 			reg->val = intel_uncore_read(uncore, entry->offset_ldw);
83 		else if (entry->size == 2 && flags == 0)
84 			reg->val = intel_uncore_read16(uncore,
85 						       entry->offset_ldw);
86 		else if (entry->size == 1 && flags == 0)
87 			reg->val = intel_uncore_read8(uncore,
88 						      entry->offset_ldw);
89 		else
90 			ret = -EINVAL;
91 	}
92 
93 	return ret;
94 }
95