1 /*
2  * Copyright 2019 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  *  and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 #include "dc_bios_types.h"
26 #include "dcn31/dcn31_hpo_dp_link_encoder.h"
27 #include "dcn32_hpo_dp_link_encoder.h"
28 #include "reg_helper.h"
29 #include "stream_encoder.h"
30 
31 #define DC_LOGGER \
32 		enc3->base.ctx->logger
33 
34 #define REG(reg)\
35 	(enc3->regs->reg)
36 
37 #undef FN
38 #define FN(reg_name, field_name) \
39 	enc3->hpo_le_shift->field_name, enc3->hpo_le_mask->field_name
40 
41 #define CTX \
42 	enc3->base.ctx
43 
dcn32_hpo_dp_link_enc_is_in_alt_mode(struct hpo_dp_link_encoder * enc)44 static bool dcn32_hpo_dp_link_enc_is_in_alt_mode(
45 		struct hpo_dp_link_encoder *enc)
46 {
47 	struct dcn31_hpo_dp_link_encoder *enc3 = DCN3_1_HPO_DP_LINK_ENC_FROM_HPO_LINK_ENC(enc);
48 	uint32_t dp_alt_mode_disable = 0;
49 
50 	ASSERT((enc->transmitter >= TRANSMITTER_UNIPHY_A) && (enc->transmitter <= TRANSMITTER_UNIPHY_E));
51 
52 	/* if value == 1 alt mode is disabled, otherwise it is enabled */
53 	REG_GET(RDPCSTX_PHY_CNTL6[enc->transmitter], RDPCS_PHY_DPALT_DISABLE, &dp_alt_mode_disable);
54 	return (dp_alt_mode_disable == 0);
55 }
56 
57 
58 
59 static struct hpo_dp_link_encoder_funcs dcn32_hpo_dp_link_encoder_funcs = {
60 	.enable_link_phy = dcn31_hpo_dp_link_enc_enable_dp_output,
61 	.disable_link_phy = dcn31_hpo_dp_link_enc_disable_output,
62 	.link_enable = dcn31_hpo_dp_link_enc_enable,
63 	.link_disable = dcn31_hpo_dp_link_enc_disable,
64 	.set_link_test_pattern = dcn31_hpo_dp_link_enc_set_link_test_pattern,
65 	.update_stream_allocation_table = dcn31_hpo_dp_link_enc_update_stream_allocation_table,
66 	.set_throttled_vcp_size = dcn31_hpo_dp_link_enc_set_throttled_vcp_size,
67 	.is_in_alt_mode = dcn32_hpo_dp_link_enc_is_in_alt_mode,
68 	.read_state = dcn31_hpo_dp_link_enc_read_state,
69 	.set_ffe = dcn31_hpo_dp_link_enc_set_ffe,
70 };
71 
hpo_dp_link_encoder32_construct(struct dcn31_hpo_dp_link_encoder * enc31,struct dc_context * ctx,uint32_t inst,const struct dcn31_hpo_dp_link_encoder_registers * hpo_le_regs,const struct dcn31_hpo_dp_link_encoder_shift * hpo_le_shift,const struct dcn31_hpo_dp_link_encoder_mask * hpo_le_mask)72 void hpo_dp_link_encoder32_construct(struct dcn31_hpo_dp_link_encoder *enc31,
73 		struct dc_context *ctx,
74 		uint32_t inst,
75 		const struct dcn31_hpo_dp_link_encoder_registers *hpo_le_regs,
76 		const struct dcn31_hpo_dp_link_encoder_shift *hpo_le_shift,
77 		const struct dcn31_hpo_dp_link_encoder_mask *hpo_le_mask)
78 {
79 	enc31->base.ctx = ctx;
80 
81 	enc31->base.inst = inst;
82 	enc31->base.funcs = &dcn32_hpo_dp_link_encoder_funcs;
83 	enc31->base.hpd_source = HPD_SOURCEID_UNKNOWN;
84 	enc31->base.transmitter = TRANSMITTER_UNKNOWN;
85 
86 	enc31->regs = hpo_le_regs;
87 	enc31->hpo_le_shift = hpo_le_shift;
88 	enc31->hpo_le_mask = hpo_le_mask;
89 }
90