1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (C) 2020, Google LLC.
4 *
5 * Tests for exiting into userspace on registered MSRs
6 */
7
8 #define _GNU_SOURCE /* for program_invocation_short_name */
9 #include <sys/ioctl.h>
10
11 #include "test_util.h"
12 #include "kvm_util.h"
13 #include "vmx.h"
14
15 /* Forced emulation prefix, used to invoke the emulator unconditionally. */
16 #define KVM_FEP "ud2; .byte 'k', 'v', 'm';"
17 #define KVM_FEP_LENGTH 5
18 static int fep_available = 1;
19
20 #define MSR_NON_EXISTENT 0x474f4f00
21
22 static u64 deny_bits = 0;
23 struct kvm_msr_filter filter_allow = {
24 .flags = KVM_MSR_FILTER_DEFAULT_ALLOW,
25 .ranges = {
26 {
27 .flags = KVM_MSR_FILTER_READ |
28 KVM_MSR_FILTER_WRITE,
29 .nmsrs = 1,
30 /* Test an MSR the kernel knows about. */
31 .base = MSR_IA32_XSS,
32 .bitmap = (uint8_t*)&deny_bits,
33 }, {
34 .flags = KVM_MSR_FILTER_READ |
35 KVM_MSR_FILTER_WRITE,
36 .nmsrs = 1,
37 /* Test an MSR the kernel doesn't know about. */
38 .base = MSR_IA32_FLUSH_CMD,
39 .bitmap = (uint8_t*)&deny_bits,
40 }, {
41 .flags = KVM_MSR_FILTER_READ |
42 KVM_MSR_FILTER_WRITE,
43 .nmsrs = 1,
44 /* Test a fabricated MSR that no one knows about. */
45 .base = MSR_NON_EXISTENT,
46 .bitmap = (uint8_t*)&deny_bits,
47 },
48 },
49 };
50
51 struct kvm_msr_filter filter_fs = {
52 .flags = KVM_MSR_FILTER_DEFAULT_ALLOW,
53 .ranges = {
54 {
55 .flags = KVM_MSR_FILTER_READ,
56 .nmsrs = 1,
57 .base = MSR_FS_BASE,
58 .bitmap = (uint8_t*)&deny_bits,
59 },
60 },
61 };
62
63 struct kvm_msr_filter filter_gs = {
64 .flags = KVM_MSR_FILTER_DEFAULT_ALLOW,
65 .ranges = {
66 {
67 .flags = KVM_MSR_FILTER_READ,
68 .nmsrs = 1,
69 .base = MSR_GS_BASE,
70 .bitmap = (uint8_t*)&deny_bits,
71 },
72 },
73 };
74
75 static uint64_t msr_non_existent_data;
76 static int guest_exception_count;
77 static u32 msr_reads, msr_writes;
78
79 static u8 bitmap_00000000[KVM_MSR_FILTER_MAX_BITMAP_SIZE];
80 static u8 bitmap_00000000_write[KVM_MSR_FILTER_MAX_BITMAP_SIZE];
81 static u8 bitmap_40000000[KVM_MSR_FILTER_MAX_BITMAP_SIZE];
82 static u8 bitmap_c0000000[KVM_MSR_FILTER_MAX_BITMAP_SIZE];
83 static u8 bitmap_c0000000_read[KVM_MSR_FILTER_MAX_BITMAP_SIZE];
84 static u8 bitmap_deadbeef[1] = { 0x1 };
85
deny_msr(uint8_t * bitmap,u32 msr)86 static void deny_msr(uint8_t *bitmap, u32 msr)
87 {
88 u32 idx = msr & (KVM_MSR_FILTER_MAX_BITMAP_SIZE - 1);
89
90 bitmap[idx / 8] &= ~(1 << (idx % 8));
91 }
92
prepare_bitmaps(void)93 static void prepare_bitmaps(void)
94 {
95 memset(bitmap_00000000, 0xff, sizeof(bitmap_00000000));
96 memset(bitmap_00000000_write, 0xff, sizeof(bitmap_00000000_write));
97 memset(bitmap_40000000, 0xff, sizeof(bitmap_40000000));
98 memset(bitmap_c0000000, 0xff, sizeof(bitmap_c0000000));
99 memset(bitmap_c0000000_read, 0xff, sizeof(bitmap_c0000000_read));
100
101 deny_msr(bitmap_00000000_write, MSR_IA32_POWER_CTL);
102 deny_msr(bitmap_c0000000_read, MSR_SYSCALL_MASK);
103 deny_msr(bitmap_c0000000_read, MSR_GS_BASE);
104 }
105
106 struct kvm_msr_filter filter_deny = {
107 .flags = KVM_MSR_FILTER_DEFAULT_DENY,
108 .ranges = {
109 {
110 .flags = KVM_MSR_FILTER_READ,
111 .base = 0x00000000,
112 .nmsrs = KVM_MSR_FILTER_MAX_BITMAP_SIZE * BITS_PER_BYTE,
113 .bitmap = bitmap_00000000,
114 }, {
115 .flags = KVM_MSR_FILTER_WRITE,
116 .base = 0x00000000,
117 .nmsrs = KVM_MSR_FILTER_MAX_BITMAP_SIZE * BITS_PER_BYTE,
118 .bitmap = bitmap_00000000_write,
119 }, {
120 .flags = KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE,
121 .base = 0x40000000,
122 .nmsrs = KVM_MSR_FILTER_MAX_BITMAP_SIZE * BITS_PER_BYTE,
123 .bitmap = bitmap_40000000,
124 }, {
125 .flags = KVM_MSR_FILTER_READ,
126 .base = 0xc0000000,
127 .nmsrs = KVM_MSR_FILTER_MAX_BITMAP_SIZE * BITS_PER_BYTE,
128 .bitmap = bitmap_c0000000_read,
129 }, {
130 .flags = KVM_MSR_FILTER_WRITE,
131 .base = 0xc0000000,
132 .nmsrs = KVM_MSR_FILTER_MAX_BITMAP_SIZE * BITS_PER_BYTE,
133 .bitmap = bitmap_c0000000,
134 }, {
135 .flags = KVM_MSR_FILTER_WRITE | KVM_MSR_FILTER_READ,
136 .base = 0xdeadbeef,
137 .nmsrs = 1,
138 .bitmap = bitmap_deadbeef,
139 },
140 },
141 };
142
143 struct kvm_msr_filter no_filter_deny = {
144 .flags = KVM_MSR_FILTER_DEFAULT_ALLOW,
145 };
146
147 /*
148 * Note: Force test_rdmsr() to not be inlined to prevent the labels,
149 * rdmsr_start and rdmsr_end, from being defined multiple times.
150 */
test_rdmsr(uint32_t msr)151 static noinline uint64_t test_rdmsr(uint32_t msr)
152 {
153 uint32_t a, d;
154
155 guest_exception_count = 0;
156
157 __asm__ __volatile__("rdmsr_start: rdmsr; rdmsr_end:" :
158 "=a"(a), "=d"(d) : "c"(msr) : "memory");
159
160 return a | ((uint64_t) d << 32);
161 }
162
163 /*
164 * Note: Force test_wrmsr() to not be inlined to prevent the labels,
165 * wrmsr_start and wrmsr_end, from being defined multiple times.
166 */
test_wrmsr(uint32_t msr,uint64_t value)167 static noinline void test_wrmsr(uint32_t msr, uint64_t value)
168 {
169 uint32_t a = value;
170 uint32_t d = value >> 32;
171
172 guest_exception_count = 0;
173
174 __asm__ __volatile__("wrmsr_start: wrmsr; wrmsr_end:" ::
175 "a"(a), "d"(d), "c"(msr) : "memory");
176 }
177
178 extern char rdmsr_start, rdmsr_end;
179 extern char wrmsr_start, wrmsr_end;
180
181 /*
182 * Note: Force test_em_rdmsr() to not be inlined to prevent the labels,
183 * rdmsr_start and rdmsr_end, from being defined multiple times.
184 */
test_em_rdmsr(uint32_t msr)185 static noinline uint64_t test_em_rdmsr(uint32_t msr)
186 {
187 uint32_t a, d;
188
189 guest_exception_count = 0;
190
191 __asm__ __volatile__(KVM_FEP "em_rdmsr_start: rdmsr; em_rdmsr_end:" :
192 "=a"(a), "=d"(d) : "c"(msr) : "memory");
193
194 return a | ((uint64_t) d << 32);
195 }
196
197 /*
198 * Note: Force test_em_wrmsr() to not be inlined to prevent the labels,
199 * wrmsr_start and wrmsr_end, from being defined multiple times.
200 */
test_em_wrmsr(uint32_t msr,uint64_t value)201 static noinline void test_em_wrmsr(uint32_t msr, uint64_t value)
202 {
203 uint32_t a = value;
204 uint32_t d = value >> 32;
205
206 guest_exception_count = 0;
207
208 __asm__ __volatile__(KVM_FEP "em_wrmsr_start: wrmsr; em_wrmsr_end:" ::
209 "a"(a), "d"(d), "c"(msr) : "memory");
210 }
211
212 extern char em_rdmsr_start, em_rdmsr_end;
213 extern char em_wrmsr_start, em_wrmsr_end;
214
guest_code_filter_allow(void)215 static void guest_code_filter_allow(void)
216 {
217 uint64_t data;
218
219 /*
220 * Test userspace intercepting rdmsr / wrmsr for MSR_IA32_XSS.
221 *
222 * A GP is thrown if anything other than 0 is written to
223 * MSR_IA32_XSS.
224 */
225 data = test_rdmsr(MSR_IA32_XSS);
226 GUEST_ASSERT(data == 0);
227 GUEST_ASSERT(guest_exception_count == 0);
228
229 test_wrmsr(MSR_IA32_XSS, 0);
230 GUEST_ASSERT(guest_exception_count == 0);
231
232 test_wrmsr(MSR_IA32_XSS, 1);
233 GUEST_ASSERT(guest_exception_count == 1);
234
235 /*
236 * Test userspace intercepting rdmsr / wrmsr for MSR_IA32_FLUSH_CMD.
237 *
238 * A GP is thrown if MSR_IA32_FLUSH_CMD is read
239 * from or if a value other than 1 is written to it.
240 */
241 test_rdmsr(MSR_IA32_FLUSH_CMD);
242 GUEST_ASSERT(guest_exception_count == 1);
243
244 test_wrmsr(MSR_IA32_FLUSH_CMD, 0);
245 GUEST_ASSERT(guest_exception_count == 1);
246
247 test_wrmsr(MSR_IA32_FLUSH_CMD, 1);
248 GUEST_ASSERT(guest_exception_count == 0);
249
250 /*
251 * Test userspace intercepting rdmsr / wrmsr for MSR_NON_EXISTENT.
252 *
253 * Test that a fabricated MSR can pass through the kernel
254 * and be handled in userspace.
255 */
256 test_wrmsr(MSR_NON_EXISTENT, 2);
257 GUEST_ASSERT(guest_exception_count == 0);
258
259 data = test_rdmsr(MSR_NON_EXISTENT);
260 GUEST_ASSERT(data == 2);
261 GUEST_ASSERT(guest_exception_count == 0);
262
263 /*
264 * Test to see if the instruction emulator is available (ie: the module
265 * parameter 'kvm.force_emulation_prefix=1' is set). This instruction
266 * will #UD if it isn't available.
267 */
268 __asm__ __volatile__(KVM_FEP "nop");
269
270 if (fep_available) {
271 /* Let userspace know we aren't done. */
272 GUEST_SYNC(0);
273
274 /*
275 * Now run the same tests with the instruction emulator.
276 */
277 data = test_em_rdmsr(MSR_IA32_XSS);
278 GUEST_ASSERT(data == 0);
279 GUEST_ASSERT(guest_exception_count == 0);
280 test_em_wrmsr(MSR_IA32_XSS, 0);
281 GUEST_ASSERT(guest_exception_count == 0);
282 test_em_wrmsr(MSR_IA32_XSS, 1);
283 GUEST_ASSERT(guest_exception_count == 1);
284
285 test_em_rdmsr(MSR_IA32_FLUSH_CMD);
286 GUEST_ASSERT(guest_exception_count == 1);
287 test_em_wrmsr(MSR_IA32_FLUSH_CMD, 0);
288 GUEST_ASSERT(guest_exception_count == 1);
289 test_em_wrmsr(MSR_IA32_FLUSH_CMD, 1);
290 GUEST_ASSERT(guest_exception_count == 0);
291
292 test_em_wrmsr(MSR_NON_EXISTENT, 2);
293 GUEST_ASSERT(guest_exception_count == 0);
294 data = test_em_rdmsr(MSR_NON_EXISTENT);
295 GUEST_ASSERT(data == 2);
296 GUEST_ASSERT(guest_exception_count == 0);
297 }
298
299 GUEST_DONE();
300 }
301
guest_msr_calls(bool trapped)302 static void guest_msr_calls(bool trapped)
303 {
304 /* This goes into the in-kernel emulation */
305 wrmsr(MSR_SYSCALL_MASK, 0);
306
307 if (trapped) {
308 /* This goes into user space emulation */
309 GUEST_ASSERT(rdmsr(MSR_SYSCALL_MASK) == MSR_SYSCALL_MASK);
310 GUEST_ASSERT(rdmsr(MSR_GS_BASE) == MSR_GS_BASE);
311 } else {
312 GUEST_ASSERT(rdmsr(MSR_SYSCALL_MASK) != MSR_SYSCALL_MASK);
313 GUEST_ASSERT(rdmsr(MSR_GS_BASE) != MSR_GS_BASE);
314 }
315
316 /* If trapped == true, this goes into user space emulation */
317 wrmsr(MSR_IA32_POWER_CTL, 0x1234);
318
319 /* This goes into the in-kernel emulation */
320 rdmsr(MSR_IA32_POWER_CTL);
321
322 /* Invalid MSR, should always be handled by user space exit */
323 GUEST_ASSERT(rdmsr(0xdeadbeef) == 0xdeadbeef);
324 wrmsr(0xdeadbeef, 0x1234);
325 }
326
guest_code_filter_deny(void)327 static void guest_code_filter_deny(void)
328 {
329 guest_msr_calls(true);
330
331 /*
332 * Disable msr filtering, so that the kernel
333 * handles everything in the next round
334 */
335 GUEST_SYNC(0);
336
337 guest_msr_calls(false);
338
339 GUEST_DONE();
340 }
341
guest_code_permission_bitmap(void)342 static void guest_code_permission_bitmap(void)
343 {
344 uint64_t data;
345
346 data = test_rdmsr(MSR_FS_BASE);
347 GUEST_ASSERT(data == MSR_FS_BASE);
348 data = test_rdmsr(MSR_GS_BASE);
349 GUEST_ASSERT(data != MSR_GS_BASE);
350
351 /* Let userspace know to switch the filter */
352 GUEST_SYNC(0);
353
354 data = test_rdmsr(MSR_FS_BASE);
355 GUEST_ASSERT(data != MSR_FS_BASE);
356 data = test_rdmsr(MSR_GS_BASE);
357 GUEST_ASSERT(data == MSR_GS_BASE);
358
359 GUEST_DONE();
360 }
361
__guest_gp_handler(struct ex_regs * regs,char * r_start,char * r_end,char * w_start,char * w_end)362 static void __guest_gp_handler(struct ex_regs *regs,
363 char *r_start, char *r_end,
364 char *w_start, char *w_end)
365 {
366 if (regs->rip == (uintptr_t)r_start) {
367 regs->rip = (uintptr_t)r_end;
368 regs->rax = 0;
369 regs->rdx = 0;
370 } else if (regs->rip == (uintptr_t)w_start) {
371 regs->rip = (uintptr_t)w_end;
372 } else {
373 GUEST_ASSERT(!"RIP is at an unknown location!");
374 }
375
376 ++guest_exception_count;
377 }
378
guest_gp_handler(struct ex_regs * regs)379 static void guest_gp_handler(struct ex_regs *regs)
380 {
381 __guest_gp_handler(regs, &rdmsr_start, &rdmsr_end,
382 &wrmsr_start, &wrmsr_end);
383 }
384
guest_fep_gp_handler(struct ex_regs * regs)385 static void guest_fep_gp_handler(struct ex_regs *regs)
386 {
387 __guest_gp_handler(regs, &em_rdmsr_start, &em_rdmsr_end,
388 &em_wrmsr_start, &em_wrmsr_end);
389 }
390
guest_ud_handler(struct ex_regs * regs)391 static void guest_ud_handler(struct ex_regs *regs)
392 {
393 fep_available = 0;
394 regs->rip += KVM_FEP_LENGTH;
395 }
396
check_for_guest_assert(struct kvm_vcpu * vcpu)397 static void check_for_guest_assert(struct kvm_vcpu *vcpu)
398 {
399 struct ucall uc;
400
401 if (vcpu->run->exit_reason == KVM_EXIT_IO &&
402 get_ucall(vcpu, &uc) == UCALL_ABORT) {
403 REPORT_GUEST_ASSERT(uc);
404 }
405 }
406
process_rdmsr(struct kvm_vcpu * vcpu,uint32_t msr_index)407 static void process_rdmsr(struct kvm_vcpu *vcpu, uint32_t msr_index)
408 {
409 struct kvm_run *run = vcpu->run;
410
411 check_for_guest_assert(vcpu);
412
413 TEST_ASSERT_KVM_EXIT_REASON(vcpu, KVM_EXIT_X86_RDMSR);
414 TEST_ASSERT(run->msr.index == msr_index,
415 "Unexpected msr (0x%04x), expected 0x%04x",
416 run->msr.index, msr_index);
417
418 switch (run->msr.index) {
419 case MSR_IA32_XSS:
420 run->msr.data = 0;
421 break;
422 case MSR_IA32_FLUSH_CMD:
423 run->msr.error = 1;
424 break;
425 case MSR_NON_EXISTENT:
426 run->msr.data = msr_non_existent_data;
427 break;
428 case MSR_FS_BASE:
429 run->msr.data = MSR_FS_BASE;
430 break;
431 case MSR_GS_BASE:
432 run->msr.data = MSR_GS_BASE;
433 break;
434 default:
435 TEST_ASSERT(false, "Unexpected MSR: 0x%04x", run->msr.index);
436 }
437 }
438
process_wrmsr(struct kvm_vcpu * vcpu,uint32_t msr_index)439 static void process_wrmsr(struct kvm_vcpu *vcpu, uint32_t msr_index)
440 {
441 struct kvm_run *run = vcpu->run;
442
443 check_for_guest_assert(vcpu);
444
445 TEST_ASSERT_KVM_EXIT_REASON(vcpu, KVM_EXIT_X86_WRMSR);
446 TEST_ASSERT(run->msr.index == msr_index,
447 "Unexpected msr (0x%04x), expected 0x%04x",
448 run->msr.index, msr_index);
449
450 switch (run->msr.index) {
451 case MSR_IA32_XSS:
452 if (run->msr.data != 0)
453 run->msr.error = 1;
454 break;
455 case MSR_IA32_FLUSH_CMD:
456 if (run->msr.data != 1)
457 run->msr.error = 1;
458 break;
459 case MSR_NON_EXISTENT:
460 msr_non_existent_data = run->msr.data;
461 break;
462 default:
463 TEST_ASSERT(false, "Unexpected MSR: 0x%04x", run->msr.index);
464 }
465 }
466
process_ucall_done(struct kvm_vcpu * vcpu)467 static void process_ucall_done(struct kvm_vcpu *vcpu)
468 {
469 struct ucall uc;
470
471 check_for_guest_assert(vcpu);
472
473 TEST_ASSERT_KVM_EXIT_REASON(vcpu, KVM_EXIT_IO);
474
475 TEST_ASSERT(get_ucall(vcpu, &uc) == UCALL_DONE,
476 "Unexpected ucall command: %lu, expected UCALL_DONE (%d)",
477 uc.cmd, UCALL_DONE);
478 }
479
process_ucall(struct kvm_vcpu * vcpu)480 static uint64_t process_ucall(struct kvm_vcpu *vcpu)
481 {
482 struct ucall uc = {};
483
484 check_for_guest_assert(vcpu);
485
486 TEST_ASSERT_KVM_EXIT_REASON(vcpu, KVM_EXIT_IO);
487
488 switch (get_ucall(vcpu, &uc)) {
489 case UCALL_SYNC:
490 break;
491 case UCALL_ABORT:
492 check_for_guest_assert(vcpu);
493 break;
494 case UCALL_DONE:
495 process_ucall_done(vcpu);
496 break;
497 default:
498 TEST_ASSERT(false, "Unexpected ucall");
499 }
500
501 return uc.cmd;
502 }
503
run_guest_then_process_rdmsr(struct kvm_vcpu * vcpu,uint32_t msr_index)504 static void run_guest_then_process_rdmsr(struct kvm_vcpu *vcpu,
505 uint32_t msr_index)
506 {
507 vcpu_run(vcpu);
508 process_rdmsr(vcpu, msr_index);
509 }
510
run_guest_then_process_wrmsr(struct kvm_vcpu * vcpu,uint32_t msr_index)511 static void run_guest_then_process_wrmsr(struct kvm_vcpu *vcpu,
512 uint32_t msr_index)
513 {
514 vcpu_run(vcpu);
515 process_wrmsr(vcpu, msr_index);
516 }
517
run_guest_then_process_ucall(struct kvm_vcpu * vcpu)518 static uint64_t run_guest_then_process_ucall(struct kvm_vcpu *vcpu)
519 {
520 vcpu_run(vcpu);
521 return process_ucall(vcpu);
522 }
523
run_guest_then_process_ucall_done(struct kvm_vcpu * vcpu)524 static void run_guest_then_process_ucall_done(struct kvm_vcpu *vcpu)
525 {
526 vcpu_run(vcpu);
527 process_ucall_done(vcpu);
528 }
529
test_msr_filter_allow(void)530 static void test_msr_filter_allow(void)
531 {
532 struct kvm_vcpu *vcpu;
533 struct kvm_vm *vm;
534 int rc;
535
536 vm = vm_create_with_one_vcpu(&vcpu, guest_code_filter_allow);
537
538 rc = kvm_check_cap(KVM_CAP_X86_USER_SPACE_MSR);
539 TEST_ASSERT(rc, "KVM_CAP_X86_USER_SPACE_MSR is available");
540 vm_enable_cap(vm, KVM_CAP_X86_USER_SPACE_MSR, KVM_MSR_EXIT_REASON_FILTER);
541
542 rc = kvm_check_cap(KVM_CAP_X86_MSR_FILTER);
543 TEST_ASSERT(rc, "KVM_CAP_X86_MSR_FILTER is available");
544
545 vm_ioctl(vm, KVM_X86_SET_MSR_FILTER, &filter_allow);
546
547 vm_init_descriptor_tables(vm);
548 vcpu_init_descriptor_tables(vcpu);
549
550 vm_install_exception_handler(vm, GP_VECTOR, guest_gp_handler);
551
552 /* Process guest code userspace exits. */
553 run_guest_then_process_rdmsr(vcpu, MSR_IA32_XSS);
554 run_guest_then_process_wrmsr(vcpu, MSR_IA32_XSS);
555 run_guest_then_process_wrmsr(vcpu, MSR_IA32_XSS);
556
557 run_guest_then_process_rdmsr(vcpu, MSR_IA32_FLUSH_CMD);
558 run_guest_then_process_wrmsr(vcpu, MSR_IA32_FLUSH_CMD);
559 run_guest_then_process_wrmsr(vcpu, MSR_IA32_FLUSH_CMD);
560
561 run_guest_then_process_wrmsr(vcpu, MSR_NON_EXISTENT);
562 run_guest_then_process_rdmsr(vcpu, MSR_NON_EXISTENT);
563
564 vm_install_exception_handler(vm, UD_VECTOR, guest_ud_handler);
565 vcpu_run(vcpu);
566 vm_install_exception_handler(vm, UD_VECTOR, NULL);
567
568 if (process_ucall(vcpu) != UCALL_DONE) {
569 vm_install_exception_handler(vm, GP_VECTOR, guest_fep_gp_handler);
570
571 /* Process emulated rdmsr and wrmsr instructions. */
572 run_guest_then_process_rdmsr(vcpu, MSR_IA32_XSS);
573 run_guest_then_process_wrmsr(vcpu, MSR_IA32_XSS);
574 run_guest_then_process_wrmsr(vcpu, MSR_IA32_XSS);
575
576 run_guest_then_process_rdmsr(vcpu, MSR_IA32_FLUSH_CMD);
577 run_guest_then_process_wrmsr(vcpu, MSR_IA32_FLUSH_CMD);
578 run_guest_then_process_wrmsr(vcpu, MSR_IA32_FLUSH_CMD);
579
580 run_guest_then_process_wrmsr(vcpu, MSR_NON_EXISTENT);
581 run_guest_then_process_rdmsr(vcpu, MSR_NON_EXISTENT);
582
583 /* Confirm the guest completed without issues. */
584 run_guest_then_process_ucall_done(vcpu);
585 } else {
586 printf("To run the instruction emulated tests set the module parameter 'kvm.force_emulation_prefix=1'\n");
587 }
588
589 kvm_vm_free(vm);
590 }
591
handle_ucall(struct kvm_vcpu * vcpu)592 static int handle_ucall(struct kvm_vcpu *vcpu)
593 {
594 struct ucall uc;
595
596 switch (get_ucall(vcpu, &uc)) {
597 case UCALL_ABORT:
598 REPORT_GUEST_ASSERT(uc);
599 break;
600 case UCALL_SYNC:
601 vm_ioctl(vcpu->vm, KVM_X86_SET_MSR_FILTER, &no_filter_deny);
602 break;
603 case UCALL_DONE:
604 return 1;
605 default:
606 TEST_FAIL("Unknown ucall %lu", uc.cmd);
607 }
608
609 return 0;
610 }
611
handle_rdmsr(struct kvm_run * run)612 static void handle_rdmsr(struct kvm_run *run)
613 {
614 run->msr.data = run->msr.index;
615 msr_reads++;
616
617 if (run->msr.index == MSR_SYSCALL_MASK ||
618 run->msr.index == MSR_GS_BASE) {
619 TEST_ASSERT(run->msr.reason == KVM_MSR_EXIT_REASON_FILTER,
620 "MSR read trap w/o access fault");
621 }
622
623 if (run->msr.index == 0xdeadbeef) {
624 TEST_ASSERT(run->msr.reason == KVM_MSR_EXIT_REASON_UNKNOWN,
625 "MSR deadbeef read trap w/o inval fault");
626 }
627 }
628
handle_wrmsr(struct kvm_run * run)629 static void handle_wrmsr(struct kvm_run *run)
630 {
631 /* ignore */
632 msr_writes++;
633
634 if (run->msr.index == MSR_IA32_POWER_CTL) {
635 TEST_ASSERT(run->msr.data == 0x1234,
636 "MSR data for MSR_IA32_POWER_CTL incorrect");
637 TEST_ASSERT(run->msr.reason == KVM_MSR_EXIT_REASON_FILTER,
638 "MSR_IA32_POWER_CTL trap w/o access fault");
639 }
640
641 if (run->msr.index == 0xdeadbeef) {
642 TEST_ASSERT(run->msr.data == 0x1234,
643 "MSR data for deadbeef incorrect");
644 TEST_ASSERT(run->msr.reason == KVM_MSR_EXIT_REASON_UNKNOWN,
645 "deadbeef trap w/o inval fault");
646 }
647 }
648
test_msr_filter_deny(void)649 static void test_msr_filter_deny(void)
650 {
651 struct kvm_vcpu *vcpu;
652 struct kvm_vm *vm;
653 struct kvm_run *run;
654 int rc;
655
656 vm = vm_create_with_one_vcpu(&vcpu, guest_code_filter_deny);
657 run = vcpu->run;
658
659 rc = kvm_check_cap(KVM_CAP_X86_USER_SPACE_MSR);
660 TEST_ASSERT(rc, "KVM_CAP_X86_USER_SPACE_MSR is available");
661 vm_enable_cap(vm, KVM_CAP_X86_USER_SPACE_MSR, KVM_MSR_EXIT_REASON_INVAL |
662 KVM_MSR_EXIT_REASON_UNKNOWN |
663 KVM_MSR_EXIT_REASON_FILTER);
664
665 rc = kvm_check_cap(KVM_CAP_X86_MSR_FILTER);
666 TEST_ASSERT(rc, "KVM_CAP_X86_MSR_FILTER is available");
667
668 prepare_bitmaps();
669 vm_ioctl(vm, KVM_X86_SET_MSR_FILTER, &filter_deny);
670
671 while (1) {
672 vcpu_run(vcpu);
673
674 switch (run->exit_reason) {
675 case KVM_EXIT_X86_RDMSR:
676 handle_rdmsr(run);
677 break;
678 case KVM_EXIT_X86_WRMSR:
679 handle_wrmsr(run);
680 break;
681 case KVM_EXIT_IO:
682 if (handle_ucall(vcpu))
683 goto done;
684 break;
685 }
686
687 }
688
689 done:
690 TEST_ASSERT(msr_reads == 4, "Handled 4 rdmsr in user space");
691 TEST_ASSERT(msr_writes == 3, "Handled 3 wrmsr in user space");
692
693 kvm_vm_free(vm);
694 }
695
test_msr_permission_bitmap(void)696 static void test_msr_permission_bitmap(void)
697 {
698 struct kvm_vcpu *vcpu;
699 struct kvm_vm *vm;
700 int rc;
701
702 vm = vm_create_with_one_vcpu(&vcpu, guest_code_permission_bitmap);
703
704 rc = kvm_check_cap(KVM_CAP_X86_USER_SPACE_MSR);
705 TEST_ASSERT(rc, "KVM_CAP_X86_USER_SPACE_MSR is available");
706 vm_enable_cap(vm, KVM_CAP_X86_USER_SPACE_MSR, KVM_MSR_EXIT_REASON_FILTER);
707
708 rc = kvm_check_cap(KVM_CAP_X86_MSR_FILTER);
709 TEST_ASSERT(rc, "KVM_CAP_X86_MSR_FILTER is available");
710
711 vm_ioctl(vm, KVM_X86_SET_MSR_FILTER, &filter_fs);
712 run_guest_then_process_rdmsr(vcpu, MSR_FS_BASE);
713 TEST_ASSERT(run_guest_then_process_ucall(vcpu) == UCALL_SYNC,
714 "Expected ucall state to be UCALL_SYNC.");
715 vm_ioctl(vm, KVM_X86_SET_MSR_FILTER, &filter_gs);
716 run_guest_then_process_rdmsr(vcpu, MSR_GS_BASE);
717 run_guest_then_process_ucall_done(vcpu);
718
719 kvm_vm_free(vm);
720 }
721
722 #define test_user_exit_msr_ioctl(vm, cmd, arg, flag, valid_mask) \
723 ({ \
724 int r = __vm_ioctl(vm, cmd, arg); \
725 \
726 if (flag & valid_mask) \
727 TEST_ASSERT(!r, __KVM_IOCTL_ERROR(#cmd, r)); \
728 else \
729 TEST_ASSERT(r == -1 && errno == EINVAL, \
730 "Wanted EINVAL for %s with flag = 0x%llx, got rc: %i errno: %i (%s)", \
731 #cmd, flag, r, errno, strerror(errno)); \
732 })
733
run_user_space_msr_flag_test(struct kvm_vm * vm)734 static void run_user_space_msr_flag_test(struct kvm_vm *vm)
735 {
736 struct kvm_enable_cap cap = { .cap = KVM_CAP_X86_USER_SPACE_MSR };
737 int nflags = sizeof(cap.args[0]) * BITS_PER_BYTE;
738 int rc;
739 int i;
740
741 rc = kvm_check_cap(KVM_CAP_X86_USER_SPACE_MSR);
742 TEST_ASSERT(rc, "KVM_CAP_X86_USER_SPACE_MSR is available");
743
744 for (i = 0; i < nflags; i++) {
745 cap.args[0] = BIT_ULL(i);
746 test_user_exit_msr_ioctl(vm, KVM_ENABLE_CAP, &cap,
747 BIT_ULL(i), KVM_MSR_EXIT_REASON_VALID_MASK);
748 }
749 }
750
run_msr_filter_flag_test(struct kvm_vm * vm)751 static void run_msr_filter_flag_test(struct kvm_vm *vm)
752 {
753 u64 deny_bits = 0;
754 struct kvm_msr_filter filter = {
755 .flags = KVM_MSR_FILTER_DEFAULT_ALLOW,
756 .ranges = {
757 {
758 .flags = KVM_MSR_FILTER_READ,
759 .nmsrs = 1,
760 .base = 0,
761 .bitmap = (uint8_t *)&deny_bits,
762 },
763 },
764 };
765 int nflags;
766 int rc;
767 int i;
768
769 rc = kvm_check_cap(KVM_CAP_X86_MSR_FILTER);
770 TEST_ASSERT(rc, "KVM_CAP_X86_MSR_FILTER is available");
771
772 nflags = sizeof(filter.flags) * BITS_PER_BYTE;
773 for (i = 0; i < nflags; i++) {
774 filter.flags = BIT_ULL(i);
775 test_user_exit_msr_ioctl(vm, KVM_X86_SET_MSR_FILTER, &filter,
776 BIT_ULL(i), KVM_MSR_FILTER_VALID_MASK);
777 }
778
779 filter.flags = KVM_MSR_FILTER_DEFAULT_ALLOW;
780 nflags = sizeof(filter.ranges[0].flags) * BITS_PER_BYTE;
781 for (i = 0; i < nflags; i++) {
782 filter.ranges[0].flags = BIT_ULL(i);
783 test_user_exit_msr_ioctl(vm, KVM_X86_SET_MSR_FILTER, &filter,
784 BIT_ULL(i), KVM_MSR_FILTER_RANGE_VALID_MASK);
785 }
786 }
787
788 /* Test that attempts to write to the unused bits in a flag fails. */
test_user_exit_msr_flags(void)789 static void test_user_exit_msr_flags(void)
790 {
791 struct kvm_vcpu *vcpu;
792 struct kvm_vm *vm;
793
794 vm = vm_create_with_one_vcpu(&vcpu, NULL);
795
796 /* Test flags for KVM_CAP_X86_USER_SPACE_MSR. */
797 run_user_space_msr_flag_test(vm);
798
799 /* Test flags and range flags for KVM_X86_SET_MSR_FILTER. */
800 run_msr_filter_flag_test(vm);
801
802 kvm_vm_free(vm);
803 }
804
main(int argc,char * argv[])805 int main(int argc, char *argv[])
806 {
807 test_msr_filter_allow();
808
809 test_msr_filter_deny();
810
811 test_msr_permission_bitmap();
812
813 test_user_exit_msr_flags();
814
815 return 0;
816 }
817