xref: /openbmc/qemu/target/mips/fpu_helper.h (revision 0c587f13)
1 /*
2  * Helpers for emulation of FPU-related MIPS instructions.
3  *
4  *  Copyright (C) 2004-2005  Jocelyn Mayer
5  *
6  * SPDX-License-Identifier: LGPL-2.1-or-later
7  */
8 #include "fpu/softfloat-helpers.h"
9 #include "cpu.h"
10 
11 extern const FloatRoundMode ieee_rm[4];
12 
13 uint32_t float_class_s(uint32_t arg, float_status *fst);
14 uint64_t float_class_d(uint64_t arg, float_status *fst);
15 
restore_rounding_mode(CPUMIPSState * env)16 static inline void restore_rounding_mode(CPUMIPSState *env)
17 {
18     set_float_rounding_mode(ieee_rm[env->active_fpu.fcr31 & 3],
19                             &env->active_fpu.fp_status);
20 }
21 
restore_flush_mode(CPUMIPSState * env)22 static inline void restore_flush_mode(CPUMIPSState *env)
23 {
24     set_flush_to_zero((env->active_fpu.fcr31 & (1 << FCR31_FS)) != 0,
25                       &env->active_fpu.fp_status);
26 }
27 
restore_snan_bit_mode(CPUMIPSState * env)28 static inline void restore_snan_bit_mode(CPUMIPSState *env)
29 {
30     bool nan2008 = env->active_fpu.fcr31 & (1 << FCR31_NAN2008);
31 
32     /*
33      * With nan2008, SNaNs are silenced in the usual way.
34      * Before that, SNaNs are not silenced; default nans are produced.
35      */
36     set_snan_bit_is_one(!nan2008, &env->active_fpu.fp_status);
37     set_default_nan_mode(!nan2008, &env->active_fpu.fp_status);
38 }
39 
restore_fp_status(CPUMIPSState * env)40 static inline void restore_fp_status(CPUMIPSState *env)
41 {
42     restore_rounding_mode(env);
43     restore_flush_mode(env);
44     restore_snan_bit_mode(env);
45 }
46 
fp_reset(CPUMIPSState * env)47 static inline void fp_reset(CPUMIPSState *env)
48 {
49     restore_fp_status(env);
50 
51     /*
52      * According to MIPS specifications, if one of the two operands is
53      * a sNaN, a new qNaN has to be generated. This is done in
54      * floatXX_silence_nan(). For qNaN inputs the specifications
55      * says: "When possible, this QNaN result is one of the operand QNaN
56      * values." In practice it seems that most implementations choose
57      * the first operand if both operands are qNaN. In short this gives
58      * the following rules:
59      *  1. A if it is signaling
60      *  2. B if it is signaling
61      *  3. A (quiet)
62      *  4. B (quiet)
63      * A signaling NaN is always silenced before returning it.
64      */
65     set_float_2nan_prop_rule(float_2nan_prop_s_ab,
66                              &env->active_fpu.fp_status);
67 }
68 
69 /* MSA */
70 
71 enum CPUMIPSMSADataFormat {
72     DF_BYTE = 0,
73     DF_HALF,
74     DF_WORD,
75     DF_DOUBLE
76 };
77 
restore_msa_fp_status(CPUMIPSState * env)78 static inline void restore_msa_fp_status(CPUMIPSState *env)
79 {
80     float_status *status = &env->active_tc.msa_fp_status;
81     int rounding_mode = (env->active_tc.msacsr & MSACSR_RM_MASK) >> MSACSR_RM;
82     bool flush_to_zero = (env->active_tc.msacsr & MSACSR_FS_MASK) != 0;
83 
84     set_float_rounding_mode(ieee_rm[rounding_mode], status);
85     set_flush_to_zero(flush_to_zero, status);
86     set_flush_inputs_to_zero(flush_to_zero, status);
87 }
88