1 // SPDX-License-Identifier: GPL-2.0-only
2 #include <linux/extable.h>
3 #include <linux/uaccess.h>
4 #include <linux/sched/debug.h>
5 #include <linux/bitfield.h>
6 #include <xen/xen.h>
7
8 #include <asm/fpu/api.h>
9 #include <asm/sev.h>
10 #include <asm/traps.h>
11 #include <asm/kdebug.h>
12 #include <asm/insn-eval.h>
13 #include <asm/sgx.h>
14
pt_regs_nr(struct pt_regs * regs,int nr)15 static inline unsigned long *pt_regs_nr(struct pt_regs *regs, int nr)
16 {
17 int reg_offset = pt_regs_offset(regs, nr);
18 static unsigned long __dummy;
19
20 if (WARN_ON_ONCE(reg_offset < 0))
21 return &__dummy;
22
23 return (unsigned long *)((unsigned long)regs + reg_offset);
24 }
25
26 static inline unsigned long
ex_fixup_addr(const struct exception_table_entry * x)27 ex_fixup_addr(const struct exception_table_entry *x)
28 {
29 return (unsigned long)&x->fixup + x->fixup;
30 }
31
ex_handler_default(const struct exception_table_entry * e,struct pt_regs * regs)32 static bool ex_handler_default(const struct exception_table_entry *e,
33 struct pt_regs *regs)
34 {
35 if (e->data & EX_FLAG_CLEAR_AX)
36 regs->ax = 0;
37 if (e->data & EX_FLAG_CLEAR_DX)
38 regs->dx = 0;
39
40 regs->ip = ex_fixup_addr(e);
41 return true;
42 }
43
44 /*
45 * This is the *very* rare case where we do a "load_unaligned_zeropad()"
46 * and it's a page crosser into a non-existent page.
47 *
48 * This happens when we optimistically load a pathname a word-at-a-time
49 * and the name is less than the full word and the next page is not
50 * mapped. Typically that only happens for CONFIG_DEBUG_PAGEALLOC.
51 *
52 * NOTE! The faulting address is always a 'mov mem,reg' type instruction
53 * of size 'long', and the exception fixup must always point to right
54 * after the instruction.
55 */
ex_handler_zeropad(const struct exception_table_entry * e,struct pt_regs * regs,unsigned long fault_addr)56 static bool ex_handler_zeropad(const struct exception_table_entry *e,
57 struct pt_regs *regs,
58 unsigned long fault_addr)
59 {
60 struct insn insn;
61 const unsigned long mask = sizeof(long) - 1;
62 unsigned long offset, addr, next_ip, len;
63 unsigned long *reg;
64
65 next_ip = ex_fixup_addr(e);
66 len = next_ip - regs->ip;
67 if (len > MAX_INSN_SIZE)
68 return false;
69
70 if (insn_decode(&insn, (void *) regs->ip, len, INSN_MODE_KERN))
71 return false;
72 if (insn.length != len)
73 return false;
74
75 if (insn.opcode.bytes[0] != 0x8b)
76 return false;
77 if (insn.opnd_bytes != sizeof(long))
78 return false;
79
80 addr = (unsigned long) insn_get_addr_ref(&insn, regs);
81 if (addr == ~0ul)
82 return false;
83
84 offset = addr & mask;
85 addr = addr & ~mask;
86 if (fault_addr != addr + sizeof(long))
87 return false;
88
89 reg = insn_get_modrm_reg_ptr(&insn, regs);
90 if (!reg)
91 return false;
92
93 *reg = *(unsigned long *)addr >> (offset * 8);
94 return ex_handler_default(e, regs);
95 }
96
ex_handler_fault(const struct exception_table_entry * fixup,struct pt_regs * regs,int trapnr)97 static bool ex_handler_fault(const struct exception_table_entry *fixup,
98 struct pt_regs *regs, int trapnr)
99 {
100 regs->ax = trapnr;
101 return ex_handler_default(fixup, regs);
102 }
103
ex_handler_sgx(const struct exception_table_entry * fixup,struct pt_regs * regs,int trapnr)104 static bool ex_handler_sgx(const struct exception_table_entry *fixup,
105 struct pt_regs *regs, int trapnr)
106 {
107 regs->ax = trapnr | SGX_ENCLS_FAULT_FLAG;
108 return ex_handler_default(fixup, regs);
109 }
110
111 /*
112 * Handler for when we fail to restore a task's FPU state. We should never get
113 * here because the FPU state of a task using the FPU (task->thread.fpu.state)
114 * should always be valid. However, past bugs have allowed userspace to set
115 * reserved bits in the XSAVE area using PTRACE_SETREGSET or sys_rt_sigreturn().
116 * These caused XRSTOR to fail when switching to the task, leaking the FPU
117 * registers of the task previously executing on the CPU. Mitigate this class
118 * of vulnerability by restoring from the initial state (essentially, zeroing
119 * out all the FPU registers) if we can't restore from the task's FPU state.
120 */
ex_handler_fprestore(const struct exception_table_entry * fixup,struct pt_regs * regs)121 static bool ex_handler_fprestore(const struct exception_table_entry *fixup,
122 struct pt_regs *regs)
123 {
124 regs->ip = ex_fixup_addr(fixup);
125
126 WARN_ONCE(1, "Bad FPU state detected at %pB, reinitializing FPU registers.",
127 (void *)instruction_pointer(regs));
128
129 fpu_reset_from_exception_fixup();
130 return true;
131 }
132
133 /*
134 * On x86-64, we end up being imprecise with 'access_ok()', and allow
135 * non-canonical user addresses to make the range comparisons simpler,
136 * and to not have to worry about LAM being enabled.
137 *
138 * In fact, we allow up to one page of "slop" at the sign boundary,
139 * which means that we can do access_ok() by just checking the sign
140 * of the pointer for the common case of having a small access size.
141 */
gp_fault_address_ok(unsigned long fault_address)142 static bool gp_fault_address_ok(unsigned long fault_address)
143 {
144 #ifdef CONFIG_X86_64
145 /* Is it in the "user space" part of the non-canonical space? */
146 if (valid_user_address(fault_address))
147 return true;
148
149 /* .. or just above it? */
150 fault_address -= PAGE_SIZE;
151 if (valid_user_address(fault_address))
152 return true;
153 #endif
154 return false;
155 }
156
ex_handler_uaccess(const struct exception_table_entry * fixup,struct pt_regs * regs,int trapnr,unsigned long fault_address)157 static bool ex_handler_uaccess(const struct exception_table_entry *fixup,
158 struct pt_regs *regs, int trapnr,
159 unsigned long fault_address)
160 {
161 WARN_ONCE(trapnr == X86_TRAP_GP && !gp_fault_address_ok(fault_address),
162 "General protection fault in user access. Non-canonical address?");
163 return ex_handler_default(fixup, regs);
164 }
165
ex_handler_msr(const struct exception_table_entry * fixup,struct pt_regs * regs,bool wrmsr,bool safe,int reg)166 static bool ex_handler_msr(const struct exception_table_entry *fixup,
167 struct pt_regs *regs, bool wrmsr, bool safe, int reg)
168 {
169 if (__ONCE_LITE_IF(!safe && wrmsr)) {
170 pr_warn("unchecked MSR access error: WRMSR to 0x%x (tried to write 0x%08x%08x) at rIP: 0x%lx (%pS)\n",
171 (unsigned int)regs->cx, (unsigned int)regs->dx,
172 (unsigned int)regs->ax, regs->ip, (void *)regs->ip);
173 show_stack_regs(regs);
174 }
175
176 if (__ONCE_LITE_IF(!safe && !wrmsr)) {
177 pr_warn("unchecked MSR access error: RDMSR from 0x%x at rIP: 0x%lx (%pS)\n",
178 (unsigned int)regs->cx, regs->ip, (void *)regs->ip);
179 show_stack_regs(regs);
180 }
181
182 if (!wrmsr) {
183 /* Pretend that the read succeeded and returned 0. */
184 regs->ax = 0;
185 regs->dx = 0;
186 }
187
188 if (safe)
189 *pt_regs_nr(regs, reg) = -EIO;
190
191 return ex_handler_default(fixup, regs);
192 }
193
ex_handler_clear_fs(const struct exception_table_entry * fixup,struct pt_regs * regs)194 static bool ex_handler_clear_fs(const struct exception_table_entry *fixup,
195 struct pt_regs *regs)
196 {
197 if (static_cpu_has(X86_BUG_NULL_SEG))
198 asm volatile ("mov %0, %%fs" : : "rm" (__USER_DS));
199 asm volatile ("mov %0, %%fs" : : "rm" (0));
200 return ex_handler_default(fixup, regs);
201 }
202
ex_handler_imm_reg(const struct exception_table_entry * fixup,struct pt_regs * regs,int reg,int imm)203 static bool ex_handler_imm_reg(const struct exception_table_entry *fixup,
204 struct pt_regs *regs, int reg, int imm)
205 {
206 *pt_regs_nr(regs, reg) = (long)imm;
207 return ex_handler_default(fixup, regs);
208 }
209
ex_handler_ucopy_len(const struct exception_table_entry * fixup,struct pt_regs * regs,int trapnr,unsigned long fault_address,int reg,int imm)210 static bool ex_handler_ucopy_len(const struct exception_table_entry *fixup,
211 struct pt_regs *regs, int trapnr,
212 unsigned long fault_address,
213 int reg, int imm)
214 {
215 regs->cx = imm * regs->cx + *pt_regs_nr(regs, reg);
216 return ex_handler_uaccess(fixup, regs, trapnr, fault_address);
217 }
218
ex_get_fixup_type(unsigned long ip)219 int ex_get_fixup_type(unsigned long ip)
220 {
221 const struct exception_table_entry *e = search_exception_tables(ip);
222
223 return e ? FIELD_GET(EX_DATA_TYPE_MASK, e->data) : EX_TYPE_NONE;
224 }
225
fixup_exception(struct pt_regs * regs,int trapnr,unsigned long error_code,unsigned long fault_addr)226 int fixup_exception(struct pt_regs *regs, int trapnr, unsigned long error_code,
227 unsigned long fault_addr)
228 {
229 const struct exception_table_entry *e;
230 int type, reg, imm;
231
232 #ifdef CONFIG_PNPBIOS
233 if (unlikely(SEGMENT_IS_PNP_CODE(regs->cs))) {
234 extern u32 pnp_bios_fault_eip, pnp_bios_fault_esp;
235 extern u32 pnp_bios_is_utter_crap;
236 pnp_bios_is_utter_crap = 1;
237 printk(KERN_CRIT "PNPBIOS fault.. attempting recovery.\n");
238 __asm__ volatile(
239 "movl %0, %%esp\n\t"
240 "jmp *%1\n\t"
241 : : "g" (pnp_bios_fault_esp), "g" (pnp_bios_fault_eip));
242 panic("do_trap: can't hit this");
243 }
244 #endif
245
246 e = search_exception_tables(regs->ip);
247 if (!e)
248 return 0;
249
250 type = FIELD_GET(EX_DATA_TYPE_MASK, e->data);
251 reg = FIELD_GET(EX_DATA_REG_MASK, e->data);
252 imm = FIELD_GET(EX_DATA_IMM_MASK, e->data);
253
254 switch (type) {
255 case EX_TYPE_DEFAULT:
256 case EX_TYPE_DEFAULT_MCE_SAFE:
257 return ex_handler_default(e, regs);
258 case EX_TYPE_FAULT:
259 case EX_TYPE_FAULT_MCE_SAFE:
260 return ex_handler_fault(e, regs, trapnr);
261 case EX_TYPE_UACCESS:
262 return ex_handler_uaccess(e, regs, trapnr, fault_addr);
263 case EX_TYPE_CLEAR_FS:
264 return ex_handler_clear_fs(e, regs);
265 case EX_TYPE_FPU_RESTORE:
266 return ex_handler_fprestore(e, regs);
267 case EX_TYPE_BPF:
268 return ex_handler_bpf(e, regs);
269 case EX_TYPE_WRMSR:
270 return ex_handler_msr(e, regs, true, false, reg);
271 case EX_TYPE_RDMSR:
272 return ex_handler_msr(e, regs, false, false, reg);
273 case EX_TYPE_WRMSR_SAFE:
274 return ex_handler_msr(e, regs, true, true, reg);
275 case EX_TYPE_RDMSR_SAFE:
276 return ex_handler_msr(e, regs, false, true, reg);
277 case EX_TYPE_WRMSR_IN_MCE:
278 ex_handler_msr_mce(regs, true);
279 break;
280 case EX_TYPE_RDMSR_IN_MCE:
281 ex_handler_msr_mce(regs, false);
282 break;
283 case EX_TYPE_POP_REG:
284 regs->sp += sizeof(long);
285 fallthrough;
286 case EX_TYPE_IMM_REG:
287 return ex_handler_imm_reg(e, regs, reg, imm);
288 case EX_TYPE_FAULT_SGX:
289 return ex_handler_sgx(e, regs, trapnr);
290 case EX_TYPE_UCOPY_LEN:
291 return ex_handler_ucopy_len(e, regs, trapnr, fault_addr, reg, imm);
292 case EX_TYPE_ZEROPAD:
293 return ex_handler_zeropad(e, regs, fault_addr);
294 }
295 BUG();
296 }
297
298 extern unsigned int early_recursion_flag;
299
300 /* Restricted version used during very early boot */
early_fixup_exception(struct pt_regs * regs,int trapnr)301 void __init early_fixup_exception(struct pt_regs *regs, int trapnr)
302 {
303 /* Ignore early NMIs. */
304 if (trapnr == X86_TRAP_NMI)
305 return;
306
307 if (early_recursion_flag > 2)
308 goto halt_loop;
309
310 /*
311 * Old CPUs leave the high bits of CS on the stack
312 * undefined. I'm not sure which CPUs do this, but at least
313 * the 486 DX works this way.
314 * Xen pv domains are not using the default __KERNEL_CS.
315 */
316 if (!xen_pv_domain() && regs->cs != __KERNEL_CS)
317 goto fail;
318
319 /*
320 * The full exception fixup machinery is available as soon as
321 * the early IDT is loaded. This means that it is the
322 * responsibility of extable users to either function correctly
323 * when handlers are invoked early or to simply avoid causing
324 * exceptions before they're ready to handle them.
325 *
326 * This is better than filtering which handlers can be used,
327 * because refusing to call a handler here is guaranteed to
328 * result in a hard-to-debug panic.
329 *
330 * Keep in mind that not all vectors actually get here. Early
331 * page faults, for example, are special.
332 */
333 if (fixup_exception(regs, trapnr, regs->orig_ax, 0))
334 return;
335
336 if (trapnr == X86_TRAP_UD) {
337 if (report_bug(regs->ip, regs) == BUG_TRAP_TYPE_WARN) {
338 /* Skip the ud2. */
339 regs->ip += LEN_UD2;
340 return;
341 }
342
343 /*
344 * If this was a BUG and report_bug returns or if this
345 * was just a normal #UD, we want to continue onward and
346 * crash.
347 */
348 }
349
350 fail:
351 early_printk("PANIC: early exception 0x%02x IP %lx:%lx error %lx cr2 0x%lx\n",
352 (unsigned)trapnr, (unsigned long)regs->cs, regs->ip,
353 regs->orig_ax, read_cr2());
354
355 show_regs(regs);
356
357 halt_loop:
358 while (true)
359 halt();
360 }
361