1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Copyright (C) 2021 Felix Fietkau <nbd@nbd.name> */
3
4 #include <linux/seq_file.h>
5 #include <linux/soc/mediatek/mtk_wed.h>
6 #include "mtk_wed.h"
7 #include "mtk_wed_regs.h"
8
9 struct reg_dump {
10 const char *name;
11 u16 offset;
12 u8 type;
13 u8 base;
14 };
15
16 enum {
17 DUMP_TYPE_STRING,
18 DUMP_TYPE_WED,
19 DUMP_TYPE_WDMA,
20 DUMP_TYPE_WPDMA_TX,
21 DUMP_TYPE_WPDMA_TXFREE,
22 DUMP_TYPE_WPDMA_RX,
23 DUMP_TYPE_WED_RRO,
24 };
25
26 #define DUMP_STR(_str) { _str, 0, DUMP_TYPE_STRING }
27 #define DUMP_REG(_reg, ...) { #_reg, MTK_##_reg, __VA_ARGS__ }
28 #define DUMP_RING(_prefix, _base, ...) \
29 { _prefix " BASE", _base, __VA_ARGS__ }, \
30 { _prefix " CNT", _base + 0x4, __VA_ARGS__ }, \
31 { _prefix " CIDX", _base + 0x8, __VA_ARGS__ }, \
32 { _prefix " DIDX", _base + 0xc, __VA_ARGS__ }
33
34 #define DUMP_WED(_reg) DUMP_REG(_reg, DUMP_TYPE_WED)
35 #define DUMP_WED_RING(_base) DUMP_RING(#_base, MTK_##_base, DUMP_TYPE_WED)
36
37 #define DUMP_WDMA(_reg) DUMP_REG(_reg, DUMP_TYPE_WDMA)
38 #define DUMP_WDMA_RING(_base) DUMP_RING(#_base, MTK_##_base, DUMP_TYPE_WDMA)
39
40 #define DUMP_WPDMA_TX_RING(_n) DUMP_RING("WPDMA_TX" #_n, 0, DUMP_TYPE_WPDMA_TX, _n)
41 #define DUMP_WPDMA_TXFREE_RING DUMP_RING("WPDMA_RX1", 0, DUMP_TYPE_WPDMA_TXFREE)
42 #define DUMP_WPDMA_RX_RING(_n) DUMP_RING("WPDMA_RX" #_n, 0, DUMP_TYPE_WPDMA_RX, _n)
43 #define DUMP_WED_RRO_RING(_base)DUMP_RING("WED_RRO_MIOD", MTK_##_base, DUMP_TYPE_WED_RRO)
44 #define DUMP_WED_RRO_FDBK(_base)DUMP_RING("WED_RRO_FDBK", MTK_##_base, DUMP_TYPE_WED_RRO)
45
46 static void
print_reg_val(struct seq_file * s,const char * name,u32 val)47 print_reg_val(struct seq_file *s, const char *name, u32 val)
48 {
49 seq_printf(s, "%-32s %08x\n", name, val);
50 }
51
52 static void
dump_wed_regs(struct seq_file * s,struct mtk_wed_device * dev,const struct reg_dump * regs,int n_regs)53 dump_wed_regs(struct seq_file *s, struct mtk_wed_device *dev,
54 const struct reg_dump *regs, int n_regs)
55 {
56 const struct reg_dump *cur;
57 u32 val;
58
59 for (cur = regs; cur < ®s[n_regs]; cur++) {
60 switch (cur->type) {
61 case DUMP_TYPE_STRING:
62 seq_printf(s, "%s======== %s:\n",
63 cur > regs ? "\n" : "",
64 cur->name);
65 continue;
66 case DUMP_TYPE_WED_RRO:
67 case DUMP_TYPE_WED:
68 val = wed_r32(dev, cur->offset);
69 break;
70 case DUMP_TYPE_WDMA:
71 val = wdma_r32(dev, cur->offset);
72 break;
73 case DUMP_TYPE_WPDMA_TX:
74 val = wpdma_tx_r32(dev, cur->base, cur->offset);
75 break;
76 case DUMP_TYPE_WPDMA_TXFREE:
77 val = wpdma_txfree_r32(dev, cur->offset);
78 break;
79 case DUMP_TYPE_WPDMA_RX:
80 val = wpdma_rx_r32(dev, cur->base, cur->offset);
81 break;
82 }
83 print_reg_val(s, cur->name, val);
84 }
85 }
86
87 static int
wed_txinfo_show(struct seq_file * s,void * data)88 wed_txinfo_show(struct seq_file *s, void *data)
89 {
90 static const struct reg_dump regs[] = {
91 DUMP_STR("WED TX"),
92 DUMP_WED(WED_TX_MIB(0)),
93 DUMP_WED_RING(WED_RING_TX(0)),
94
95 DUMP_WED(WED_TX_MIB(1)),
96 DUMP_WED_RING(WED_RING_TX(1)),
97
98 DUMP_STR("WPDMA TX"),
99 DUMP_WED(WED_WPDMA_TX_MIB(0)),
100 DUMP_WED_RING(WED_WPDMA_RING_TX(0)),
101 DUMP_WED(WED_WPDMA_TX_COHERENT_MIB(0)),
102
103 DUMP_WED(WED_WPDMA_TX_MIB(1)),
104 DUMP_WED_RING(WED_WPDMA_RING_TX(1)),
105 DUMP_WED(WED_WPDMA_TX_COHERENT_MIB(1)),
106
107 DUMP_STR("WPDMA TX"),
108 DUMP_WPDMA_TX_RING(0),
109 DUMP_WPDMA_TX_RING(1),
110
111 DUMP_STR("WED WDMA RX"),
112 DUMP_WED(WED_WDMA_RX_MIB(0)),
113 DUMP_WED_RING(WED_WDMA_RING_RX(0)),
114 DUMP_WED(WED_WDMA_RX_THRES(0)),
115 DUMP_WED(WED_WDMA_RX_RECYCLE_MIB(0)),
116 DUMP_WED(WED_WDMA_RX_PROCESSED_MIB(0)),
117
118 DUMP_WED(WED_WDMA_RX_MIB(1)),
119 DUMP_WED_RING(WED_WDMA_RING_RX(1)),
120 DUMP_WED(WED_WDMA_RX_THRES(1)),
121 DUMP_WED(WED_WDMA_RX_RECYCLE_MIB(1)),
122 DUMP_WED(WED_WDMA_RX_PROCESSED_MIB(1)),
123
124 DUMP_STR("WDMA RX"),
125 DUMP_WDMA(WDMA_GLO_CFG),
126 DUMP_WDMA_RING(WDMA_RING_RX(0)),
127 DUMP_WDMA_RING(WDMA_RING_RX(1)),
128
129 DUMP_STR("WED TX FREE"),
130 DUMP_WED(WED_RX_MIB(0)),
131 DUMP_WED_RING(WED_RING_RX(0)),
132 DUMP_WED(WED_WPDMA_RX_COHERENT_MIB(0)),
133 DUMP_WED(WED_RX_MIB(1)),
134 DUMP_WED_RING(WED_RING_RX(1)),
135 DUMP_WED(WED_WPDMA_RX_COHERENT_MIB(1)),
136
137 DUMP_STR("WED WPDMA TX FREE"),
138 DUMP_WED_RING(WED_WPDMA_RING_RX(0)),
139 DUMP_WED_RING(WED_WPDMA_RING_RX(1)),
140 };
141 struct mtk_wed_hw *hw = s->private;
142 struct mtk_wed_device *dev = hw->wed_dev;
143
144 if (dev)
145 dump_wed_regs(s, dev, regs, ARRAY_SIZE(regs));
146
147 return 0;
148 }
149 DEFINE_SHOW_ATTRIBUTE(wed_txinfo);
150
151 static int
wed_rxinfo_show(struct seq_file * s,void * data)152 wed_rxinfo_show(struct seq_file *s, void *data)
153 {
154 static const struct reg_dump regs[] = {
155 DUMP_STR("WPDMA RX"),
156 DUMP_WPDMA_RX_RING(0),
157 DUMP_WPDMA_RX_RING(1),
158
159 DUMP_STR("WPDMA RX"),
160 DUMP_WED(WED_WPDMA_RX_D_MIB(0)),
161 DUMP_WED_RING(WED_WPDMA_RING_RX_DATA(0)),
162 DUMP_WED(WED_WPDMA_RX_D_PROCESSED_MIB(0)),
163 DUMP_WED(WED_WPDMA_RX_D_MIB(1)),
164 DUMP_WED_RING(WED_WPDMA_RING_RX_DATA(1)),
165 DUMP_WED(WED_WPDMA_RX_D_PROCESSED_MIB(1)),
166 DUMP_WED(WED_WPDMA_RX_D_COHERENT_MIB),
167
168 DUMP_STR("WED RX"),
169 DUMP_WED_RING(WED_RING_RX_DATA(0)),
170 DUMP_WED_RING(WED_RING_RX_DATA(1)),
171
172 DUMP_STR("WED RRO"),
173 DUMP_WED_RRO_RING(WED_RROQM_MIOD_CTRL0),
174 DUMP_WED(WED_RROQM_MID_MIB),
175 DUMP_WED(WED_RROQM_MOD_MIB),
176 DUMP_WED(WED_RROQM_MOD_COHERENT_MIB),
177 DUMP_WED_RRO_FDBK(WED_RROQM_FDBK_CTRL0),
178 DUMP_WED(WED_RROQM_FDBK_IND_MIB),
179 DUMP_WED(WED_RROQM_FDBK_ENQ_MIB),
180 DUMP_WED(WED_RROQM_FDBK_ANC_MIB),
181 DUMP_WED(WED_RROQM_FDBK_ANC2H_MIB),
182
183 DUMP_STR("WED Route QM"),
184 DUMP_WED(WED_RTQM_R2H_MIB(0)),
185 DUMP_WED(WED_RTQM_R2Q_MIB(0)),
186 DUMP_WED(WED_RTQM_Q2H_MIB(0)),
187 DUMP_WED(WED_RTQM_R2H_MIB(1)),
188 DUMP_WED(WED_RTQM_R2Q_MIB(1)),
189 DUMP_WED(WED_RTQM_Q2H_MIB(1)),
190 DUMP_WED(WED_RTQM_Q2N_MIB),
191 DUMP_WED(WED_RTQM_Q2B_MIB),
192 DUMP_WED(WED_RTQM_PFDBK_MIB),
193
194 DUMP_STR("WED WDMA TX"),
195 DUMP_WED(WED_WDMA_TX_MIB),
196 DUMP_WED_RING(WED_WDMA_RING_TX),
197
198 DUMP_STR("WDMA TX"),
199 DUMP_WDMA(WDMA_GLO_CFG),
200 DUMP_WDMA_RING(WDMA_RING_TX(0)),
201 DUMP_WDMA_RING(WDMA_RING_TX(1)),
202
203 DUMP_STR("WED RX BM"),
204 DUMP_WED(WED_RX_BM_BASE),
205 DUMP_WED(WED_RX_BM_RX_DMAD),
206 DUMP_WED(WED_RX_BM_PTR),
207 DUMP_WED(WED_RX_BM_TKID_MIB),
208 DUMP_WED(WED_RX_BM_BLEN),
209 DUMP_WED(WED_RX_BM_STS),
210 DUMP_WED(WED_RX_BM_INTF2),
211 DUMP_WED(WED_RX_BM_INTF),
212 DUMP_WED(WED_RX_BM_ERR_STS),
213 };
214 struct mtk_wed_hw *hw = s->private;
215 struct mtk_wed_device *dev = hw->wed_dev;
216
217 if (dev)
218 dump_wed_regs(s, dev, regs, ARRAY_SIZE(regs));
219
220 return 0;
221 }
222 DEFINE_SHOW_ATTRIBUTE(wed_rxinfo);
223
224 static int
mtk_wed_reg_set(void * data,u64 val)225 mtk_wed_reg_set(void *data, u64 val)
226 {
227 struct mtk_wed_hw *hw = data;
228
229 regmap_write(hw->regs, hw->debugfs_reg, val);
230
231 return 0;
232 }
233
234 static int
mtk_wed_reg_get(void * data,u64 * val)235 mtk_wed_reg_get(void *data, u64 *val)
236 {
237 struct mtk_wed_hw *hw = data;
238 unsigned int regval;
239 int ret;
240
241 ret = regmap_read(hw->regs, hw->debugfs_reg, ®val);
242 if (ret)
243 return ret;
244
245 *val = regval;
246
247 return 0;
248 }
249
250 DEFINE_DEBUGFS_ATTRIBUTE(fops_regval, mtk_wed_reg_get, mtk_wed_reg_set,
251 "0x%08llx\n");
252
mtk_wed_hw_add_debugfs(struct mtk_wed_hw * hw)253 void mtk_wed_hw_add_debugfs(struct mtk_wed_hw *hw)
254 {
255 struct dentry *dir;
256
257 snprintf(hw->dirname, sizeof(hw->dirname), "wed%d", hw->index);
258 dir = debugfs_create_dir(hw->dirname, NULL);
259
260 hw->debugfs_dir = dir;
261 debugfs_create_u32("regidx", 0600, dir, &hw->debugfs_reg);
262 debugfs_create_file_unsafe("regval", 0600, dir, hw, &fops_regval);
263 debugfs_create_file_unsafe("txinfo", 0400, dir, hw, &wed_txinfo_fops);
264 if (hw->version != 1)
265 debugfs_create_file_unsafe("rxinfo", 0400, dir, hw,
266 &wed_rxinfo_fops);
267 }
268