1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Support for Intel Camera Imaging ISP subsystem.
4  * Copyright (c) 2015, Intel Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms and conditions of the GNU General Public License,
8  * version 2, as published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  */
15 
16 /* CSI reveiver has 3 ports. */
17 #define		N_CSI_PORTS (3)
18 
19 #include "system_local.h"
20 #include "isys_dma_global.h"	/*	isys2401_dma_channel,
21 				 *	isys2401_dma_cfg_t
22 				 */
23 
24 #include "ibuf_ctrl_local.h"	/*	ibuf_cfg_t,
25 				 *	ibuf_ctrl_cfg_t
26 				 */
27 
28 #include "isys_stream2mmio.h"	/*	stream2mmio_cfg_t */
29 
30 #include "csi_rx.h"		/*	csi_rx_frontend_cfg_t,
31 				 *	csi_rx_backend_cfg_t,
32 				 *	csi_rx_backend_lut_entry_t
33 				 */
34 #include "pixelgen.h"
35 
36 #define INPUT_SYSTEM_N_STREAM_ID  6	/* maximum number of simultaneous
37 					virtual channels supported*/
38 
39 typedef enum {
40 	INPUT_SYSTEM_SOURCE_TYPE_UNDEFINED = 0,
41 	INPUT_SYSTEM_SOURCE_TYPE_SENSOR,
42 	INPUT_SYSTEM_SOURCE_TYPE_TPG,
43 	INPUT_SYSTEM_SOURCE_TYPE_PRBS,
44 	N_INPUT_SYSTEM_SOURCE_TYPE
45 } input_system_source_type_t;
46 
47 typedef struct input_system_channel_s input_system_channel_t;
48 struct input_system_channel_s {
49 	stream2mmio_ID_t	stream2mmio_id;
50 	stream2mmio_sid_ID_t	stream2mmio_sid_id;
51 
52 	ibuf_ctrl_ID_t		ibuf_ctrl_id;
53 	isp2401_ib_buffer_t	ib_buffer;
54 
55 	isys2401_dma_ID_t	dma_id;
56 	isys2401_dma_channel	dma_channel;
57 };
58 
59 typedef struct input_system_channel_cfg_s input_system_channel_cfg_t;
60 struct input_system_channel_cfg_s {
61 	stream2mmio_cfg_t	stream2mmio_cfg;
62 	ibuf_ctrl_cfg_t		ibuf_ctrl_cfg;
63 	isys2401_dma_cfg_t	dma_cfg;
64 	isys2401_dma_port_cfg_t	dma_src_port_cfg;
65 	isys2401_dma_port_cfg_t	dma_dest_port_cfg;
66 };
67 
68 typedef struct input_system_input_port_s input_system_input_port_t;
69 struct input_system_input_port_s {
70 	input_system_source_type_t	source_type;
71 
72 	struct {
73 		csi_rx_frontend_ID_t		frontend_id;
74 		csi_rx_backend_ID_t		backend_id;
75 		csi_mipi_packet_type_t		packet_type;
76 		csi_rx_backend_lut_entry_t	backend_lut_entry;
77 	} csi_rx;
78 
79 	struct {
80 		csi_mipi_packet_type_t		packet_type;
81 		csi_rx_backend_lut_entry_t	backend_lut_entry;
82 	} metadata;
83 
84 	struct {
85 		pixelgen_ID_t			pixelgen_id;
86 	} pixelgen;
87 };
88 
89 typedef struct input_system_input_port_cfg_s input_system_input_port_cfg_t;
90 struct input_system_input_port_cfg_s {
91 	struct {
92 		csi_rx_frontend_cfg_t	frontend_cfg;
93 		csi_rx_backend_cfg_t	backend_cfg;
94 		csi_rx_backend_cfg_t	md_backend_cfg;
95 	} csi_rx_cfg;
96 
97 	struct {
98 		pixelgen_tpg_cfg_t	tpg_cfg;
99 		pixelgen_prbs_cfg_t	prbs_cfg;
100 	} pixelgen_cfg;
101 };
102 
103 typedef struct isp2401_input_system_cfg_s isp2401_input_system_cfg_t;
104 struct isp2401_input_system_cfg_s {
105 	input_system_input_port_ID_t	input_port_id;
106 
107 	input_system_source_type_t	mode;
108 
109 	bool online;
110 	bool raw_packed;
111 	s8 linked_isys_stream_id;
112 
113 	struct {
114 		bool	comp_enable;
115 		s32	active_lanes;
116 		s32	fmt_type;
117 		s32	ch_id;
118 		s32 comp_predictor;
119 		s32 comp_scheme;
120 	} csi_port_attr;
121 
122 	pixelgen_tpg_cfg_t	tpg_port_attr;
123 
124 	pixelgen_prbs_cfg_t prbs_port_attr;
125 
126 	struct {
127 		s32 align_req_in_bytes;
128 		s32 bits_per_pixel;
129 		s32 pixels_per_line;
130 		s32 lines_per_frame;
131 	} input_port_resolution;
132 
133 	struct {
134 		s32 left_padding;
135 		s32 max_isp_input_width;
136 	} output_port_attr;
137 
138 	struct {
139 		bool    enable;
140 		s32 fmt_type;
141 		s32 align_req_in_bytes;
142 		s32 bits_per_pixel;
143 		s32 pixels_per_line;
144 		s32 lines_per_frame;
145 	} metadata;
146 };
147 
148 typedef struct virtual_input_system_stream_s virtual_input_system_stream_t;
149 struct virtual_input_system_stream_s {
150 	u32 id;				/*Used when multiple MIPI data types and/or virtual channels are used.
151 								Must be unique within one CSI RX
152 								and lower than SH_CSS_MAX_ISYS_CHANNEL_NODES */
153 	u8 enable_metadata;
154 	input_system_input_port_t	input_port;
155 	input_system_channel_t		channel;
156 	input_system_channel_t		md_channel; /* metadata channel */
157 	u8 online;
158 	s8 linked_isys_stream_id;
159 	u8 valid;
160 };
161 
162 typedef struct virtual_input_system_stream_cfg_s
163 	virtual_input_system_stream_cfg_t;
164 struct virtual_input_system_stream_cfg_s {
165 	u8 enable_metadata;
166 	input_system_input_port_cfg_t	input_port_cfg;
167 	input_system_channel_cfg_t	channel_cfg;
168 	input_system_channel_cfg_t	md_channel_cfg;
169 	u8 valid;
170 };
171 
172 #define ISP_INPUT_BUF_START_ADDR	0
173 #define NUM_OF_INPUT_BUF		2
174 #define NUM_OF_LINES_PER_BUF		2
175 #define LINES_OF_ISP_INPUT_BUF		(NUM_OF_INPUT_BUF * NUM_OF_LINES_PER_BUF)
176 #define ISP_INPUT_BUF_STRIDE		SH_CSS_MAX_SENSOR_WIDTH
177