1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3 * Copyright (C) 2009 Sergey Kubushyn <ksi@koi8.net>
4 * Copyright (C) 2009 - 2013 Heiko Schocher <hs@denx.de>
5 * Changes for multibus/multiadapter I2C support.
6 *
7 * (C) Copyright 2001
8 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
9 *
10 * The original I2C interface was
11 * (C) 2000 by Paolo Scaffardi (arsenio@tin.it)
12 * AIRVENT SAM s.p.a - RIMINI(ITALY)
13 * but has been changed substantially.
14 */
15
16 #ifndef _I2C_H_
17 #define _I2C_H_
18
19 /*
20 * For now there are essentially two parts to this file - driver model
21 * here at the top, and the older code below (with CONFIG_SYS_I2C being
22 * most recent). The plan is to migrate everything to driver model.
23 * The driver model structures and API are separate as they are different
24 * enough as to be incompatible for compilation purposes.
25 */
26
27 enum dm_i2c_chip_flags {
28 DM_I2C_CHIP_10BIT = 1 << 0, /* Use 10-bit addressing */
29 DM_I2C_CHIP_RD_ADDRESS = 1 << 1, /* Send address for each read byte */
30 DM_I2C_CHIP_WR_ADDRESS = 1 << 2, /* Send address for each write byte */
31 };
32
33 struct udevice;
34 /**
35 * struct dm_i2c_chip - information about an i2c chip
36 *
37 * An I2C chip is a device on the I2C bus. It sits at a particular address
38 * and normally supports 7-bit or 10-bit addressing.
39 *
40 * To obtain this structure, use dev_get_parent_platdata(dev) where dev is
41 * the chip to examine.
42 *
43 * @chip_addr: Chip address on bus
44 * @offset_len: Length of offset in bytes. A single byte offset can
45 * represent up to 256 bytes. A value larger than 1 may be
46 * needed for larger devices.
47 * @flags: Flags for this chip (dm_i2c_chip_flags)
48 * @chip_addr_offset_mask: Mask of offset bits within chip_addr. Used for
49 * devices which steal addresses as part of offset.
50 * If offset_len is zero, then the offset is encoded
51 * completely within the chip address itself.
52 * e.g. a devce with chip address of 0x2c with 512
53 * registers might use the bottom bit of the address
54 * to indicate which half of the address space is being
55 * accessed while still only using 1 byte offset.
56 * This means it will respond to chip address 0x2c and
57 * 0x2d.
58 * A real world example is the Atmel AT24C04. It's
59 * datasheet explains it's usage of this addressing
60 * mode.
61 * @emul: Emulator for this chip address (only used for emulation)
62 */
63 struct dm_i2c_chip {
64 uint chip_addr;
65 uint offset_len;
66 uint flags;
67 uint chip_addr_offset_mask;
68 #ifdef CONFIG_SANDBOX
69 struct udevice *emul;
70 bool test_mode;
71 #endif
72 };
73
74 /**
75 * struct dm_i2c_bus- information about an i2c bus
76 *
77 * An I2C bus contains 0 or more chips on it, each at its own address. The
78 * bus can operate at different speeds (measured in Hz, typically 100KHz
79 * or 400KHz).
80 *
81 * To obtain this structure, use dev_get_uclass_priv(bus) where bus is the
82 * I2C bus udevice.
83 *
84 * @speed_hz: Bus speed in hertz (typically 100000)
85 */
86 struct dm_i2c_bus {
87 int speed_hz;
88 };
89
90 /*
91 * Not all of these flags are implemented in the U-Boot API
92 */
93 enum dm_i2c_msg_flags {
94 I2C_M_TEN = 0x0010, /* ten-bit chip address */
95 I2C_M_RD = 0x0001, /* read data, from slave to master */
96 I2C_M_STOP = 0x8000, /* send stop after this message */
97 I2C_M_NOSTART = 0x4000, /* no start before this message */
98 I2C_M_REV_DIR_ADDR = 0x2000, /* invert polarity of R/W bit */
99 I2C_M_IGNORE_NAK = 0x1000, /* continue after NAK */
100 I2C_M_NO_RD_ACK = 0x0800, /* skip the Ack bit on reads */
101 I2C_M_RECV_LEN = 0x0400, /* length is first received byte */
102 };
103
104 /**
105 * struct i2c_msg - an I2C message
106 *
107 * @addr: Slave address
108 * @flags: Flags (see enum dm_i2c_msg_flags)
109 * @len: Length of buffer in bytes, may be 0 for a probe
110 * @buf: Buffer to send/receive, or NULL if no data
111 */
112 struct i2c_msg {
113 uint addr;
114 uint flags;
115 uint len;
116 u8 *buf;
117 };
118
119 /**
120 * struct i2c_msg_list - a list of I2C messages
121 *
122 * This is called i2c_rdwr_ioctl_data in Linux but the name does not seem
123 * appropriate in U-Boot.
124 *
125 * @msg: Pointer to i2c_msg array
126 * @nmsgs: Number of elements in the array
127 */
128 struct i2c_msg_list {
129 struct i2c_msg *msgs;
130 uint nmsgs;
131 };
132
133 /**
134 * dm_i2c_read() - read bytes from an I2C chip
135 *
136 * To obtain an I2C device (called a 'chip') given the I2C bus address you
137 * can use i2c_get_chip(). To obtain a bus by bus number use
138 * uclass_get_device_by_seq(UCLASS_I2C, <bus number>).
139 *
140 * To set the address length of a devce use i2c_set_addr_len(). It
141 * defaults to 1.
142 *
143 * @dev: Chip to read from
144 * @offset: Offset within chip to start reading
145 * @buffer: Place to put data
146 * @len: Number of bytes to read
147 *
148 * @return 0 on success, -ve on failure
149 */
150 int dm_i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len);
151
152 /**
153 * dm_i2c_write() - write bytes to an I2C chip
154 *
155 * See notes for dm_i2c_read() above.
156 *
157 * @dev: Chip to write to
158 * @offset: Offset within chip to start writing
159 * @buffer: Buffer containing data to write
160 * @len: Number of bytes to write
161 *
162 * @return 0 on success, -ve on failure
163 */
164 int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer,
165 int len);
166
167 /**
168 * dm_i2c_probe() - probe a particular chip address
169 *
170 * This can be useful to check for the existence of a chip on the bus.
171 * It is typically implemented by writing the chip address to the bus
172 * and checking that the chip replies with an ACK.
173 *
174 * @bus: Bus to probe
175 * @chip_addr: 7-bit address to probe (10-bit and others are not supported)
176 * @chip_flags: Flags for the probe (see enum dm_i2c_chip_flags)
177 * @devp: Returns the device found, or NULL if none
178 * @return 0 if a chip was found at that address, -ve if not
179 */
180 int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags,
181 struct udevice **devp);
182
183 /**
184 * dm_i2c_reg_read() - Read a value from an I2C register
185 *
186 * This reads a single value from the given address in an I2C chip
187 *
188 * @dev: Device to use for transfer
189 * @addr: Address to read from
190 * @return value read, or -ve on error
191 */
192 int dm_i2c_reg_read(struct udevice *dev, uint offset);
193
194 /**
195 * dm_i2c_reg_write() - Write a value to an I2C register
196 *
197 * This writes a single value to the given address in an I2C chip
198 *
199 * @dev: Device to use for transfer
200 * @addr: Address to write to
201 * @val: Value to write (normally a byte)
202 * @return 0 on success, -ve on error
203 */
204 int dm_i2c_reg_write(struct udevice *dev, uint offset, unsigned int val);
205
206 /**
207 * dm_i2c_xfer() - Transfer messages over I2C
208 *
209 * This transfers a raw message. It is best to use dm_i2c_reg_read/write()
210 * instead.
211 *
212 * @dev: Device to use for transfer
213 * @msg: List of messages to transfer
214 * @nmsgs: Number of messages to transfer
215 * @return 0 on success, -ve on error
216 */
217 int dm_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs);
218
219 /**
220 * dm_i2c_set_bus_speed() - set the speed of a bus
221 *
222 * @bus: Bus to adjust
223 * @speed: Requested speed in Hz
224 * @return 0 if OK, -EINVAL for invalid values
225 */
226 int dm_i2c_set_bus_speed(struct udevice *bus, unsigned int speed);
227
228 /**
229 * dm_i2c_get_bus_speed() - get the speed of a bus
230 *
231 * @bus: Bus to check
232 * @return speed of selected I2C bus in Hz, -ve on error
233 */
234 int dm_i2c_get_bus_speed(struct udevice *bus);
235
236 /**
237 * i2c_set_chip_flags() - set flags for a chip
238 *
239 * Typically addresses are 7 bits, but for 10-bit addresses you should set
240 * flags to DM_I2C_CHIP_10BIT. All accesses will then use 10-bit addressing.
241 *
242 * @dev: Chip to adjust
243 * @flags: New flags
244 * @return 0 if OK, -EINVAL if value is unsupported, other -ve value on error
245 */
246 int i2c_set_chip_flags(struct udevice *dev, uint flags);
247
248 /**
249 * i2c_get_chip_flags() - get flags for a chip
250 *
251 * @dev: Chip to check
252 * @flagsp: Place to put flags
253 * @return 0 if OK, other -ve value on error
254 */
255 int i2c_get_chip_flags(struct udevice *dev, uint *flagsp);
256
257 /**
258 * i2c_set_offset_len() - set the offset length for a chip
259 *
260 * The offset used to access a chip may be up to 4 bytes long. Typically it
261 * is only 1 byte, which is enough for chips with 256 bytes of memory or
262 * registers. The default value is 1, but you can call this function to
263 * change it.
264 *
265 * @offset_len: New offset length value (typically 1 or 2)
266 */
267 int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len);
268
269 /**
270 * i2c_get_offset_len() - get the offset length for a chip
271 *
272 * @return: Current offset length value (typically 1 or 2)
273 */
274 int i2c_get_chip_offset_len(struct udevice *dev);
275
276 /**
277 * i2c_set_chip_addr_offset_mask() - set mask of address bits usable by offset
278 *
279 * Some devices listen on multiple chip addresses to achieve larger offsets
280 * than their single or multiple byte offsets would allow for. You can use this
281 * function to set the bits that are valid to be used for offset overflow.
282 *
283 * @mask: The mask to be used for high offset bits within address
284 * @return 0 if OK, other -ve value on error
285 */
286 int i2c_set_chip_addr_offset_mask(struct udevice *dev, uint mask);
287
288 /*
289 * i2c_get_chip_addr_offset_mask() - get mask of address bits usable by offset
290 *
291 * @return current chip addr offset mask
292 */
293 uint i2c_get_chip_addr_offset_mask(struct udevice *dev);
294
295 /**
296 * i2c_deblock() - recover a bus that is in an unknown state
297 *
298 * See the deblock() method in 'struct dm_i2c_ops' for full information
299 *
300 * @bus: Bus to recover
301 * @return 0 if OK, -ve on error
302 */
303 int i2c_deblock(struct udevice *bus);
304
305 #ifdef CONFIG_DM_I2C_COMPAT
306 /**
307 * i2c_probe() - Compatibility function for driver model
308 *
309 * Calls dm_i2c_probe() on the current bus
310 */
311 int i2c_probe(uint8_t chip_addr);
312
313 /**
314 * i2c_read() - Compatibility function for driver model
315 *
316 * Calls dm_i2c_read() with the device corresponding to @chip_addr, and offset
317 * set to @addr. @alen must match the current setting for the device.
318 */
319 int i2c_read(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer,
320 int len);
321
322 /**
323 * i2c_write() - Compatibility function for driver model
324 *
325 * Calls dm_i2c_write() with the device corresponding to @chip_addr, and offset
326 * set to @addr. @alen must match the current setting for the device.
327 */
328 int i2c_write(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer,
329 int len);
330
331 /**
332 * i2c_get_bus_num_fdt() - Compatibility function for driver model
333 *
334 * @return the bus number associated with the given device tree node
335 */
336 int i2c_get_bus_num_fdt(int node);
337
338 /**
339 * i2c_get_bus_num() - Compatibility function for driver model
340 *
341 * @return the 'current' bus number
342 */
343 unsigned int i2c_get_bus_num(void);
344
345 /**
346 * i2c_set_bus_num() - Compatibility function for driver model
347 *
348 * Sets the 'current' bus
349 */
350 int i2c_set_bus_num(unsigned int bus);
351
I2C_SET_BUS(unsigned int bus)352 static inline void I2C_SET_BUS(unsigned int bus)
353 {
354 i2c_set_bus_num(bus);
355 }
356
I2C_GET_BUS(void)357 static inline unsigned int I2C_GET_BUS(void)
358 {
359 return i2c_get_bus_num();
360 }
361
362 /**
363 * i2c_init() - Compatibility function for driver model
364 *
365 * This function does nothing.
366 */
367 void i2c_init(int speed, int slaveaddr);
368
369 /**
370 * board_i2c_init() - Compatibility function for driver model
371 *
372 * @param blob Device tree blbo
373 * @return the number of I2C bus
374 */
375 void board_i2c_init(const void *blob);
376
377 /*
378 * Compatibility functions for driver model.
379 */
380 uint8_t i2c_reg_read(uint8_t addr, uint8_t reg);
381 void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val);
382
383 #endif
384
385 /**
386 * struct dm_i2c_ops - driver operations for I2C uclass
387 *
388 * Drivers should support these operations unless otherwise noted. These
389 * operations are intended to be used by uclass code, not directly from
390 * other code.
391 */
392 struct dm_i2c_ops {
393 /**
394 * xfer() - transfer a list of I2C messages
395 *
396 * @bus: Bus to read from
397 * @msg: List of messages to transfer
398 * @nmsgs: Number of messages in the list
399 * @return 0 if OK, -EREMOTEIO if the slave did not ACK a byte,
400 * -ECOMM if the speed cannot be supported, -EPROTO if the chip
401 * flags cannot be supported, other -ve value on some other error
402 */
403 int (*xfer)(struct udevice *bus, struct i2c_msg *msg, int nmsgs);
404
405 /**
406 * probe_chip() - probe for the presense of a chip address
407 *
408 * This function is optional. If omitted, the uclass will send a zero
409 * length message instead.
410 *
411 * @bus: Bus to probe
412 * @chip_addr: Chip address to probe
413 * @chip_flags: Probe flags (enum dm_i2c_chip_flags)
414 * @return 0 if chip was found, -EREMOTEIO if not, -ENOSYS to fall back
415 * to default probem other -ve value on error
416 */
417 int (*probe_chip)(struct udevice *bus, uint chip_addr, uint chip_flags);
418
419 /**
420 * set_bus_speed() - set the speed of a bus (optional)
421 *
422 * The bus speed value will be updated by the uclass if this function
423 * does not return an error. This method is optional - if it is not
424 * provided then the driver can read the speed from
425 * dev_get_uclass_priv(bus)->speed_hz
426 *
427 * @bus: Bus to adjust
428 * @speed: Requested speed in Hz
429 * @return 0 if OK, -EINVAL for invalid values
430 */
431 int (*set_bus_speed)(struct udevice *bus, unsigned int speed);
432
433 /**
434 * get_bus_speed() - get the speed of a bus (optional)
435 *
436 * Normally this can be provided by the uclass, but if you want your
437 * driver to check the bus speed by looking at the hardware, you can
438 * implement that here. This method is optional. This method would
439 * normally be expected to return dev_get_uclass_priv(bus)->speed_hz.
440 *
441 * @bus: Bus to check
442 * @return speed of selected I2C bus in Hz, -ve on error
443 */
444 int (*get_bus_speed)(struct udevice *bus);
445
446 /**
447 * set_flags() - set the flags for a chip (optional)
448 *
449 * This is generally implemented by the uclass, but drivers can
450 * check the value to ensure that unsupported options are not used.
451 * This method is optional. If provided, this method will always be
452 * called when the flags change.
453 *
454 * @dev: Chip to adjust
455 * @flags: New flags value
456 * @return 0 if OK, -EINVAL if value is unsupported
457 */
458 int (*set_flags)(struct udevice *dev, uint flags);
459
460 /**
461 * deblock() - recover a bus that is in an unknown state
462 *
463 * I2C is a synchronous protocol and resets of the processor in the
464 * middle of an access can block the I2C Bus until a powerdown of
465 * the full unit is done. This is because slaves can be stuck
466 * waiting for addition bus transitions for a transaction that will
467 * never complete. Resetting the I2C master does not help. The only
468 * way is to force the bus through a series of transitions to make
469 * sure that all slaves are done with the transaction. This method
470 * performs this 'deblocking' if support by the driver.
471 *
472 * This method is optional.
473 */
474 int (*deblock)(struct udevice *bus);
475 };
476
477 #define i2c_get_ops(dev) ((struct dm_i2c_ops *)(dev)->driver->ops)
478
479 /**
480 * struct i2c_mux_ops - operations for an I2C mux
481 *
482 * The current mux state is expected to be stored in the mux itself since
483 * it is the only thing that knows how to make things work. The mux can
484 * record the current state and then avoid switching unless it is necessary.
485 * So select() can be skipped if the mux is already in the correct state.
486 * Also deselect() can be made a nop if required.
487 */
488 struct i2c_mux_ops {
489 /**
490 * select() - select one of of I2C buses attached to a mux
491 *
492 * This will be called when there is no bus currently selected by the
493 * mux. This method does not need to deselect the old bus since
494 * deselect() will be already have been called if necessary.
495 *
496 * @mux: Mux device
497 * @bus: I2C bus to select
498 * @channel: Channel number correponding to the bus to select
499 * @return 0 if OK, -ve on error
500 */
501 int (*select)(struct udevice *mux, struct udevice *bus, uint channel);
502
503 /**
504 * deselect() - select one of of I2C buses attached to a mux
505 *
506 * This is used to deselect the currently selected I2C bus.
507 *
508 * @mux: Mux device
509 * @bus: I2C bus to deselect
510 * @channel: Channel number correponding to the bus to deselect
511 * @return 0 if OK, -ve on error
512 */
513 int (*deselect)(struct udevice *mux, struct udevice *bus, uint channel);
514 };
515
516 #define i2c_mux_get_ops(dev) ((struct i2c_mux_ops *)(dev)->driver->ops)
517
518 /**
519 * i2c_get_chip() - get a device to use to access a chip on a bus
520 *
521 * This returns the device for the given chip address. The device can then
522 * be used with calls to i2c_read(), i2c_write(), i2c_probe(), etc.
523 *
524 * @bus: Bus to examine
525 * @chip_addr: Chip address for the new device
526 * @offset_len: Length of a register offset in bytes (normally 1)
527 * @devp: Returns pointer to new device if found or -ENODEV if not
528 * found
529 */
530 int i2c_get_chip(struct udevice *bus, uint chip_addr, uint offset_len,
531 struct udevice **devp);
532
533 /**
534 * i2c_get_chip_for_busnum() - get a device to use to access a chip on
535 * a bus number
536 *
537 * This returns the device for the given chip address on a particular bus
538 * number.
539 *
540 * @busnum: Bus number to examine
541 * @chip_addr: Chip address for the new device
542 * @offset_len: Length of a register offset in bytes (normally 1)
543 * @devp: Returns pointer to new device if found or -ENODEV if not
544 * found
545 */
546 int i2c_get_chip_for_busnum(int busnum, int chip_addr, uint offset_len,
547 struct udevice **devp);
548
549 /**
550 * i2c_chip_ofdata_to_platdata() - Decode standard I2C platform data
551 *
552 * This decodes the chip address from a device tree node and puts it into
553 * its dm_i2c_chip structure. This should be called in your driver's
554 * ofdata_to_platdata() method.
555 *
556 * @blob: Device tree blob
557 * @node: Node offset to read from
558 * @spi: Place to put the decoded information
559 */
560 int i2c_chip_ofdata_to_platdata(struct udevice *dev, struct dm_i2c_chip *chip);
561
562 /**
563 * i2c_dump_msgs() - Dump a list of I2C messages
564 *
565 * This may be useful for debugging.
566 *
567 * @msg: Message list to dump
568 * @nmsgs: Number of messages
569 */
570 void i2c_dump_msgs(struct i2c_msg *msg, int nmsgs);
571
572 /**
573 * i2c_emul_find() - Find an emulator for an i2c sandbox device
574 *
575 * This looks at the device's 'emul' phandle
576 *
577 * @dev: Device to find an emulator for
578 * @emulp: Returns the associated emulator, if found *
579 * @return 0 if OK, -ENOENT or -ENODEV if not found
580 */
581 int i2c_emul_find(struct udevice *dev, struct udevice **emulp);
582
583 /**
584 * i2c_emul_get_device() - Find the device being emulated
585 *
586 * Given an emulator this returns the associated device
587 *
588 * @emul: Emulator for the device
589 * @return device that @emul is emulating
590 */
591 struct udevice *i2c_emul_get_device(struct udevice *emul);
592
593 #ifndef CONFIG_DM_I2C
594
595 /*
596 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
597 *
598 * The implementation MUST NOT use static or global variables if the
599 * I2C routines are used to read SDRAM configuration information
600 * because this is done before the memories are initialized. Limited
601 * use of stack-based variables are OK (the initial stack size is
602 * limited).
603 *
604 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
605 */
606
607 /*
608 * Configuration items.
609 */
610 #define I2C_RXTX_LEN 128 /* maximum tx/rx buffer length */
611
612 #if !defined(CONFIG_SYS_I2C_MAX_HOPS)
613 /* no muxes used bus = i2c adapters */
614 #define CONFIG_SYS_I2C_DIRECT_BUS 1
615 #define CONFIG_SYS_I2C_MAX_HOPS 0
616 #define CONFIG_SYS_NUM_I2C_BUSES ll_entry_count(struct i2c_adapter, i2c)
617 #else
618 /* we use i2c muxes */
619 #undef CONFIG_SYS_I2C_DIRECT_BUS
620 #endif
621
622 /* define the I2C bus number for RTC and DTT if not already done */
623 #if !defined(CONFIG_SYS_RTC_BUS_NUM)
624 #define CONFIG_SYS_RTC_BUS_NUM 0
625 #endif
626 #if !defined(CONFIG_SYS_SPD_BUS_NUM)
627 #define CONFIG_SYS_SPD_BUS_NUM 0
628 #endif
629
630 struct i2c_adapter {
631 void (*init)(struct i2c_adapter *adap, int speed,
632 int slaveaddr);
633 int (*probe)(struct i2c_adapter *adap, uint8_t chip);
634 int (*read)(struct i2c_adapter *adap, uint8_t chip,
635 uint addr, int alen, uint8_t *buffer,
636 int len);
637 int (*write)(struct i2c_adapter *adap, uint8_t chip,
638 uint addr, int alen, uint8_t *buffer,
639 int len);
640 uint (*set_bus_speed)(struct i2c_adapter *adap,
641 uint speed);
642 int speed;
643 int waitdelay;
644 int slaveaddr;
645 int init_done;
646 int hwadapnr;
647 char *name;
648 };
649
650 #define U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
651 _set_speed, _speed, _slaveaddr, _hwadapnr, _name) \
652 { \
653 .init = _init, \
654 .probe = _probe, \
655 .read = _read, \
656 .write = _write, \
657 .set_bus_speed = _set_speed, \
658 .speed = _speed, \
659 .slaveaddr = _slaveaddr, \
660 .init_done = 0, \
661 .hwadapnr = _hwadapnr, \
662 .name = #_name \
663 };
664
665 #define U_BOOT_I2C_ADAP_COMPLETE(_name, _init, _probe, _read, _write, \
666 _set_speed, _speed, _slaveaddr, _hwadapnr) \
667 ll_entry_declare(struct i2c_adapter, _name, i2c) = \
668 U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
669 _set_speed, _speed, _slaveaddr, _hwadapnr, _name);
670
671 struct i2c_adapter *i2c_get_adapter(int index);
672
673 #ifndef CONFIG_SYS_I2C_DIRECT_BUS
674 struct i2c_mux {
675 int id;
676 char name[16];
677 };
678
679 struct i2c_next_hop {
680 struct i2c_mux mux;
681 uint8_t chip;
682 uint8_t channel;
683 };
684
685 struct i2c_bus_hose {
686 int adapter;
687 struct i2c_next_hop next_hop[CONFIG_SYS_I2C_MAX_HOPS];
688 };
689 #define I2C_NULL_HOP {{-1, ""}, 0, 0}
690 extern struct i2c_bus_hose i2c_bus[];
691
692 #define I2C_ADAPTER(bus) i2c_bus[bus].adapter
693 #else
694 #define I2C_ADAPTER(bus) bus
695 #endif
696 #define I2C_BUS gd->cur_i2c_bus
697
698 #define I2C_ADAP_NR(bus) i2c_get_adapter(I2C_ADAPTER(bus))
699 #define I2C_ADAP I2C_ADAP_NR(gd->cur_i2c_bus)
700 #define I2C_ADAP_HWNR (I2C_ADAP->hwadapnr)
701
702 #ifndef CONFIG_SYS_I2C_DIRECT_BUS
703 #define I2C_MUX_PCA9540_ID 1
704 #define I2C_MUX_PCA9540 {I2C_MUX_PCA9540_ID, "PCA9540B"}
705 #define I2C_MUX_PCA9542_ID 2
706 #define I2C_MUX_PCA9542 {I2C_MUX_PCA9542_ID, "PCA9542A"}
707 #define I2C_MUX_PCA9544_ID 3
708 #define I2C_MUX_PCA9544 {I2C_MUX_PCA9544_ID, "PCA9544A"}
709 #define I2C_MUX_PCA9547_ID 4
710 #define I2C_MUX_PCA9547 {I2C_MUX_PCA9547_ID, "PCA9547A"}
711 #define I2C_MUX_PCA9548_ID 5
712 #define I2C_MUX_PCA9548 {I2C_MUX_PCA9548_ID, "PCA9548"}
713 #endif
714
715 #ifndef I2C_SOFT_DECLARATIONS
716 # if (defined(CONFIG_AT91RM9200) || \
717 defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \
718 defined(CONFIG_AT91SAM9263))
719 # define I2C_SOFT_DECLARATIONS at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
720 # else
721 # define I2C_SOFT_DECLARATIONS
722 # endif
723 #endif
724
725 /*
726 * Many boards/controllers/drivers don't support an I2C slave interface so
727 * provide a default slave address for them for use in common code. A real
728 * value for CONFIG_SYS_I2C_SLAVE should be defined for any board which does
729 * support a slave interface.
730 */
731 #ifndef CONFIG_SYS_I2C_SLAVE
732 #define CONFIG_SYS_I2C_SLAVE 0xfe
733 #endif
734
735 /*
736 * Initialization, must be called once on start up, may be called
737 * repeatedly to change the speed and slave addresses.
738 */
739 #ifdef CONFIG_SYS_I2C_EARLY_INIT
740 void i2c_early_init_f(void);
741 #endif
742 void i2c_init(int speed, int slaveaddr);
743 void i2c_init_board(void);
744
745 #ifdef CONFIG_SYS_I2C
746 /*
747 * i2c_get_bus_num:
748 *
749 * Returns index of currently active I2C bus. Zero-based.
750 */
751 unsigned int i2c_get_bus_num(void);
752
753 /*
754 * i2c_set_bus_num:
755 *
756 * Change the active I2C bus. Subsequent read/write calls will
757 * go to this one.
758 *
759 * bus - bus index, zero based
760 *
761 * Returns: 0 on success, not 0 on failure
762 *
763 */
764 int i2c_set_bus_num(unsigned int bus);
765
766 /*
767 * i2c_init_all():
768 *
769 * Initializes all I2C adapters in the system. All i2c_adap structures must
770 * be initialized beforehead with function pointers and data, including
771 * speed and slaveaddr. Returns 0 on success, non-0 on failure.
772 */
773 void i2c_init_all(void);
774
775 /*
776 * Probe the given I2C chip address. Returns 0 if a chip responded,
777 * not 0 on failure.
778 */
779 int i2c_probe(uint8_t chip);
780
781 /*
782 * Read/Write interface:
783 * chip: I2C chip address, range 0..127
784 * addr: Memory (register) address within the chip
785 * alen: Number of bytes to use for addr (typically 1, 2 for larger
786 * memories, 0 for register type devices with only one
787 * register)
788 * buffer: Where to read/write the data
789 * len: How many bytes to read/write
790 *
791 * Returns: 0 on success, not 0 on failure
792 */
793 int i2c_read(uint8_t chip, unsigned int addr, int alen,
794 uint8_t *buffer, int len);
795
796 int i2c_write(uint8_t chip, unsigned int addr, int alen,
797 uint8_t *buffer, int len);
798
799 /*
800 * Utility routines to read/write registers.
801 */
802 uint8_t i2c_reg_read(uint8_t addr, uint8_t reg);
803
804 void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val);
805
806 /*
807 * i2c_set_bus_speed:
808 *
809 * Change the speed of the active I2C bus
810 *
811 * speed - bus speed in Hz
812 *
813 * Returns: new bus speed
814 *
815 */
816 unsigned int i2c_set_bus_speed(unsigned int speed);
817
818 /*
819 * i2c_get_bus_speed:
820 *
821 * Returns speed of currently active I2C bus in Hz
822 */
823
824 unsigned int i2c_get_bus_speed(void);
825
826 #else
827
828 /*
829 * Probe the given I2C chip address. Returns 0 if a chip responded,
830 * not 0 on failure.
831 */
832 int i2c_probe(uchar chip);
833
834 /*
835 * Read/Write interface:
836 * chip: I2C chip address, range 0..127
837 * addr: Memory (register) address within the chip
838 * alen: Number of bytes to use for addr (typically 1, 2 for larger
839 * memories, 0 for register type devices with only one
840 * register)
841 * buffer: Where to read/write the data
842 * len: How many bytes to read/write
843 *
844 * Returns: 0 on success, not 0 on failure
845 */
846 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len);
847 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len);
848
849 /*
850 * Utility routines to read/write registers.
851 */
i2c_reg_read(u8 addr,u8 reg)852 static inline u8 i2c_reg_read(u8 addr, u8 reg)
853 {
854 u8 buf;
855
856 #ifdef DEBUG
857 printf("%s: addr=0x%02x, reg=0x%02x\n", __func__, addr, reg);
858 #endif
859
860 i2c_read(addr, reg, 1, &buf, 1);
861
862 return buf;
863 }
864
i2c_reg_write(u8 addr,u8 reg,u8 val)865 static inline void i2c_reg_write(u8 addr, u8 reg, u8 val)
866 {
867 #ifdef DEBUG
868 printf("%s: addr=0x%02x, reg=0x%02x, val=0x%02x\n",
869 __func__, addr, reg, val);
870 #endif
871
872 i2c_write(addr, reg, 1, &val, 1);
873 }
874
875 /*
876 * Functions for setting the current I2C bus and its speed
877 */
878
879 /*
880 * i2c_set_bus_num:
881 *
882 * Change the active I2C bus. Subsequent read/write calls will
883 * go to this one.
884 *
885 * bus - bus index, zero based
886 *
887 * Returns: 0 on success, not 0 on failure
888 *
889 */
890 int i2c_set_bus_num(unsigned int bus);
891
892 /*
893 * i2c_get_bus_num:
894 *
895 * Returns index of currently active I2C bus. Zero-based.
896 */
897
898 unsigned int i2c_get_bus_num(void);
899
900 /*
901 * i2c_set_bus_speed:
902 *
903 * Change the speed of the active I2C bus
904 *
905 * speed - bus speed in Hz
906 *
907 * Returns: 0 on success, not 0 on failure
908 *
909 */
910 int i2c_set_bus_speed(unsigned int);
911
912 /*
913 * i2c_get_bus_speed:
914 *
915 * Returns speed of currently active I2C bus in Hz
916 */
917
918 unsigned int i2c_get_bus_speed(void);
919 #endif /* CONFIG_SYS_I2C */
920
921 /*
922 * only for backwardcompatibility, should go away if we switched
923 * completely to new multibus support.
924 */
925 #if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS)
926 # if !defined(CONFIG_SYS_MAX_I2C_BUS)
927 # define CONFIG_SYS_MAX_I2C_BUS 2
928 # endif
929 # define I2C_MULTI_BUS 1
930 #else
931 # define CONFIG_SYS_MAX_I2C_BUS 1
932 # define I2C_MULTI_BUS 0
933 #endif
934
935 /* NOTE: These two functions MUST be always_inline to avoid code growth! */
936 static inline unsigned int I2C_GET_BUS(void) __attribute__((always_inline));
I2C_GET_BUS(void)937 static inline unsigned int I2C_GET_BUS(void)
938 {
939 return I2C_MULTI_BUS ? i2c_get_bus_num() : 0;
940 }
941
942 static inline void I2C_SET_BUS(unsigned int bus) __attribute__((always_inline));
I2C_SET_BUS(unsigned int bus)943 static inline void I2C_SET_BUS(unsigned int bus)
944 {
945 if (I2C_MULTI_BUS)
946 i2c_set_bus_num(bus);
947 }
948
949 /* Multi I2C definitions */
950 enum {
951 I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7,
952 I2C_8, I2C_9, I2C_10,
953 };
954
955 /**
956 * Get FDT values for i2c bus.
957 *
958 * @param blob Device tree blbo
959 * @return the number of I2C bus
960 */
961 void board_i2c_init(const void *blob);
962
963 /**
964 * Find the I2C bus number by given a FDT I2C node.
965 *
966 * @param blob Device tree blbo
967 * @param node FDT I2C node to find
968 * @return the number of I2C bus (zero based), or -1 on error
969 */
970 int i2c_get_bus_num_fdt(int node);
971
972 /**
973 * Reset the I2C bus represented by the given a FDT I2C node.
974 *
975 * @param blob Device tree blbo
976 * @param node FDT I2C node to find
977 * @return 0 if port was reset, -1 if not found
978 */
979 int i2c_reset_port_fdt(const void *blob, int node);
980
981 #endif /* !CONFIG_DM_I2C */
982
983 #endif /* _I2C_H_ */
984