1 /*
2  * Copyright 2012-15 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 
26 #ifndef __DAL_DCHUBBUB_H__
27 #define __DAL_DCHUBBUB_H__
28 
29 
30 enum dcc_control {
31 	dcc_control__256_256_xxx,
32 	dcc_control__128_128_xxx,
33 	dcc_control__256_64_64,
34 	dcc_control__256_128_128,
35 };
36 
37 enum segment_order {
38 	segment_order__na,
39 	segment_order__contiguous,
40 	segment_order__non_contiguous,
41 };
42 
43 struct dcn_hubbub_wm_set {
44 	uint32_t wm_set;
45 	uint32_t data_urgent;
46 	uint32_t pte_meta_urgent;
47 	uint32_t sr_enter;
48 	uint32_t sr_exit;
49 	uint32_t dram_clk_change;
50 	uint32_t usr_retrain;
51 	uint32_t fclk_pstate_change;
52 	uint32_t sr_enter_exit_Z8;
53 	uint32_t sr_enter_Z8;
54 };
55 
56 struct dcn_hubbub_wm {
57 	struct dcn_hubbub_wm_set sets[4];
58 };
59 
60 enum dcn_hubbub_page_table_depth {
61 	DCN_PAGE_TABLE_DEPTH_1_LEVEL,
62 	DCN_PAGE_TABLE_DEPTH_2_LEVEL,
63 	DCN_PAGE_TABLE_DEPTH_3_LEVEL,
64 	DCN_PAGE_TABLE_DEPTH_4_LEVEL
65 };
66 
67 enum dcn_hubbub_page_table_block_size {
68 	DCN_PAGE_TABLE_BLOCK_SIZE_4KB = 0,
69 	DCN_PAGE_TABLE_BLOCK_SIZE_64KB = 4,
70 	DCN_PAGE_TABLE_BLOCK_SIZE_32KB = 3
71 };
72 
73 struct dcn_hubbub_phys_addr_config {
74 	struct {
75 		uint64_t fb_top;
76 		uint64_t fb_offset;
77 		uint64_t fb_base;
78 		uint64_t agp_top;
79 		uint64_t agp_bot;
80 		uint64_t agp_base;
81 	} system_aperture;
82 
83 	struct {
84 		uint64_t page_table_start_addr;
85 		uint64_t page_table_end_addr;
86 		uint64_t page_table_base_addr;
87 	} gart_config;
88 
89 	uint64_t page_table_default_page_addr;
90 };
91 
92 struct dcn_hubbub_virt_addr_config {
93 	uint64_t				page_table_start_addr;
94 	uint64_t				page_table_end_addr;
95 	enum dcn_hubbub_page_table_block_size	page_table_block_size;
96 	enum dcn_hubbub_page_table_depth	page_table_depth;
97 	uint64_t				page_table_base_addr;
98 };
99 
100 struct hubbub_addr_config {
101 	struct dcn_hubbub_phys_addr_config pa_config;
102 	struct dcn_hubbub_virt_addr_config va_config;
103 	struct {
104 		uint64_t aperture_check_fault;
105 		uint64_t generic_fault;
106 	} default_addrs;
107 };
108 
109 struct dcn_hubbub_state {
110 	uint32_t vm_fault_addr_msb;
111 	uint32_t vm_fault_addr_lsb;
112 	uint32_t vm_error_status;
113 	uint32_t vm_error_vmid;
114 	uint32_t vm_error_pipe;
115 	uint32_t vm_error_mode;
116 	uint32_t test_debug_data;
117 	uint32_t watermark_change_cntl;
118 	uint32_t dram_state_cntl;
119 };
120 
121 struct hubbub_funcs {
122 	void (*update_dchub)(
123 			struct hubbub *hubbub,
124 			struct dchub_init_data *dh_data);
125 
126 	int (*init_dchub_sys_ctx)(
127 			struct hubbub *hubbub,
128 			struct dcn_hubbub_phys_addr_config *pa_config);
129 	void (*init_vm_ctx)(
130 			struct hubbub *hubbub,
131 			struct dcn_hubbub_virt_addr_config *va_config,
132 			int vmid);
133 
134 	bool (*get_dcc_compression_cap)(struct hubbub *hubbub,
135 			const struct dc_dcc_surface_param *input,
136 			struct dc_surface_dcc_cap *output);
137 
138 	bool (*dcc_support_swizzle)(
139 			enum swizzle_mode_values swizzle,
140 			unsigned int bytes_per_element,
141 			enum segment_order *segment_order_horz,
142 			enum segment_order *segment_order_vert);
143 
144 	bool (*dcc_support_pixel_format)(
145 			enum surface_pixel_format format,
146 			unsigned int *bytes_per_element);
147 
148 	void (*wm_read_state)(struct hubbub *hubbub,
149 			struct dcn_hubbub_wm *wm);
150 
151 	void (*get_dchub_ref_freq)(struct hubbub *hubbub,
152 			unsigned int dccg_ref_freq_inKhz,
153 			unsigned int *dchub_ref_freq_inKhz);
154 
155 	bool (*program_watermarks)(
156 			struct hubbub *hubbub,
157 			struct dcn_watermark_set *watermarks,
158 			unsigned int refclk_mhz,
159 			bool safe_to_lower);
160 
161 	bool (*is_allow_self_refresh_enabled)(struct hubbub *hubbub);
162 	void (*allow_self_refresh_control)(struct hubbub *hubbub, bool allow);
163 
164 	bool (*verify_allow_pstate_change_high)(struct hubbub *hubbub);
165 
166 	void (*apply_DEDCN21_147_wa)(struct hubbub *hubbub);
167 
168 	void (*force_wm_propagate_to_pipes)(struct hubbub *hubbub);
169 
170 	void (*hubbub_read_state)(struct hubbub *hubbub, struct dcn_hubbub_state *hubbub_state);
171 
172 	void (*force_pstate_change_control)(struct hubbub *hubbub, bool force, bool allow);
173 
174 	void (*init_watermarks)(struct hubbub *hubbub);
175 
176 	/**
177 	 * @program_det_size:
178 	 *
179 	 * DE-Tile buffers (DET) is a memory that is used to convert the tiled
180 	 * data into linear, which the rest of the display can use to generate
181 	 * the graphics output. One of the main features of this component is
182 	 * that each pipe has a configurable DET buffer which means that when a
183 	 * pipe is not enabled, the device can assign the memory to other
184 	 * enabled pipes to try to be more efficient.
185 	 *
186 	 * DET logic is handled by dchubbub. Some ASICs provide a feature named
187 	 * Configurable Return Buffer (CRB) segments which can be allocated to
188 	 * compressed or detiled buffers.
189 	 */
190 	void (*program_det_size)(struct hubbub *hubbub, int hubp_inst, unsigned det_buffer_size_in_kbyte);
191 	void (*program_compbuf_size)(struct hubbub *hubbub, unsigned compbuf_size_kb, bool safe_to_increase);
192 	void (*init_crb)(struct hubbub *hubbub);
193 	void (*force_usr_retraining_allow)(struct hubbub *hubbub, bool allow);
194 	void (*set_request_limit)(struct hubbub *hubbub, int memory_channel_count, int words_per_channel);
195 	void (*dchubbub_init)(struct hubbub *hubbub);
196 };
197 
198 struct hubbub {
199 	const struct hubbub_funcs *funcs;
200 	struct dc_context *ctx;
201 	bool riommu_active;
202 };
203 
204 #endif
205