1 // SPDX-License-Identifier: GPL-2.0-only
2 //
3 // Driver for Cirrus Logic CS35L56 smart amp
4 //
5 // Copyright (C) 2023 Cirrus Logic, Inc. and
6 // Cirrus Logic International Semiconductor Ltd.
7
8 #include <linux/completion.h>
9 #include <linux/debugfs.h>
10 #include <linux/delay.h>
11 #include <linux/err.h>
12 #include <linux/gpio/consumer.h>
13 #include <linux/interrupt.h>
14 #include <linux/math.h>
15 #include <linux/module.h>
16 #include <linux/pm.h>
17 #include <linux/pm_runtime.h>
18 #include <linux/regmap.h>
19 #include <linux/regulator/consumer.h>
20 #include <linux/slab.h>
21 #include <linux/soundwire/sdw.h>
22 #include <linux/types.h>
23 #include <linux/workqueue.h>
24 #include <sound/pcm.h>
25 #include <sound/pcm_params.h>
26 #include <sound/soc.h>
27 #include <sound/soc-dapm.h>
28 #include <sound/tlv.h>
29
30 #include "wm_adsp.h"
31 #include "cs35l56.h"
32
33 static int cs35l56_dsp_event(struct snd_soc_dapm_widget *w,
34 struct snd_kcontrol *kcontrol, int event);
35
cs35l56_wait_dsp_ready(struct cs35l56_private * cs35l56)36 static void cs35l56_wait_dsp_ready(struct cs35l56_private *cs35l56)
37 {
38 /* Wait for patching to complete */
39 flush_work(&cs35l56->dsp_work);
40 }
41
cs35l56_dspwait_get_volsw(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)42 static int cs35l56_dspwait_get_volsw(struct snd_kcontrol *kcontrol,
43 struct snd_ctl_elem_value *ucontrol)
44 {
45 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
46 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component);
47
48 cs35l56_wait_dsp_ready(cs35l56);
49 return snd_soc_get_volsw(kcontrol, ucontrol);
50 }
51
cs35l56_dspwait_put_volsw(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)52 static int cs35l56_dspwait_put_volsw(struct snd_kcontrol *kcontrol,
53 struct snd_ctl_elem_value *ucontrol)
54 {
55 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
56 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component);
57
58 cs35l56_wait_dsp_ready(cs35l56);
59 return snd_soc_put_volsw(kcontrol, ucontrol);
60 }
61
62 static const unsigned short cs35l56_asp1_mixer_regs[] = {
63 CS35L56_ASP1TX1_INPUT, CS35L56_ASP1TX2_INPUT,
64 CS35L56_ASP1TX3_INPUT, CS35L56_ASP1TX4_INPUT,
65 };
66
67 static const char * const cs35l56_asp1_mux_control_names[] = {
68 "ASP1 TX1 Source", "ASP1 TX2 Source", "ASP1 TX3 Source", "ASP1 TX4 Source"
69 };
70
cs35l56_sync_asp1_mixer_widgets_with_firmware(struct cs35l56_private * cs35l56)71 static int cs35l56_sync_asp1_mixer_widgets_with_firmware(struct cs35l56_private *cs35l56)
72 {
73 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(cs35l56->component);
74 const char *prefix = cs35l56->component->name_prefix;
75 char full_name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN];
76 const char *name;
77 struct snd_kcontrol *kcontrol;
78 struct soc_enum *e;
79 unsigned int val[4];
80 int i, item, ret;
81
82 if (cs35l56->asp1_mixer_widgets_initialized)
83 return 0;
84
85 /*
86 * Resume so we can read the registers from silicon if the regmap
87 * cache has not yet been populated.
88 */
89 ret = pm_runtime_resume_and_get(cs35l56->base.dev);
90 if (ret < 0)
91 return ret;
92
93 /* Wait for firmware download and reboot */
94 cs35l56_wait_dsp_ready(cs35l56);
95
96 ret = regmap_bulk_read(cs35l56->base.regmap, CS35L56_ASP1TX1_INPUT,
97 val, ARRAY_SIZE(val));
98
99 pm_runtime_mark_last_busy(cs35l56->base.dev);
100 pm_runtime_put_autosuspend(cs35l56->base.dev);
101
102 if (ret) {
103 dev_err(cs35l56->base.dev, "Failed to read ASP1 mixer regs: %d\n", ret);
104 return ret;
105 }
106
107 for (i = 0; i < ARRAY_SIZE(cs35l56_asp1_mux_control_names); ++i) {
108 name = cs35l56_asp1_mux_control_names[i];
109
110 if (prefix) {
111 snprintf(full_name, sizeof(full_name), "%s %s", prefix, name);
112 name = full_name;
113 }
114
115 kcontrol = snd_soc_card_get_kcontrol_locked(dapm->card, name);
116 if (!kcontrol) {
117 dev_warn(cs35l56->base.dev, "Could not find control %s\n", name);
118 continue;
119 }
120
121 e = (struct soc_enum *)kcontrol->private_value;
122 item = snd_soc_enum_val_to_item(e, val[i] & CS35L56_ASP_TXn_SRC_MASK);
123 snd_soc_dapm_mux_update_power(dapm, kcontrol, item, e, NULL);
124 }
125
126 cs35l56->asp1_mixer_widgets_initialized = true;
127
128 return 0;
129 }
130
cs35l56_dspwait_asp1tx_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)131 static int cs35l56_dspwait_asp1tx_get(struct snd_kcontrol *kcontrol,
132 struct snd_ctl_elem_value *ucontrol)
133 {
134 struct snd_soc_component *component = snd_soc_dapm_kcontrol_component(kcontrol);
135 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component);
136 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
137 int index = e->shift_l;
138 unsigned int addr, val;
139 int ret;
140
141 ret = cs35l56_sync_asp1_mixer_widgets_with_firmware(cs35l56);
142 if (ret)
143 return ret;
144
145 addr = cs35l56_asp1_mixer_regs[index];
146 ret = regmap_read(cs35l56->base.regmap, addr, &val);
147 if (ret)
148 return ret;
149
150 val &= CS35L56_ASP_TXn_SRC_MASK;
151 ucontrol->value.enumerated.item[0] = snd_soc_enum_val_to_item(e, val);
152
153 return 0;
154 }
155
cs35l56_dspwait_asp1tx_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)156 static int cs35l56_dspwait_asp1tx_put(struct snd_kcontrol *kcontrol,
157 struct snd_ctl_elem_value *ucontrol)
158 {
159 struct snd_soc_component *component = snd_soc_dapm_kcontrol_component(kcontrol);
160 struct snd_soc_dapm_context *dapm = snd_soc_dapm_kcontrol_dapm(kcontrol);
161 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component);
162 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
163 int item = ucontrol->value.enumerated.item[0];
164 int index = e->shift_l;
165 unsigned int addr, val;
166 bool changed;
167 int ret;
168
169 ret = cs35l56_sync_asp1_mixer_widgets_with_firmware(cs35l56);
170 if (ret)
171 return ret;
172
173 addr = cs35l56_asp1_mixer_regs[index];
174 val = snd_soc_enum_item_to_val(e, item);
175
176 ret = regmap_update_bits_check(cs35l56->base.regmap, addr,
177 CS35L56_ASP_TXn_SRC_MASK, val, &changed);
178 if (ret)
179 return ret;
180
181 if (changed)
182 snd_soc_dapm_mux_update_power(dapm, kcontrol, item, e, NULL);
183
184 return changed;
185 }
186
187 static DECLARE_TLV_DB_SCALE(vol_tlv, -10000, 25, 0);
188
189 static const struct snd_kcontrol_new cs35l56_controls[] = {
190 SOC_SINGLE_EXT("Speaker Switch",
191 CS35L56_MAIN_RENDER_USER_MUTE, 0, 1, 1,
192 cs35l56_dspwait_get_volsw, cs35l56_dspwait_put_volsw),
193 SOC_SINGLE_S_EXT_TLV("Speaker Volume",
194 CS35L56_MAIN_RENDER_USER_VOLUME,
195 6, -400, 400, 9, 0,
196 cs35l56_dspwait_get_volsw,
197 cs35l56_dspwait_put_volsw,
198 vol_tlv),
199 SOC_SINGLE_EXT("Posture Number", CS35L56_MAIN_POSTURE_NUMBER,
200 0, 255, 0,
201 cs35l56_dspwait_get_volsw, cs35l56_dspwait_put_volsw),
202 };
203
204 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx1_enum,
205 SND_SOC_NOPM,
206 0, 0,
207 cs35l56_tx_input_texts,
208 cs35l56_tx_input_values);
209
210 static const struct snd_kcontrol_new asp1_tx1_mux =
211 SOC_DAPM_ENUM_EXT("ASP1TX1 SRC", cs35l56_asp1tx1_enum,
212 cs35l56_dspwait_asp1tx_get, cs35l56_dspwait_asp1tx_put);
213
214 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx2_enum,
215 SND_SOC_NOPM,
216 1, 0,
217 cs35l56_tx_input_texts,
218 cs35l56_tx_input_values);
219
220 static const struct snd_kcontrol_new asp1_tx2_mux =
221 SOC_DAPM_ENUM_EXT("ASP1TX2 SRC", cs35l56_asp1tx2_enum,
222 cs35l56_dspwait_asp1tx_get, cs35l56_dspwait_asp1tx_put);
223
224 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx3_enum,
225 SND_SOC_NOPM,
226 2, 0,
227 cs35l56_tx_input_texts,
228 cs35l56_tx_input_values);
229
230 static const struct snd_kcontrol_new asp1_tx3_mux =
231 SOC_DAPM_ENUM_EXT("ASP1TX3 SRC", cs35l56_asp1tx3_enum,
232 cs35l56_dspwait_asp1tx_get, cs35l56_dspwait_asp1tx_put);
233
234 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx4_enum,
235 SND_SOC_NOPM,
236 3, 0,
237 cs35l56_tx_input_texts,
238 cs35l56_tx_input_values);
239
240 static const struct snd_kcontrol_new asp1_tx4_mux =
241 SOC_DAPM_ENUM_EXT("ASP1TX4 SRC", cs35l56_asp1tx4_enum,
242 cs35l56_dspwait_asp1tx_get, cs35l56_dspwait_asp1tx_put);
243
244 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_sdw1tx1_enum,
245 CS35L56_SWIRE_DP3_CH1_INPUT,
246 0, CS35L56_SWIRETXn_SRC_MASK,
247 cs35l56_tx_input_texts,
248 cs35l56_tx_input_values);
249
250 static const struct snd_kcontrol_new sdw1_tx1_mux =
251 SOC_DAPM_ENUM("SDW1TX1 SRC", cs35l56_sdw1tx1_enum);
252
253 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_sdw1tx2_enum,
254 CS35L56_SWIRE_DP3_CH2_INPUT,
255 0, CS35L56_SWIRETXn_SRC_MASK,
256 cs35l56_tx_input_texts,
257 cs35l56_tx_input_values);
258
259 static const struct snd_kcontrol_new sdw1_tx2_mux =
260 SOC_DAPM_ENUM("SDW1TX2 SRC", cs35l56_sdw1tx2_enum);
261
262 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_sdw1tx3_enum,
263 CS35L56_SWIRE_DP3_CH3_INPUT,
264 0, CS35L56_SWIRETXn_SRC_MASK,
265 cs35l56_tx_input_texts,
266 cs35l56_tx_input_values);
267
268 static const struct snd_kcontrol_new sdw1_tx3_mux =
269 SOC_DAPM_ENUM("SDW1TX3 SRC", cs35l56_sdw1tx3_enum);
270
271 static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_sdw1tx4_enum,
272 CS35L56_SWIRE_DP3_CH4_INPUT,
273 0, CS35L56_SWIRETXn_SRC_MASK,
274 cs35l56_tx_input_texts,
275 cs35l56_tx_input_values);
276
277 static const struct snd_kcontrol_new sdw1_tx4_mux =
278 SOC_DAPM_ENUM("SDW1TX4 SRC", cs35l56_sdw1tx4_enum);
279
cs35l56_asp1_cfg_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)280 static int cs35l56_asp1_cfg_event(struct snd_soc_dapm_widget *w,
281 struct snd_kcontrol *kcontrol, int event)
282 {
283 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
284 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component);
285
286 switch (event) {
287 case SND_SOC_DAPM_PRE_PMU:
288 /* Override register values set by firmware boot */
289 return cs35l56_force_sync_asp1_registers_from_cache(&cs35l56->base);
290 default:
291 return 0;
292 }
293 }
294
cs35l56_play_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)295 static int cs35l56_play_event(struct snd_soc_dapm_widget *w,
296 struct snd_kcontrol *kcontrol, int event)
297 {
298 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
299 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component);
300 unsigned int val;
301 int ret;
302
303 dev_dbg(cs35l56->base.dev, "play: %d\n", event);
304
305 switch (event) {
306 case SND_SOC_DAPM_PRE_PMU:
307 /* Don't wait for ACK, we check in POST_PMU that it completed */
308 return regmap_write(cs35l56->base.regmap, CS35L56_DSP_VIRTUAL1_MBOX_1,
309 CS35L56_MBOX_CMD_AUDIO_PLAY);
310 case SND_SOC_DAPM_POST_PMU:
311 /* Wait for firmware to enter PS0 power state */
312 ret = regmap_read_poll_timeout(cs35l56->base.regmap,
313 CS35L56_TRANSDUCER_ACTUAL_PS,
314 val, (val == CS35L56_PS0),
315 CS35L56_PS0_POLL_US,
316 CS35L56_PS0_TIMEOUT_US);
317 if (ret)
318 dev_err(cs35l56->base.dev, "PS0 wait failed: %d\n", ret);
319 return ret;
320 case SND_SOC_DAPM_POST_PMD:
321 return cs35l56_mbox_send(&cs35l56->base, CS35L56_MBOX_CMD_AUDIO_PAUSE);
322 default:
323 return 0;
324 }
325 }
326
327 static const struct snd_soc_dapm_widget cs35l56_dapm_widgets[] = {
328 SND_SOC_DAPM_REGULATOR_SUPPLY("VDD_B", 0, 0),
329 SND_SOC_DAPM_REGULATOR_SUPPLY("VDD_AMP", 0, 0),
330
331 SND_SOC_DAPM_SUPPLY("ASP1 CFG", SND_SOC_NOPM, 0, 0, cs35l56_asp1_cfg_event,
332 SND_SOC_DAPM_PRE_PMU),
333
334 SND_SOC_DAPM_SUPPLY("PLAY", SND_SOC_NOPM, 0, 0, cs35l56_play_event,
335 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
336
337 SND_SOC_DAPM_OUT_DRV("AMP", SND_SOC_NOPM, 0, 0, NULL, 0),
338 SND_SOC_DAPM_OUTPUT("SPK"),
339
340 SND_SOC_DAPM_PGA_E("DSP1", SND_SOC_NOPM, 0, 0, NULL, 0, cs35l56_dsp_event,
341 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
342
343 SND_SOC_DAPM_AIF_IN("ASP1RX1", NULL, 0, CS35L56_ASP1_ENABLES1,
344 CS35L56_ASP_RX1_EN_SHIFT, 0),
345 SND_SOC_DAPM_AIF_IN("ASP1RX2", NULL, 1, CS35L56_ASP1_ENABLES1,
346 CS35L56_ASP_RX2_EN_SHIFT, 0),
347 SND_SOC_DAPM_AIF_OUT("ASP1TX1", NULL, 0, CS35L56_ASP1_ENABLES1,
348 CS35L56_ASP_TX1_EN_SHIFT, 0),
349 SND_SOC_DAPM_AIF_OUT("ASP1TX2", NULL, 1, CS35L56_ASP1_ENABLES1,
350 CS35L56_ASP_TX2_EN_SHIFT, 0),
351 SND_SOC_DAPM_AIF_OUT("ASP1TX3", NULL, 2, CS35L56_ASP1_ENABLES1,
352 CS35L56_ASP_TX3_EN_SHIFT, 0),
353 SND_SOC_DAPM_AIF_OUT("ASP1TX4", NULL, 3, CS35L56_ASP1_ENABLES1,
354 CS35L56_ASP_TX4_EN_SHIFT, 0),
355
356 SND_SOC_DAPM_MUX("ASP1 TX1 Source", SND_SOC_NOPM, 0, 0, &asp1_tx1_mux),
357 SND_SOC_DAPM_MUX("ASP1 TX2 Source", SND_SOC_NOPM, 0, 0, &asp1_tx2_mux),
358 SND_SOC_DAPM_MUX("ASP1 TX3 Source", SND_SOC_NOPM, 0, 0, &asp1_tx3_mux),
359 SND_SOC_DAPM_MUX("ASP1 TX4 Source", SND_SOC_NOPM, 0, 0, &asp1_tx4_mux),
360
361 SND_SOC_DAPM_MUX("SDW1 TX1 Source", SND_SOC_NOPM, 0, 0, &sdw1_tx1_mux),
362 SND_SOC_DAPM_MUX("SDW1 TX2 Source", SND_SOC_NOPM, 0, 0, &sdw1_tx2_mux),
363 SND_SOC_DAPM_MUX("SDW1 TX3 Source", SND_SOC_NOPM, 0, 0, &sdw1_tx3_mux),
364 SND_SOC_DAPM_MUX("SDW1 TX4 Source", SND_SOC_NOPM, 0, 0, &sdw1_tx4_mux),
365
366 SND_SOC_DAPM_SIGGEN("VMON ADC"),
367 SND_SOC_DAPM_SIGGEN("IMON ADC"),
368 SND_SOC_DAPM_SIGGEN("ERRVOL ADC"),
369 SND_SOC_DAPM_SIGGEN("CLASSH ADC"),
370 SND_SOC_DAPM_SIGGEN("VDDBMON ADC"),
371 SND_SOC_DAPM_SIGGEN("VBSTMON ADC"),
372 SND_SOC_DAPM_SIGGEN("TEMPMON ADC"),
373 };
374
375 #define CS35L56_SRC_ROUTE(name) \
376 { name" Source", "ASP1RX1", "ASP1RX1" }, \
377 { name" Source", "ASP1RX2", "ASP1RX2" }, \
378 { name" Source", "VMON", "VMON ADC" }, \
379 { name" Source", "IMON", "IMON ADC" }, \
380 { name" Source", "ERRVOL", "ERRVOL ADC" }, \
381 { name" Source", "CLASSH", "CLASSH ADC" }, \
382 { name" Source", "VDDBMON", "VDDBMON ADC" }, \
383 { name" Source", "VBSTMON", "VBSTMON ADC" }, \
384 { name" Source", "DSP1TX1", "DSP1" }, \
385 { name" Source", "DSP1TX2", "DSP1" }, \
386 { name" Source", "DSP1TX3", "DSP1" }, \
387 { name" Source", "DSP1TX4", "DSP1" }, \
388 { name" Source", "DSP1TX5", "DSP1" }, \
389 { name" Source", "DSP1TX6", "DSP1" }, \
390 { name" Source", "DSP1TX7", "DSP1" }, \
391 { name" Source", "DSP1TX8", "DSP1" }, \
392 { name" Source", "TEMPMON", "TEMPMON ADC" }, \
393 { name" Source", "INTERPOLATOR", "AMP" }, \
394 { name" Source", "SDW1RX1", "SDW1 Playback" }, \
395 { name" Source", "SDW1RX2", "SDW1 Playback" },
396
397 static const struct snd_soc_dapm_route cs35l56_audio_map[] = {
398 { "AMP", NULL, "VDD_B" },
399 { "AMP", NULL, "VDD_AMP" },
400
401 { "ASP1 Playback", NULL, "ASP1 CFG" },
402 { "ASP1 Capture", NULL, "ASP1 CFG" },
403
404 { "ASP1 Playback", NULL, "PLAY" },
405 { "SDW1 Playback", NULL, "PLAY" },
406
407 { "ASP1RX1", NULL, "ASP1 Playback" },
408 { "ASP1RX2", NULL, "ASP1 Playback" },
409 { "DSP1", NULL, "ASP1RX1" },
410 { "DSP1", NULL, "ASP1RX2" },
411 { "DSP1", NULL, "SDW1 Playback" },
412 { "AMP", NULL, "DSP1" },
413 { "SPK", NULL, "AMP" },
414
415 CS35L56_SRC_ROUTE("ASP1 TX1")
416 CS35L56_SRC_ROUTE("ASP1 TX2")
417 CS35L56_SRC_ROUTE("ASP1 TX3")
418 CS35L56_SRC_ROUTE("ASP1 TX4")
419
420 { "ASP1TX1", NULL, "ASP1 TX1 Source" },
421 { "ASP1TX2", NULL, "ASP1 TX2 Source" },
422 { "ASP1TX3", NULL, "ASP1 TX3 Source" },
423 { "ASP1TX4", NULL, "ASP1 TX4 Source" },
424 { "ASP1 Capture", NULL, "ASP1TX1" },
425 { "ASP1 Capture", NULL, "ASP1TX2" },
426 { "ASP1 Capture", NULL, "ASP1TX3" },
427 { "ASP1 Capture", NULL, "ASP1TX4" },
428
429 CS35L56_SRC_ROUTE("SDW1 TX1")
430 CS35L56_SRC_ROUTE("SDW1 TX2")
431 CS35L56_SRC_ROUTE("SDW1 TX3")
432 CS35L56_SRC_ROUTE("SDW1 TX4")
433 { "SDW1 Capture", NULL, "SDW1 TX1 Source" },
434 { "SDW1 Capture", NULL, "SDW1 TX2 Source" },
435 { "SDW1 Capture", NULL, "SDW1 TX3 Source" },
436 { "SDW1 Capture", NULL, "SDW1 TX4 Source" },
437 };
438
cs35l56_dsp_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)439 static int cs35l56_dsp_event(struct snd_soc_dapm_widget *w,
440 struct snd_kcontrol *kcontrol, int event)
441 {
442 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
443 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component);
444
445 dev_dbg(cs35l56->base.dev, "%s: %d\n", __func__, event);
446
447 return wm_adsp_event(w, kcontrol, event);
448 }
449
cs35l56_asp_dai_set_fmt(struct snd_soc_dai * codec_dai,unsigned int fmt)450 static int cs35l56_asp_dai_set_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
451 {
452 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(codec_dai->component);
453 unsigned int val;
454
455 dev_dbg(cs35l56->base.dev, "%s: %#x\n", __func__, fmt);
456
457 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
458 case SND_SOC_DAIFMT_CBC_CFC:
459 break;
460 default:
461 dev_err(cs35l56->base.dev, "Unsupported clock source mode\n");
462 return -EINVAL;
463 }
464
465 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
466 case SND_SOC_DAIFMT_DSP_A:
467 val = CS35L56_ASP_FMT_DSP_A << CS35L56_ASP_FMT_SHIFT;
468 cs35l56->tdm_mode = true;
469 break;
470 case SND_SOC_DAIFMT_I2S:
471 val = CS35L56_ASP_FMT_I2S << CS35L56_ASP_FMT_SHIFT;
472 cs35l56->tdm_mode = false;
473 break;
474 default:
475 dev_err(cs35l56->base.dev, "Unsupported DAI format\n");
476 return -EINVAL;
477 }
478
479 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
480 case SND_SOC_DAIFMT_NB_IF:
481 val |= CS35L56_ASP_FSYNC_INV_MASK;
482 break;
483 case SND_SOC_DAIFMT_IB_NF:
484 val |= CS35L56_ASP_BCLK_INV_MASK;
485 break;
486 case SND_SOC_DAIFMT_IB_IF:
487 val |= CS35L56_ASP_BCLK_INV_MASK | CS35L56_ASP_FSYNC_INV_MASK;
488 break;
489 case SND_SOC_DAIFMT_NB_NF:
490 break;
491 default:
492 dev_err(cs35l56->base.dev, "Invalid clock invert\n");
493 return -EINVAL;
494 }
495
496 regmap_update_bits(cs35l56->base.regmap,
497 CS35L56_ASP1_CONTROL2,
498 CS35L56_ASP_FMT_MASK |
499 CS35L56_ASP_BCLK_INV_MASK | CS35L56_ASP_FSYNC_INV_MASK,
500 val);
501
502 /* Hi-Z DOUT in unused slots and when all TX are disabled */
503 regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_CONTROL3,
504 CS35L56_ASP1_DOUT_HIZ_CTRL_MASK,
505 CS35L56_ASP_UNUSED_HIZ_OFF_HIZ);
506
507 return 0;
508 }
509
cs35l56_make_tdm_config_word(unsigned int reg_val,unsigned long mask)510 static unsigned int cs35l56_make_tdm_config_word(unsigned int reg_val, unsigned long mask)
511 {
512 unsigned int channel_shift;
513 int bit_num;
514
515 /* Enable consecutive TX1..TXn for each of the slots set in mask */
516 channel_shift = 0;
517 for_each_set_bit(bit_num, &mask, 32) {
518 reg_val &= ~(0x3f << channel_shift);
519 reg_val |= bit_num << channel_shift;
520 channel_shift += 8;
521 }
522
523 return reg_val;
524 }
525
cs35l56_asp_dai_set_tdm_slot(struct snd_soc_dai * dai,unsigned int tx_mask,unsigned int rx_mask,int slots,int slot_width)526 static int cs35l56_asp_dai_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
527 unsigned int rx_mask, int slots, int slot_width)
528 {
529 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component);
530
531 if ((slots == 0) || (slot_width == 0)) {
532 dev_dbg(cs35l56->base.dev, "tdm config cleared\n");
533 cs35l56->asp_slot_width = 0;
534 cs35l56->asp_slot_count = 0;
535 return 0;
536 }
537
538 if (slot_width > (CS35L56_ASP_RX_WIDTH_MASK >> CS35L56_ASP_RX_WIDTH_SHIFT)) {
539 dev_err(cs35l56->base.dev, "tdm invalid slot width %d\n", slot_width);
540 return -EINVAL;
541 }
542
543 /* More than 32 slots would give an unsupportable BCLK frequency */
544 if (slots > 32) {
545 dev_err(cs35l56->base.dev, "tdm invalid slot count %d\n", slots);
546 return -EINVAL;
547 }
548
549 cs35l56->asp_slot_width = (u8)slot_width;
550 cs35l56->asp_slot_count = (u8)slots;
551
552 // Note: rx/tx is from point of view of the CPU end
553 if (tx_mask == 0)
554 tx_mask = 0x3; // ASPRX1/RX2 in slots 0 and 1
555
556 if (rx_mask == 0)
557 rx_mask = 0xf; // ASPTX1..TX4 in slots 0..3
558
559 /* Default unused slots to 63 */
560 regmap_write(cs35l56->base.regmap, CS35L56_ASP1_FRAME_CONTROL1,
561 cs35l56_make_tdm_config_word(0x3f3f3f3f, rx_mask));
562 regmap_write(cs35l56->base.regmap, CS35L56_ASP1_FRAME_CONTROL5,
563 cs35l56_make_tdm_config_word(0x3f3f3f, tx_mask));
564
565 dev_dbg(cs35l56->base.dev, "tdm slot width: %u count: %u tx_mask: %#x rx_mask: %#x\n",
566 cs35l56->asp_slot_width, cs35l56->asp_slot_count, tx_mask, rx_mask);
567
568 return 0;
569 }
570
cs35l56_asp_dai_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)571 static int cs35l56_asp_dai_hw_params(struct snd_pcm_substream *substream,
572 struct snd_pcm_hw_params *params,
573 struct snd_soc_dai *dai)
574 {
575 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component);
576 unsigned int rate = params_rate(params);
577 u8 asp_width, asp_wl;
578
579 asp_wl = params_width(params);
580 if (cs35l56->asp_slot_width)
581 asp_width = cs35l56->asp_slot_width;
582 else
583 asp_width = asp_wl;
584
585 dev_dbg(cs35l56->base.dev, "%s: wl=%d, width=%d, rate=%d",
586 __func__, asp_wl, asp_width, rate);
587
588 if (!cs35l56->sysclk_set) {
589 unsigned int slots = cs35l56->asp_slot_count;
590 unsigned int bclk_freq;
591 int freq_id;
592
593 if (slots == 0) {
594 slots = params_channels(params);
595
596 /* I2S always has an even number of slots */
597 if (!cs35l56->tdm_mode)
598 slots = round_up(slots, 2);
599 }
600
601 bclk_freq = asp_width * slots * rate;
602 freq_id = cs35l56_get_bclk_freq_id(bclk_freq);
603 if (freq_id < 0) {
604 dev_err(cs35l56->base.dev, "%s: Invalid BCLK %u\n", __func__, bclk_freq);
605 return -EINVAL;
606 }
607
608 regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_CONTROL1,
609 CS35L56_ASP_BCLK_FREQ_MASK,
610 freq_id << CS35L56_ASP_BCLK_FREQ_SHIFT);
611 }
612
613 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
614 regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_CONTROL2,
615 CS35L56_ASP_RX_WIDTH_MASK, asp_width <<
616 CS35L56_ASP_RX_WIDTH_SHIFT);
617 regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_DATA_CONTROL5,
618 CS35L56_ASP_RX_WL_MASK, asp_wl);
619 } else {
620 regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_CONTROL2,
621 CS35L56_ASP_TX_WIDTH_MASK, asp_width <<
622 CS35L56_ASP_TX_WIDTH_SHIFT);
623 regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_DATA_CONTROL1,
624 CS35L56_ASP_TX_WL_MASK, asp_wl);
625 }
626
627 return 0;
628 }
629
cs35l56_asp_dai_set_sysclk(struct snd_soc_dai * dai,int clk_id,unsigned int freq,int dir)630 static int cs35l56_asp_dai_set_sysclk(struct snd_soc_dai *dai,
631 int clk_id, unsigned int freq, int dir)
632 {
633 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component);
634 int freq_id;
635
636 if (freq == 0) {
637 cs35l56->sysclk_set = false;
638 return 0;
639 }
640
641 freq_id = cs35l56_get_bclk_freq_id(freq);
642 if (freq_id < 0)
643 return freq_id;
644
645 regmap_update_bits(cs35l56->base.regmap, CS35L56_ASP1_CONTROL1,
646 CS35L56_ASP_BCLK_FREQ_MASK,
647 freq_id << CS35L56_ASP_BCLK_FREQ_SHIFT);
648 cs35l56->sysclk_set = true;
649
650 return 0;
651 }
652
653 static const struct snd_soc_dai_ops cs35l56_ops = {
654 .set_fmt = cs35l56_asp_dai_set_fmt,
655 .set_tdm_slot = cs35l56_asp_dai_set_tdm_slot,
656 .hw_params = cs35l56_asp_dai_hw_params,
657 .set_sysclk = cs35l56_asp_dai_set_sysclk,
658 };
659
cs35l56_sdw_dai_shutdown(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)660 static void cs35l56_sdw_dai_shutdown(struct snd_pcm_substream *substream,
661 struct snd_soc_dai *dai)
662 {
663 snd_soc_dai_set_dma_data(dai, substream, NULL);
664 }
665
cs35l56_sdw_dai_set_tdm_slot(struct snd_soc_dai * dai,unsigned int tx_mask,unsigned int rx_mask,int slots,int slot_width)666 static int cs35l56_sdw_dai_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
667 unsigned int rx_mask, int slots, int slot_width)
668 {
669 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component);
670
671 /* rx/tx are from point of view of the CPU end so opposite to our rx/tx */
672 cs35l56->rx_mask = tx_mask;
673 cs35l56->tx_mask = rx_mask;
674
675 return 0;
676 }
677
cs35l56_sdw_dai_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)678 static int cs35l56_sdw_dai_hw_params(struct snd_pcm_substream *substream,
679 struct snd_pcm_hw_params *params,
680 struct snd_soc_dai *dai)
681 {
682 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component);
683 struct sdw_stream_runtime *sdw_stream = snd_soc_dai_get_dma_data(dai, substream);
684 struct sdw_stream_config sconfig;
685 struct sdw_port_config pconfig;
686 int ret;
687
688 dev_dbg(cs35l56->base.dev, "%s: rate %d\n", __func__, params_rate(params));
689
690 if (!cs35l56->base.init_done)
691 return -ENODEV;
692
693 if (!sdw_stream)
694 return -EINVAL;
695
696 memset(&sconfig, 0, sizeof(sconfig));
697 memset(&pconfig, 0, sizeof(pconfig));
698
699 sconfig.frame_rate = params_rate(params);
700 sconfig.bps = snd_pcm_format_width(params_format(params));
701
702 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
703 sconfig.direction = SDW_DATA_DIR_RX;
704 pconfig.num = CS35L56_SDW1_PLAYBACK_PORT;
705 pconfig.ch_mask = cs35l56->rx_mask;
706 } else {
707 sconfig.direction = SDW_DATA_DIR_TX;
708 pconfig.num = CS35L56_SDW1_CAPTURE_PORT;
709 pconfig.ch_mask = cs35l56->tx_mask;
710 }
711
712 if (pconfig.ch_mask == 0) {
713 sconfig.ch_count = params_channels(params);
714 pconfig.ch_mask = GENMASK(sconfig.ch_count - 1, 0);
715 } else {
716 sconfig.ch_count = hweight32(pconfig.ch_mask);
717 }
718
719 ret = sdw_stream_add_slave(cs35l56->sdw_peripheral, &sconfig, &pconfig,
720 1, sdw_stream);
721 if (ret) {
722 dev_err(dai->dev, "Failed to add sdw stream: %d\n", ret);
723 return ret;
724 }
725
726 return 0;
727 }
728
cs35l56_sdw_dai_hw_free(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)729 static int cs35l56_sdw_dai_hw_free(struct snd_pcm_substream *substream,
730 struct snd_soc_dai *dai)
731 {
732 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(dai->component);
733 struct sdw_stream_runtime *sdw_stream = snd_soc_dai_get_dma_data(dai, substream);
734
735 if (!cs35l56->sdw_peripheral)
736 return -EINVAL;
737
738 sdw_stream_remove_slave(cs35l56->sdw_peripheral, sdw_stream);
739
740 return 0;
741 }
742
cs35l56_sdw_dai_set_stream(struct snd_soc_dai * dai,void * sdw_stream,int direction)743 static int cs35l56_sdw_dai_set_stream(struct snd_soc_dai *dai,
744 void *sdw_stream, int direction)
745 {
746 snd_soc_dai_dma_data_set(dai, direction, sdw_stream);
747
748 return 0;
749 }
750
751 static const struct snd_soc_dai_ops cs35l56_sdw_dai_ops = {
752 .set_tdm_slot = cs35l56_sdw_dai_set_tdm_slot,
753 .shutdown = cs35l56_sdw_dai_shutdown,
754 .hw_params = cs35l56_sdw_dai_hw_params,
755 .hw_free = cs35l56_sdw_dai_hw_free,
756 .set_stream = cs35l56_sdw_dai_set_stream,
757 };
758
759 static struct snd_soc_dai_driver cs35l56_dai[] = {
760 {
761 .name = "cs35l56-asp1",
762 .id = 0,
763 .playback = {
764 .stream_name = "ASP1 Playback",
765 .channels_min = 1,
766 .channels_max = 2,
767 .rates = CS35L56_RATES,
768 .formats = CS35L56_RX_FORMATS,
769 },
770 .capture = {
771 .stream_name = "ASP1 Capture",
772 .channels_min = 1,
773 .channels_max = 4,
774 .rates = CS35L56_RATES,
775 .formats = CS35L56_TX_FORMATS,
776 },
777 .ops = &cs35l56_ops,
778 .symmetric_rate = 1,
779 .symmetric_sample_bits = 1,
780 },
781 {
782 .name = "cs35l56-sdw1",
783 .id = 1,
784 .playback = {
785 .stream_name = "SDW1 Playback",
786 .channels_min = 1,
787 .channels_max = 2,
788 .rates = CS35L56_RATES,
789 .formats = CS35L56_RX_FORMATS,
790 },
791 .capture = {
792 .stream_name = "SDW1 Capture",
793 .channels_min = 1,
794 .channels_max = 4,
795 .rates = CS35L56_RATES,
796 .formats = CS35L56_TX_FORMATS,
797 },
798 .symmetric_rate = 1,
799 .ops = &cs35l56_sdw_dai_ops,
800 }
801 };
802
cs35l56_secure_patch(struct cs35l56_private * cs35l56)803 static void cs35l56_secure_patch(struct cs35l56_private *cs35l56)
804 {
805 int ret;
806
807 /* Use wm_adsp to load and apply the firmware patch and coefficient files */
808 ret = wm_adsp_power_up(&cs35l56->dsp, true);
809 if (ret)
810 dev_dbg(cs35l56->base.dev, "%s: wm_adsp_power_up ret %d\n", __func__, ret);
811 else
812 cs35l56_mbox_send(&cs35l56->base, CS35L56_MBOX_CMD_AUDIO_REINIT);
813 }
814
cs35l56_patch(struct cs35l56_private * cs35l56)815 static void cs35l56_patch(struct cs35l56_private *cs35l56)
816 {
817 unsigned int firmware_missing;
818 int ret;
819
820 ret = regmap_read(cs35l56->base.regmap, CS35L56_PROTECTION_STATUS, &firmware_missing);
821 if (ret) {
822 dev_err(cs35l56->base.dev, "Failed to read PROTECTION_STATUS: %d\n", ret);
823 return;
824 }
825
826 firmware_missing &= CS35L56_FIRMWARE_MISSING;
827
828 /*
829 * Disable SoundWire interrupts to prevent race with IRQ work.
830 * Setting sdw_irq_no_unmask prevents the handler re-enabling
831 * the SoundWire interrupt.
832 */
833 if (cs35l56->sdw_peripheral) {
834 cs35l56->sdw_irq_no_unmask = true;
835 flush_work(&cs35l56->sdw_irq_work);
836 sdw_write_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_MASK_1, 0);
837 sdw_read_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_STAT_1);
838 sdw_write_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_STAT_1, 0xFF);
839 flush_work(&cs35l56->sdw_irq_work);
840 }
841
842 ret = cs35l56_firmware_shutdown(&cs35l56->base);
843 if (ret)
844 goto err;
845
846 /*
847 * Use wm_adsp to load and apply the firmware patch and coefficient files,
848 * but only if firmware is missing. If firmware is already patched just
849 * power-up wm_adsp without downloading firmware.
850 */
851 ret = wm_adsp_power_up(&cs35l56->dsp, !!firmware_missing);
852 if (ret) {
853 dev_dbg(cs35l56->base.dev, "%s: wm_adsp_power_up ret %d\n", __func__, ret);
854 goto err;
855 }
856
857 mutex_lock(&cs35l56->base.irq_lock);
858
859 reinit_completion(&cs35l56->init_completion);
860
861 cs35l56->soft_resetting = true;
862 cs35l56_system_reset(&cs35l56->base, !!cs35l56->sdw_peripheral);
863
864 if (cs35l56->sdw_peripheral) {
865 /*
866 * The system-reset causes the CS35L56 to detach from the bus.
867 * Wait for the manager to re-enumerate the CS35L56 and
868 * cs35l56_init() to run again.
869 */
870 if (!wait_for_completion_timeout(&cs35l56->init_completion,
871 msecs_to_jiffies(5000))) {
872 dev_err(cs35l56->base.dev, "%s: init_completion timed out (SDW)\n",
873 __func__);
874 goto err_unlock;
875 }
876 } else if (cs35l56_init(cs35l56)) {
877 goto err_unlock;
878 }
879
880 regmap_clear_bits(cs35l56->base.regmap, CS35L56_PROTECTION_STATUS,
881 CS35L56_FIRMWARE_MISSING);
882 cs35l56->base.fw_patched = true;
883
884 err_unlock:
885 mutex_unlock(&cs35l56->base.irq_lock);
886 err:
887 /* Re-enable SoundWire interrupts */
888 if (cs35l56->sdw_peripheral) {
889 cs35l56->sdw_irq_no_unmask = false;
890 sdw_write_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_MASK_1,
891 CS35L56_SDW_INT_MASK_CODEC_IRQ);
892 }
893 }
894
cs35l56_dsp_work(struct work_struct * work)895 static void cs35l56_dsp_work(struct work_struct *work)
896 {
897 struct cs35l56_private *cs35l56 = container_of(work,
898 struct cs35l56_private,
899 dsp_work);
900
901 if (!cs35l56->base.init_done)
902 return;
903
904 pm_runtime_get_sync(cs35l56->base.dev);
905
906 /* Populate fw file qualifier with the revision and security state */
907 if (!cs35l56->dsp.fwf_name) {
908 cs35l56->dsp.fwf_name = kasprintf(GFP_KERNEL, "%02x%s-dsp1",
909 cs35l56->base.rev,
910 cs35l56->base.secured ? "-s" : "");
911 if (!cs35l56->dsp.fwf_name)
912 goto err;
913 }
914
915 dev_dbg(cs35l56->base.dev, "DSP fwf name: '%s' system name: '%s'\n",
916 cs35l56->dsp.fwf_name, cs35l56->dsp.system_name);
917
918 /*
919 * When the device is running in secure mode the firmware files can
920 * only contain insecure tunings and therefore we do not need to
921 * shutdown the firmware to apply them and can use the lower cost
922 * reinit sequence instead.
923 */
924 if (cs35l56->base.secured)
925 cs35l56_secure_patch(cs35l56);
926 else
927 cs35l56_patch(cs35l56);
928
929 err:
930 pm_runtime_mark_last_busy(cs35l56->base.dev);
931 pm_runtime_put_autosuspend(cs35l56->base.dev);
932 }
933
cs35l56_component_probe(struct snd_soc_component * component)934 static int cs35l56_component_probe(struct snd_soc_component *component)
935 {
936 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component);
937 struct dentry *debugfs_root = component->debugfs_root;
938 unsigned short vendor, device;
939
940 BUILD_BUG_ON(ARRAY_SIZE(cs35l56_tx_input_texts) != ARRAY_SIZE(cs35l56_tx_input_values));
941
942 if (!cs35l56->dsp.system_name &&
943 (snd_soc_card_get_pci_ssid(component->card, &vendor, &device) == 0)) {
944 cs35l56->dsp.system_name = devm_kasprintf(cs35l56->base.dev,
945 GFP_KERNEL,
946 "%04x%04x",
947 vendor, device);
948 if (!cs35l56->dsp.system_name)
949 return -ENOMEM;
950 }
951
952 if (!wait_for_completion_timeout(&cs35l56->init_completion,
953 msecs_to_jiffies(5000))) {
954 dev_err(cs35l56->base.dev, "%s: init_completion timed out\n", __func__);
955 return -ENODEV;
956 }
957
958 cs35l56->component = component;
959 wm_adsp2_component_probe(&cs35l56->dsp, component);
960
961 debugfs_create_bool("init_done", 0444, debugfs_root, &cs35l56->base.init_done);
962 debugfs_create_bool("can_hibernate", 0444, debugfs_root, &cs35l56->base.can_hibernate);
963 debugfs_create_bool("fw_patched", 0444, debugfs_root, &cs35l56->base.fw_patched);
964
965 /*
966 * The widgets for the ASP1TX mixer can't be initialized
967 * until the firmware has been downloaded and rebooted.
968 */
969 regcache_drop_region(cs35l56->base.regmap, CS35L56_ASP1TX1_INPUT, CS35L56_ASP1TX4_INPUT);
970 cs35l56->asp1_mixer_widgets_initialized = false;
971
972 queue_work(cs35l56->dsp_wq, &cs35l56->dsp_work);
973
974 return 0;
975 }
976
cs35l56_component_remove(struct snd_soc_component * component)977 static void cs35l56_component_remove(struct snd_soc_component *component)
978 {
979 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component);
980
981 cancel_work_sync(&cs35l56->dsp_work);
982
983 if (cs35l56->dsp.cs_dsp.booted)
984 wm_adsp_power_down(&cs35l56->dsp);
985
986 wm_adsp2_component_remove(&cs35l56->dsp, component);
987
988 kfree(cs35l56->dsp.fwf_name);
989 cs35l56->dsp.fwf_name = NULL;
990
991 cs35l56->component = NULL;
992 }
993
cs35l56_set_bias_level(struct snd_soc_component * component,enum snd_soc_bias_level level)994 static int cs35l56_set_bias_level(struct snd_soc_component *component,
995 enum snd_soc_bias_level level)
996 {
997 struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component);
998
999 switch (level) {
1000 case SND_SOC_BIAS_STANDBY:
1001 /*
1002 * Wait for patching to complete when transitioning from
1003 * BIAS_OFF to BIAS_STANDBY
1004 */
1005 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF)
1006 cs35l56_wait_dsp_ready(cs35l56);
1007
1008 break;
1009 default:
1010 break;
1011 }
1012
1013 return 0;
1014 }
1015
1016 static const struct snd_soc_component_driver soc_component_dev_cs35l56 = {
1017 .probe = cs35l56_component_probe,
1018 .remove = cs35l56_component_remove,
1019
1020 .dapm_widgets = cs35l56_dapm_widgets,
1021 .num_dapm_widgets = ARRAY_SIZE(cs35l56_dapm_widgets),
1022 .dapm_routes = cs35l56_audio_map,
1023 .num_dapm_routes = ARRAY_SIZE(cs35l56_audio_map),
1024 .controls = cs35l56_controls,
1025 .num_controls = ARRAY_SIZE(cs35l56_controls),
1026
1027 .set_bias_level = cs35l56_set_bias_level,
1028
1029 .suspend_bias_off = 1, /* see cs35l56_system_resume() */
1030 };
1031
cs35l56_runtime_suspend_i2c_spi(struct device * dev)1032 static int __maybe_unused cs35l56_runtime_suspend_i2c_spi(struct device *dev)
1033 {
1034 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);
1035
1036 return cs35l56_runtime_suspend_common(&cs35l56->base);
1037 }
1038
cs35l56_runtime_resume_i2c_spi(struct device * dev)1039 static int __maybe_unused cs35l56_runtime_resume_i2c_spi(struct device *dev)
1040 {
1041 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);
1042
1043 return cs35l56_runtime_resume_common(&cs35l56->base, false);
1044 }
1045
cs35l56_system_suspend(struct device * dev)1046 int cs35l56_system_suspend(struct device *dev)
1047 {
1048 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);
1049
1050 dev_dbg(dev, "system_suspend\n");
1051
1052 if (cs35l56->component)
1053 flush_work(&cs35l56->dsp_work);
1054
1055 /*
1056 * The interrupt line is normally shared, but after we start suspending
1057 * we can't check if our device is the source of an interrupt, and can't
1058 * clear it. Prevent this race by temporarily disabling the parent irq
1059 * until we reach _no_irq.
1060 */
1061 if (cs35l56->base.irq)
1062 disable_irq(cs35l56->base.irq);
1063
1064 return pm_runtime_force_suspend(dev);
1065 }
1066 EXPORT_SYMBOL_GPL(cs35l56_system_suspend);
1067
cs35l56_system_suspend_late(struct device * dev)1068 int cs35l56_system_suspend_late(struct device *dev)
1069 {
1070 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);
1071
1072 dev_dbg(dev, "system_suspend_late\n");
1073
1074 /*
1075 * Assert RESET before removing supplies.
1076 * RESET is usually shared by all amps so it must not be asserted until
1077 * all driver instances have done their suspend() stage.
1078 */
1079 if (cs35l56->base.reset_gpio) {
1080 gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 0);
1081 cs35l56_wait_min_reset_pulse();
1082 }
1083
1084 regulator_bulk_disable(ARRAY_SIZE(cs35l56->supplies), cs35l56->supplies);
1085
1086 return 0;
1087 }
1088 EXPORT_SYMBOL_GPL(cs35l56_system_suspend_late);
1089
cs35l56_system_suspend_no_irq(struct device * dev)1090 int cs35l56_system_suspend_no_irq(struct device *dev)
1091 {
1092 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);
1093
1094 dev_dbg(dev, "system_suspend_no_irq\n");
1095
1096 /* Handlers are now disabled so the parent IRQ can safely be re-enabled. */
1097 if (cs35l56->base.irq)
1098 enable_irq(cs35l56->base.irq);
1099
1100 return 0;
1101 }
1102 EXPORT_SYMBOL_GPL(cs35l56_system_suspend_no_irq);
1103
cs35l56_system_resume_no_irq(struct device * dev)1104 int cs35l56_system_resume_no_irq(struct device *dev)
1105 {
1106 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);
1107
1108 dev_dbg(dev, "system_resume_no_irq\n");
1109
1110 /*
1111 * WAKE interrupts unmask if the CS35L56 hibernates, which can cause
1112 * spurious interrupts, and the interrupt line is normally shared.
1113 * We can't check if our device is the source of an interrupt, and can't
1114 * clear it, until it has fully resumed. Prevent this race by temporarily
1115 * disabling the parent irq until we complete resume().
1116 */
1117 if (cs35l56->base.irq)
1118 disable_irq(cs35l56->base.irq);
1119
1120 return 0;
1121 }
1122 EXPORT_SYMBOL_GPL(cs35l56_system_resume_no_irq);
1123
cs35l56_system_resume_early(struct device * dev)1124 int cs35l56_system_resume_early(struct device *dev)
1125 {
1126 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);
1127 int ret;
1128
1129 dev_dbg(dev, "system_resume_early\n");
1130
1131 /* Ensure a spec-compliant RESET pulse. */
1132 if (cs35l56->base.reset_gpio) {
1133 gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 0);
1134 cs35l56_wait_min_reset_pulse();
1135 }
1136
1137 /* Enable supplies before releasing RESET. */
1138 ret = regulator_bulk_enable(ARRAY_SIZE(cs35l56->supplies), cs35l56->supplies);
1139 if (ret) {
1140 dev_err(dev, "system_resume_early failed to enable supplies: %d\n", ret);
1141 return ret;
1142 }
1143
1144 /* Release shared RESET before drivers start resume(). */
1145 gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 1);
1146
1147 return 0;
1148 }
1149 EXPORT_SYMBOL_GPL(cs35l56_system_resume_early);
1150
cs35l56_system_resume(struct device * dev)1151 int cs35l56_system_resume(struct device *dev)
1152 {
1153 struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);
1154 int ret;
1155
1156 dev_dbg(dev, "system_resume\n");
1157
1158 /*
1159 * We might have done a hard reset or the CS35L56 was power-cycled
1160 * so wait for control port to be ready.
1161 */
1162 cs35l56_wait_control_port_ready();
1163
1164 /* Undo pm_runtime_force_suspend() before re-enabling the irq */
1165 ret = pm_runtime_force_resume(dev);
1166 if (cs35l56->base.irq)
1167 enable_irq(cs35l56->base.irq);
1168
1169 if (ret)
1170 return ret;
1171
1172 /* Firmware won't have been loaded if the component hasn't probed */
1173 if (!cs35l56->component)
1174 return 0;
1175
1176 ret = cs35l56_is_fw_reload_needed(&cs35l56->base);
1177 dev_dbg(cs35l56->base.dev, "fw_reload_needed: %d\n", ret);
1178 if (ret < 1)
1179 return ret;
1180
1181 cs35l56->base.fw_patched = false;
1182 wm_adsp_power_down(&cs35l56->dsp);
1183 queue_work(cs35l56->dsp_wq, &cs35l56->dsp_work);
1184
1185 /*
1186 * suspend_bias_off ensures we are now in BIAS_OFF so there will be
1187 * a BIAS_OFF->BIAS_STANDBY transition to complete dsp patching.
1188 */
1189
1190 return 0;
1191 }
1192 EXPORT_SYMBOL_GPL(cs35l56_system_resume);
1193
cs35l56_dsp_init(struct cs35l56_private * cs35l56)1194 static int cs35l56_dsp_init(struct cs35l56_private *cs35l56)
1195 {
1196 struct wm_adsp *dsp;
1197 int ret;
1198
1199 cs35l56->dsp_wq = create_singlethread_workqueue("cs35l56-dsp");
1200 if (!cs35l56->dsp_wq)
1201 return -ENOMEM;
1202
1203 INIT_WORK(&cs35l56->dsp_work, cs35l56_dsp_work);
1204
1205 dsp = &cs35l56->dsp;
1206 cs35l56_init_cs_dsp(&cs35l56->base, &dsp->cs_dsp);
1207 dsp->part = "cs35l56";
1208 dsp->fw = 12;
1209 dsp->wmfw_optional = true;
1210
1211 dev_dbg(cs35l56->base.dev, "DSP system name: '%s'\n", dsp->system_name);
1212
1213 ret = wm_halo_init(dsp);
1214 if (ret != 0) {
1215 dev_err(cs35l56->base.dev, "wm_halo_init failed\n");
1216 return ret;
1217 }
1218
1219 return 0;
1220 }
1221
cs35l56_get_firmware_uid(struct cs35l56_private * cs35l56)1222 static int cs35l56_get_firmware_uid(struct cs35l56_private *cs35l56)
1223 {
1224 struct device *dev = cs35l56->base.dev;
1225 const char *prop;
1226 int ret;
1227
1228 ret = device_property_read_string(dev, "cirrus,firmware-uid", &prop);
1229 /* If bad sw node property, return 0 and fallback to legacy firmware path */
1230 if (ret < 0)
1231 return 0;
1232
1233 cs35l56->dsp.system_name = devm_kstrdup(dev, prop, GFP_KERNEL);
1234 if (cs35l56->dsp.system_name == NULL)
1235 return -ENOMEM;
1236
1237 dev_dbg(dev, "Firmware UID: %s\n", cs35l56->dsp.system_name);
1238
1239 return 0;
1240 }
1241
cs35l56_common_probe(struct cs35l56_private * cs35l56)1242 int cs35l56_common_probe(struct cs35l56_private *cs35l56)
1243 {
1244 int ret;
1245
1246 init_completion(&cs35l56->init_completion);
1247 mutex_init(&cs35l56->base.irq_lock);
1248
1249 dev_set_drvdata(cs35l56->base.dev, cs35l56);
1250
1251 cs35l56_fill_supply_names(cs35l56->supplies);
1252 ret = devm_regulator_bulk_get(cs35l56->base.dev, ARRAY_SIZE(cs35l56->supplies),
1253 cs35l56->supplies);
1254 if (ret != 0)
1255 return dev_err_probe(cs35l56->base.dev, ret, "Failed to request supplies\n");
1256
1257 /* Reset could be controlled by the BIOS or shared by multiple amps */
1258 cs35l56->base.reset_gpio = devm_gpiod_get_optional(cs35l56->base.dev, "reset",
1259 GPIOD_OUT_LOW);
1260 if (IS_ERR(cs35l56->base.reset_gpio)) {
1261 ret = PTR_ERR(cs35l56->base.reset_gpio);
1262 /*
1263 * If RESET is shared the first amp to probe will grab the reset
1264 * line and reset all the amps
1265 */
1266 if (ret != -EBUSY)
1267 return dev_err_probe(cs35l56->base.dev, ret, "Failed to get reset GPIO\n");
1268
1269 dev_info(cs35l56->base.dev, "Reset GPIO busy, assume shared reset\n");
1270 cs35l56->base.reset_gpio = NULL;
1271 }
1272
1273 ret = regulator_bulk_enable(ARRAY_SIZE(cs35l56->supplies), cs35l56->supplies);
1274 if (ret != 0)
1275 return dev_err_probe(cs35l56->base.dev, ret, "Failed to enable supplies\n");
1276
1277 if (cs35l56->base.reset_gpio) {
1278 /* ACPI can override GPIOD_OUT_LOW flag so force it to start low */
1279 gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 0);
1280 cs35l56_wait_min_reset_pulse();
1281 gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 1);
1282 }
1283
1284 ret = cs35l56_get_firmware_uid(cs35l56);
1285 if (ret != 0)
1286 goto err;
1287
1288 ret = cs35l56_dsp_init(cs35l56);
1289 if (ret < 0) {
1290 dev_err_probe(cs35l56->base.dev, ret, "DSP init failed\n");
1291 goto err;
1292 }
1293
1294 ret = devm_snd_soc_register_component(cs35l56->base.dev,
1295 &soc_component_dev_cs35l56,
1296 cs35l56_dai, ARRAY_SIZE(cs35l56_dai));
1297 if (ret < 0) {
1298 dev_err_probe(cs35l56->base.dev, ret, "Register codec failed\n");
1299 goto err;
1300 }
1301
1302 return 0;
1303
1304 err:
1305 gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 0);
1306 regulator_bulk_disable(ARRAY_SIZE(cs35l56->supplies), cs35l56->supplies);
1307
1308 return ret;
1309 }
1310 EXPORT_SYMBOL_NS_GPL(cs35l56_common_probe, SND_SOC_CS35L56_CORE);
1311
cs35l56_init(struct cs35l56_private * cs35l56)1312 int cs35l56_init(struct cs35l56_private *cs35l56)
1313 {
1314 int ret;
1315
1316 /*
1317 * Check whether the actions associated with soft reset or one time
1318 * init need to be performed.
1319 */
1320 if (cs35l56->soft_resetting)
1321 goto post_soft_reset;
1322
1323 if (cs35l56->base.init_done)
1324 return 0;
1325
1326 pm_runtime_set_autosuspend_delay(cs35l56->base.dev, 100);
1327 pm_runtime_use_autosuspend(cs35l56->base.dev);
1328 pm_runtime_set_active(cs35l56->base.dev);
1329 pm_runtime_enable(cs35l56->base.dev);
1330
1331 ret = cs35l56_hw_init(&cs35l56->base);
1332 if (ret < 0)
1333 return ret;
1334
1335 ret = cs35l56_set_patch(&cs35l56->base);
1336 if (ret)
1337 return ret;
1338
1339 if (!cs35l56->base.reset_gpio) {
1340 dev_dbg(cs35l56->base.dev, "No reset gpio: using soft reset\n");
1341 cs35l56->soft_resetting = true;
1342 cs35l56_system_reset(&cs35l56->base, !!cs35l56->sdw_peripheral);
1343 if (cs35l56->sdw_peripheral) {
1344 /* Keep alive while we wait for re-enumeration */
1345 pm_runtime_get_noresume(cs35l56->base.dev);
1346 return 0;
1347 }
1348 }
1349
1350 post_soft_reset:
1351 if (cs35l56->soft_resetting) {
1352 cs35l56->soft_resetting = false;
1353
1354 /* Done re-enumerating after one-time init so release the keep-alive */
1355 if (cs35l56->sdw_peripheral && !cs35l56->base.init_done)
1356 pm_runtime_put_noidle(cs35l56->base.dev);
1357
1358 regcache_mark_dirty(cs35l56->base.regmap);
1359 ret = cs35l56_wait_for_firmware_boot(&cs35l56->base);
1360 if (ret)
1361 return ret;
1362
1363 dev_dbg(cs35l56->base.dev, "Firmware rebooted after soft reset\n");
1364 }
1365
1366 /* Disable auto-hibernate so that runtime_pm has control */
1367 ret = cs35l56_mbox_send(&cs35l56->base, CS35L56_MBOX_CMD_PREVENT_AUTO_HIBERNATE);
1368 if (ret)
1369 return ret;
1370
1371 /* Registers could be dirty after soft reset or SoundWire enumeration */
1372 regcache_sync(cs35l56->base.regmap);
1373
1374 /* Set ASP1 DOUT to high-impedance when it is not transmitting audio data. */
1375 ret = regmap_set_bits(cs35l56->base.regmap, CS35L56_ASP1_CONTROL3,
1376 CS35L56_ASP1_DOUT_HIZ_CTRL_MASK);
1377 if (ret)
1378 return dev_err_probe(cs35l56->base.dev, ret, "Failed to write ASP1_CONTROL3\n");
1379
1380 cs35l56->base.init_done = true;
1381 complete(&cs35l56->init_completion);
1382
1383 return 0;
1384 }
1385 EXPORT_SYMBOL_NS_GPL(cs35l56_init, SND_SOC_CS35L56_CORE);
1386
cs35l56_remove(struct cs35l56_private * cs35l56)1387 void cs35l56_remove(struct cs35l56_private *cs35l56)
1388 {
1389 cs35l56->base.init_done = false;
1390
1391 /*
1392 * WAKE IRQs unmask if CS35L56 hibernates so free the handler to
1393 * prevent it racing with remove().
1394 */
1395 if (cs35l56->base.irq)
1396 devm_free_irq(cs35l56->base.dev, cs35l56->base.irq, &cs35l56->base);
1397
1398 flush_workqueue(cs35l56->dsp_wq);
1399 destroy_workqueue(cs35l56->dsp_wq);
1400
1401 pm_runtime_dont_use_autosuspend(cs35l56->base.dev);
1402 pm_runtime_suspend(cs35l56->base.dev);
1403 pm_runtime_disable(cs35l56->base.dev);
1404
1405 regcache_cache_only(cs35l56->base.regmap, true);
1406
1407 gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 0);
1408 regulator_bulk_disable(ARRAY_SIZE(cs35l56->supplies), cs35l56->supplies);
1409 }
1410 EXPORT_SYMBOL_NS_GPL(cs35l56_remove, SND_SOC_CS35L56_CORE);
1411
1412 const struct dev_pm_ops cs35l56_pm_ops_i2c_spi = {
1413 SET_RUNTIME_PM_OPS(cs35l56_runtime_suspend_i2c_spi, cs35l56_runtime_resume_i2c_spi, NULL)
1414 SYSTEM_SLEEP_PM_OPS(cs35l56_system_suspend, cs35l56_system_resume)
1415 LATE_SYSTEM_SLEEP_PM_OPS(cs35l56_system_suspend_late, cs35l56_system_resume_early)
1416 NOIRQ_SYSTEM_SLEEP_PM_OPS(cs35l56_system_suspend_no_irq, cs35l56_system_resume_no_irq)
1417 };
1418 EXPORT_SYMBOL_NS_GPL(cs35l56_pm_ops_i2c_spi, SND_SOC_CS35L56_CORE);
1419
1420 MODULE_DESCRIPTION("ASoC CS35L56 driver");
1421 MODULE_IMPORT_NS(SND_SOC_CS35L56_SHARED);
1422 MODULE_AUTHOR("Richard Fitzgerald <rf@opensource.cirrus.com>");
1423 MODULE_AUTHOR("Simon Trimmer <simont@opensource.cirrus.com>");
1424 MODULE_LICENSE("GPL");
1425