1 /*
2 * Raspberry Pi emulation (c) 2012 Gregory Estrade
3 * Upstreaming code cleanup [including bcm2835_*] (c) 2013 Jan Petrous
4 *
5 * Rasperry Pi 2 emulation and refactoring Copyright (c) 2015, Microsoft
6 * Written by Andrew Baumann
7 *
8 * This work is licensed under the terms of the GNU GPL, version 2 or later.
9 * See the COPYING file in the top-level directory.
10 */
11
12 #include "qemu/osdep.h"
13 #include "qapi/error.h"
14 #include "qemu/module.h"
15 #include "hw/arm/bcm2835_peripherals.h"
16 #include "hw/misc/bcm2835_mbox_defs.h"
17 #include "hw/arm/raspi_platform.h"
18 #include "sysemu/sysemu.h"
19
20 /* Peripheral base address on the VC (GPU) system bus */
21 #define BCM2835_VC_PERI_BASE 0x7e000000
22
23 /* Capabilities for SD controller: no DMA, high-speed, default clocks etc. */
24 #define BCM2835_SDHC_CAPAREG 0x52134b4
25
26 /*
27 * According to Linux driver & DTS, dma channels 0--10 have separate IRQ,
28 * while channels 11--14 share one IRQ:
29 */
30 #define SEPARATE_DMA_IRQ_MAX 10
31 #define ORGATED_DMA_IRQ_COUNT 4
32
create_unimp(BCM2835PeripheralState * ps,UnimplementedDeviceState * uds,const char * name,hwaddr ofs,hwaddr size)33 static void create_unimp(BCM2835PeripheralState *ps,
34 UnimplementedDeviceState *uds,
35 const char *name, hwaddr ofs, hwaddr size)
36 {
37 object_initialize_child(OBJECT(ps), name, uds, TYPE_UNIMPLEMENTED_DEVICE);
38 qdev_prop_set_string(DEVICE(uds), "name", name);
39 qdev_prop_set_uint64(DEVICE(uds), "size", size);
40 sysbus_realize(SYS_BUS_DEVICE(uds), &error_fatal);
41 memory_region_add_subregion_overlap(&ps->peri_mr, ofs,
42 sysbus_mmio_get_region(SYS_BUS_DEVICE(uds), 0), -1000);
43 }
44
bcm2835_peripherals_init(Object * obj)45 static void bcm2835_peripherals_init(Object *obj)
46 {
47 BCM2835PeripheralState *s = BCM2835_PERIPHERALS(obj);
48
49 /* Memory region for peripheral devices, which we export to our parent */
50 memory_region_init(&s->peri_mr, obj,"bcm2835-peripherals", 0x1000000);
51 sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->peri_mr);
52
53 /* Internal memory region for peripheral bus addresses (not exported) */
54 memory_region_init(&s->gpu_bus_mr, obj, "bcm2835-gpu", (uint64_t)1 << 32);
55
56 /* Internal memory region for request/response communication with
57 * mailbox-addressable peripherals (not exported)
58 */
59 memory_region_init(&s->mbox_mr, obj, "bcm2835-mbox",
60 MBOX_CHAN_COUNT << MBOX_AS_CHAN_SHIFT);
61
62 /* Interrupt Controller */
63 object_initialize_child(obj, "ic", &s->ic, TYPE_BCM2835_IC);
64
65 /* SYS Timer */
66 object_initialize_child(obj, "systimer", &s->systmr,
67 TYPE_BCM2835_SYSTIMER);
68
69 /* UART0 */
70 object_initialize_child(obj, "uart0", &s->uart0, TYPE_PL011);
71
72 /* AUX / UART1 */
73 object_initialize_child(obj, "aux", &s->aux, TYPE_BCM2835_AUX);
74
75 /* Mailboxes */
76 object_initialize_child(obj, "mbox", &s->mboxes, TYPE_BCM2835_MBOX);
77
78 object_property_add_const_link(OBJECT(&s->mboxes), "mbox-mr",
79 OBJECT(&s->mbox_mr));
80
81 /* Framebuffer */
82 object_initialize_child(obj, "fb", &s->fb, TYPE_BCM2835_FB);
83 object_property_add_alias(obj, "vcram-size", OBJECT(&s->fb), "vcram-size");
84
85 object_property_add_const_link(OBJECT(&s->fb), "dma-mr",
86 OBJECT(&s->gpu_bus_mr));
87
88 /* Property channel */
89 object_initialize_child(obj, "property", &s->property,
90 TYPE_BCM2835_PROPERTY);
91 object_property_add_alias(obj, "board-rev", OBJECT(&s->property),
92 "board-rev");
93 object_property_add_alias(obj, "command-line", OBJECT(&s->property),
94 "command-line");
95
96 object_property_add_const_link(OBJECT(&s->property), "fb",
97 OBJECT(&s->fb));
98 object_property_add_const_link(OBJECT(&s->property), "dma-mr",
99 OBJECT(&s->gpu_bus_mr));
100
101 /* Random Number Generator */
102 object_initialize_child(obj, "rng", &s->rng, TYPE_BCM2835_RNG);
103
104 /* Extended Mass Media Controller */
105 object_initialize_child(obj, "sdhci", &s->sdhci, TYPE_SYSBUS_SDHCI);
106
107 /* SDHOST */
108 object_initialize_child(obj, "sdhost", &s->sdhost, TYPE_BCM2835_SDHOST);
109
110 /* DMA Channels */
111 object_initialize_child(obj, "dma", &s->dma, TYPE_BCM2835_DMA);
112
113 object_initialize_child(obj, "orgated-dma-irq",
114 &s->orgated_dma_irq, TYPE_OR_IRQ);
115 object_property_set_int(OBJECT(&s->orgated_dma_irq), "num-lines",
116 ORGATED_DMA_IRQ_COUNT, &error_abort);
117
118 object_property_add_const_link(OBJECT(&s->dma), "dma-mr",
119 OBJECT(&s->gpu_bus_mr));
120
121 /* Thermal */
122 object_initialize_child(obj, "thermal", &s->thermal, TYPE_BCM2835_THERMAL);
123
124 /* GPIO */
125 object_initialize_child(obj, "gpio", &s->gpio, TYPE_BCM2835_GPIO);
126
127 object_property_add_const_link(OBJECT(&s->gpio), "sdbus-sdhci",
128 OBJECT(&s->sdhci.sdbus));
129 object_property_add_const_link(OBJECT(&s->gpio), "sdbus-sdhost",
130 OBJECT(&s->sdhost.sdbus));
131
132 /* Mphi */
133 object_initialize_child(obj, "mphi", &s->mphi, TYPE_BCM2835_MPHI);
134
135 /* DWC2 */
136 object_initialize_child(obj, "dwc2", &s->dwc2, TYPE_DWC2_USB);
137
138 /* CPRMAN clock manager */
139 object_initialize_child(obj, "cprman", &s->cprman, TYPE_BCM2835_CPRMAN);
140
141 object_property_add_const_link(OBJECT(&s->dwc2), "dma-mr",
142 OBJECT(&s->gpu_bus_mr));
143
144 /* Power Management */
145 object_initialize_child(obj, "powermgt", &s->powermgt,
146 TYPE_BCM2835_POWERMGT);
147 }
148
bcm2835_peripherals_realize(DeviceState * dev,Error ** errp)149 static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
150 {
151 BCM2835PeripheralState *s = BCM2835_PERIPHERALS(dev);
152 Object *obj;
153 MemoryRegion *ram;
154 Error *err = NULL;
155 uint64_t ram_size, vcram_size;
156 int n;
157
158 obj = object_property_get_link(OBJECT(dev), "ram", &error_abort);
159
160 ram = MEMORY_REGION(obj);
161 ram_size = memory_region_size(ram);
162
163 /* Map peripherals and RAM into the GPU address space. */
164 memory_region_init_alias(&s->peri_mr_alias, OBJECT(s),
165 "bcm2835-peripherals", &s->peri_mr, 0,
166 memory_region_size(&s->peri_mr));
167
168 memory_region_add_subregion_overlap(&s->gpu_bus_mr, BCM2835_VC_PERI_BASE,
169 &s->peri_mr_alias, 1);
170
171 /* RAM is aliased four times (different cache configurations) on the GPU */
172 for (n = 0; n < 4; n++) {
173 memory_region_init_alias(&s->ram_alias[n], OBJECT(s),
174 "bcm2835-gpu-ram-alias[*]", ram, 0, ram_size);
175 memory_region_add_subregion_overlap(&s->gpu_bus_mr, (hwaddr)n << 30,
176 &s->ram_alias[n], 0);
177 }
178
179 /* Interrupt Controller */
180 if (!sysbus_realize(SYS_BUS_DEVICE(&s->ic), errp)) {
181 return;
182 }
183
184 /* CPRMAN clock manager */
185 if (!sysbus_realize(SYS_BUS_DEVICE(&s->cprman), errp)) {
186 return;
187 }
188 memory_region_add_subregion(&s->peri_mr, CPRMAN_OFFSET,
189 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->cprman), 0));
190 qdev_connect_clock_in(DEVICE(&s->uart0), "clk",
191 qdev_get_clock_out(DEVICE(&s->cprman), "uart-out"));
192
193 memory_region_add_subregion(&s->peri_mr, ARMCTRL_IC_OFFSET,
194 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->ic), 0));
195 sysbus_pass_irq(SYS_BUS_DEVICE(s), SYS_BUS_DEVICE(&s->ic));
196
197 /* Sys Timer */
198 if (!sysbus_realize(SYS_BUS_DEVICE(&s->systmr), errp)) {
199 return;
200 }
201 memory_region_add_subregion(&s->peri_mr, ST_OFFSET,
202 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->systmr), 0));
203 sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 0,
204 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
205 INTERRUPT_TIMER0));
206 sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 1,
207 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
208 INTERRUPT_TIMER1));
209 sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 2,
210 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
211 INTERRUPT_TIMER2));
212 sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 3,
213 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
214 INTERRUPT_TIMER3));
215
216 /* UART0 */
217 qdev_prop_set_chr(DEVICE(&s->uart0), "chardev", serial_hd(0));
218 if (!sysbus_realize(SYS_BUS_DEVICE(&s->uart0), errp)) {
219 return;
220 }
221
222 memory_region_add_subregion(&s->peri_mr, UART0_OFFSET,
223 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->uart0), 0));
224 sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart0), 0,
225 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
226 INTERRUPT_UART0));
227
228 /* AUX / UART1 */
229 qdev_prop_set_chr(DEVICE(&s->aux), "chardev", serial_hd(1));
230
231 if (!sysbus_realize(SYS_BUS_DEVICE(&s->aux), errp)) {
232 return;
233 }
234
235 memory_region_add_subregion(&s->peri_mr, AUX_OFFSET,
236 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->aux), 0));
237 sysbus_connect_irq(SYS_BUS_DEVICE(&s->aux), 0,
238 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
239 INTERRUPT_AUX));
240
241 /* Mailboxes */
242 if (!sysbus_realize(SYS_BUS_DEVICE(&s->mboxes), errp)) {
243 return;
244 }
245
246 memory_region_add_subregion(&s->peri_mr, ARMCTRL_0_SBM_OFFSET,
247 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->mboxes), 0));
248 sysbus_connect_irq(SYS_BUS_DEVICE(&s->mboxes), 0,
249 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_ARM_IRQ,
250 INTERRUPT_ARM_MAILBOX));
251
252 /* Framebuffer */
253 vcram_size = object_property_get_uint(OBJECT(s), "vcram-size", &err);
254 if (err) {
255 error_propagate(errp, err);
256 return;
257 }
258
259 if (!object_property_set_uint(OBJECT(&s->fb), "vcram-base",
260 ram_size - vcram_size, errp)) {
261 return;
262 }
263
264 if (!sysbus_realize(SYS_BUS_DEVICE(&s->fb), errp)) {
265 return;
266 }
267
268 memory_region_add_subregion(&s->mbox_mr, MBOX_CHAN_FB << MBOX_AS_CHAN_SHIFT,
269 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->fb), 0));
270 sysbus_connect_irq(SYS_BUS_DEVICE(&s->fb), 0,
271 qdev_get_gpio_in(DEVICE(&s->mboxes), MBOX_CHAN_FB));
272
273 /* Property channel */
274 if (!sysbus_realize(SYS_BUS_DEVICE(&s->property), errp)) {
275 return;
276 }
277
278 memory_region_add_subregion(&s->mbox_mr,
279 MBOX_CHAN_PROPERTY << MBOX_AS_CHAN_SHIFT,
280 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->property), 0));
281 sysbus_connect_irq(SYS_BUS_DEVICE(&s->property), 0,
282 qdev_get_gpio_in(DEVICE(&s->mboxes), MBOX_CHAN_PROPERTY));
283
284 /* Random Number Generator */
285 if (!sysbus_realize(SYS_BUS_DEVICE(&s->rng), errp)) {
286 return;
287 }
288
289 memory_region_add_subregion(&s->peri_mr, RNG_OFFSET,
290 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->rng), 0));
291
292 /* Extended Mass Media Controller
293 *
294 * Compatible with:
295 * - SD Host Controller Specification Version 3.0 Draft 1.0
296 * - SDIO Specification Version 3.0
297 * - MMC Specification Version 4.4
298 *
299 * For the exact details please refer to the Arasan documentation:
300 * SD3.0_Host_AHB_eMMC4.4_Usersguide_ver5.9_jan11_10.pdf
301 */
302 object_property_set_uint(OBJECT(&s->sdhci), "sd-spec-version", 3,
303 &error_abort);
304 object_property_set_uint(OBJECT(&s->sdhci), "capareg",
305 BCM2835_SDHC_CAPAREG, &error_abort);
306 object_property_set_bool(OBJECT(&s->sdhci), "pending-insert-quirk", true,
307 &error_abort);
308 if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdhci), errp)) {
309 return;
310 }
311
312 memory_region_add_subregion(&s->peri_mr, EMMC1_OFFSET,
313 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->sdhci), 0));
314 sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhci), 0,
315 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
316 INTERRUPT_ARASANSDIO));
317
318 /* SDHOST */
319 if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdhost), errp)) {
320 return;
321 }
322
323 memory_region_add_subregion(&s->peri_mr, MMCI0_OFFSET,
324 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->sdhost), 0));
325 sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhost), 0,
326 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
327 INTERRUPT_SDIO));
328
329 /* DMA Channels */
330 if (!sysbus_realize(SYS_BUS_DEVICE(&s->dma), errp)) {
331 return;
332 }
333
334 memory_region_add_subregion(&s->peri_mr, DMA_OFFSET,
335 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dma), 0));
336 memory_region_add_subregion(&s->peri_mr, DMA15_OFFSET,
337 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dma), 1));
338
339 for (n = 0; n <= SEPARATE_DMA_IRQ_MAX; n++) {
340 sysbus_connect_irq(SYS_BUS_DEVICE(&s->dma), n,
341 qdev_get_gpio_in_named(DEVICE(&s->ic),
342 BCM2835_IC_GPU_IRQ,
343 INTERRUPT_DMA0 + n));
344 }
345 if (!qdev_realize(DEVICE(&s->orgated_dma_irq), NULL, errp)) {
346 return;
347 }
348 for (n = 0; n < ORGATED_DMA_IRQ_COUNT; n++) {
349 sysbus_connect_irq(SYS_BUS_DEVICE(&s->dma),
350 SEPARATE_DMA_IRQ_MAX + 1 + n,
351 qdev_get_gpio_in(DEVICE(&s->orgated_dma_irq), n));
352 }
353 qdev_connect_gpio_out(DEVICE(&s->orgated_dma_irq), 0,
354 qdev_get_gpio_in_named(DEVICE(&s->ic),
355 BCM2835_IC_GPU_IRQ,
356 INTERRUPT_DMA0 + SEPARATE_DMA_IRQ_MAX + 1));
357
358 /* THERMAL */
359 if (!sysbus_realize(SYS_BUS_DEVICE(&s->thermal), errp)) {
360 return;
361 }
362 memory_region_add_subregion(&s->peri_mr, THERMAL_OFFSET,
363 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->thermal), 0));
364
365 /* GPIO */
366 if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio), errp)) {
367 return;
368 }
369
370 memory_region_add_subregion(&s->peri_mr, GPIO_OFFSET,
371 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->gpio), 0));
372
373 object_property_add_alias(OBJECT(s), "sd-bus", OBJECT(&s->gpio), "sd-bus");
374
375 /* Mphi */
376 if (!sysbus_realize(SYS_BUS_DEVICE(&s->mphi), errp)) {
377 return;
378 }
379
380 memory_region_add_subregion(&s->peri_mr, MPHI_OFFSET,
381 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->mphi), 0));
382 sysbus_connect_irq(SYS_BUS_DEVICE(&s->mphi), 0,
383 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
384 INTERRUPT_HOSTPORT));
385
386 /* DWC2 */
387 if (!sysbus_realize(SYS_BUS_DEVICE(&s->dwc2), errp)) {
388 return;
389 }
390
391 memory_region_add_subregion(&s->peri_mr, USB_OTG_OFFSET,
392 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dwc2), 0));
393 sysbus_connect_irq(SYS_BUS_DEVICE(&s->dwc2), 0,
394 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
395 INTERRUPT_USB));
396
397 /* Power Management */
398 if (!sysbus_realize(SYS_BUS_DEVICE(&s->powermgt), errp)) {
399 return;
400 }
401
402 memory_region_add_subregion(&s->peri_mr, PM_OFFSET,
403 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->powermgt), 0));
404
405 create_unimp(s, &s->txp, "bcm2835-txp", TXP_OFFSET, 0x1000);
406 create_unimp(s, &s->armtmr, "bcm2835-sp804", ARMCTRL_TIMER0_1_OFFSET, 0x40);
407 create_unimp(s, &s->i2s, "bcm2835-i2s", I2S_OFFSET, 0x100);
408 create_unimp(s, &s->smi, "bcm2835-smi", SMI_OFFSET, 0x100);
409 create_unimp(s, &s->spi[0], "bcm2835-spi0", SPI0_OFFSET, 0x20);
410 create_unimp(s, &s->bscsl, "bcm2835-spis", BSC_SL_OFFSET, 0x100);
411 create_unimp(s, &s->i2c[0], "bcm2835-i2c0", BSC0_OFFSET, 0x20);
412 create_unimp(s, &s->i2c[1], "bcm2835-i2c1", BSC1_OFFSET, 0x20);
413 create_unimp(s, &s->i2c[2], "bcm2835-i2c2", BSC2_OFFSET, 0x20);
414 create_unimp(s, &s->otp, "bcm2835-otp", OTP_OFFSET, 0x80);
415 create_unimp(s, &s->dbus, "bcm2835-dbus", DBUS_OFFSET, 0x8000);
416 create_unimp(s, &s->ave0, "bcm2835-ave0", AVE0_OFFSET, 0x8000);
417 create_unimp(s, &s->v3d, "bcm2835-v3d", V3D_OFFSET, 0x1000);
418 create_unimp(s, &s->sdramc, "bcm2835-sdramc", SDRAMC_OFFSET, 0x100);
419 }
420
bcm2835_peripherals_class_init(ObjectClass * oc,void * data)421 static void bcm2835_peripherals_class_init(ObjectClass *oc, void *data)
422 {
423 DeviceClass *dc = DEVICE_CLASS(oc);
424
425 dc->realize = bcm2835_peripherals_realize;
426 }
427
428 static const TypeInfo bcm2835_peripherals_type_info = {
429 .name = TYPE_BCM2835_PERIPHERALS,
430 .parent = TYPE_SYS_BUS_DEVICE,
431 .instance_size = sizeof(BCM2835PeripheralState),
432 .instance_init = bcm2835_peripherals_init,
433 .class_init = bcm2835_peripherals_class_init,
434 };
435
bcm2835_peripherals_register_types(void)436 static void bcm2835_peripherals_register_types(void)
437 {
438 type_register_static(&bcm2835_peripherals_type_info);
439 }
440
441 type_init(bcm2835_peripherals_register_types)
442