1 /* 2 * S/390 helpers - system only 3 * 4 * Copyright (c) 2009 Ulrich Hecht 5 * Copyright (c) 2011 Alexander Graf 6 * 7 * This library is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU Lesser General Public 9 * License as published by the Free Software Foundation; either 10 * version 2.1 of the License, or (at your option) any later version. 11 * 12 * This library is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 15 * Lesser General Public License for more details. 16 * 17 * You should have received a copy of the GNU Lesser General Public 18 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 19 */ 20 21 #include "qemu/osdep.h" 22 #include "cpu.h" 23 #include "s390x-internal.h" 24 #include "gdbstub/helpers.h" 25 #include "qemu/timer.h" 26 #include "hw/s390x/ioinst.h" 27 #include "system/hw_accel.h" 28 #include "system/memory.h" 29 #include "system/runstate.h" 30 #include "exec/target_page.h" 31 #include "exec/watchpoint.h" 32 33 void s390x_tod_timer(void *opaque) 34 { 35 cpu_inject_clock_comparator((S390CPU *) opaque); 36 } 37 38 void s390x_cpu_timer(void *opaque) 39 { 40 cpu_inject_cpu_timer((S390CPU *) opaque); 41 } 42 43 hwaddr s390_cpu_get_phys_page_debug(CPUState *cs, vaddr vaddr) 44 { 45 S390CPU *cpu = S390_CPU(cs); 46 CPUS390XState *env = &cpu->env; 47 target_ulong raddr; 48 int prot; 49 uint64_t asc = env->psw.mask & PSW_MASK_ASC; 50 uint64_t tec; 51 52 /* 31-Bit mode */ 53 if (!(env->psw.mask & PSW_MASK_64)) { 54 vaddr &= 0x7fffffff; 55 } 56 57 /* We want to read the code (e.g., see what we are single-stepping).*/ 58 if (asc != PSW_ASC_HOME) { 59 asc = PSW_ASC_PRIMARY; 60 } 61 62 /* 63 * We want to read code even if IEP is active. Use MMU_DATA_LOAD instead 64 * of MMU_INST_FETCH. 65 */ 66 if (mmu_translate(env, vaddr, MMU_DATA_LOAD, asc, &raddr, &prot, &tec)) { 67 return -1; 68 } 69 return raddr; 70 } 71 72 hwaddr s390_cpu_get_phys_addr_debug(CPUState *cs, vaddr vaddr) 73 { 74 hwaddr phys_addr; 75 target_ulong page; 76 77 page = vaddr & TARGET_PAGE_MASK; 78 phys_addr = cpu_get_phys_page_debug(cs, page); 79 phys_addr += (vaddr & ~TARGET_PAGE_MASK); 80 81 return phys_addr; 82 } 83 84 static inline bool is_special_wait_psw(uint64_t psw_addr) 85 { 86 /* signal quiesce */ 87 return (psw_addr & 0xfffUL) == 0xfffUL; 88 } 89 90 void s390_handle_wait(S390CPU *cpu) 91 { 92 CPUState *cs = CPU(cpu); 93 94 s390_cpu_halt(cpu); 95 96 if (s390_count_running_cpus() == 0) { 97 if (is_special_wait_psw(cpu->env.psw.addr)) { 98 qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); 99 } else { 100 cpu->env.crash_reason = S390_CRASH_REASON_DISABLED_WAIT; 101 qemu_system_guest_panicked(cpu_get_crash_info(cs)); 102 } 103 } 104 } 105 106 LowCore *cpu_map_lowcore(CPUS390XState *env) 107 { 108 LowCore *lowcore; 109 hwaddr len = sizeof(LowCore); 110 CPUState *cs = env_cpu(env); 111 const MemTxAttrs attrs = MEMTXATTRS_UNSPECIFIED; 112 113 lowcore = address_space_map(cs->as, env->psa, &len, true, attrs); 114 115 if (len < sizeof(LowCore)) { 116 cpu_abort(cs, "Could not map lowcore\n"); 117 } 118 119 return lowcore; 120 } 121 122 void cpu_unmap_lowcore(CPUS390XState *env, LowCore *lowcore) 123 { 124 AddressSpace *as = env_cpu(env)->as; 125 126 address_space_unmap(as, lowcore, sizeof(LowCore), true, sizeof(LowCore)); 127 } 128 129 void do_restart_interrupt(CPUS390XState *env) 130 { 131 uint64_t mask, addr; 132 LowCore *lowcore; 133 134 lowcore = cpu_map_lowcore(env); 135 136 lowcore->restart_old_psw.mask = cpu_to_be64(s390_cpu_get_psw_mask(env)); 137 lowcore->restart_old_psw.addr = cpu_to_be64(env->psw.addr); 138 mask = be64_to_cpu(lowcore->restart_new_psw.mask); 139 addr = be64_to_cpu(lowcore->restart_new_psw.addr); 140 141 cpu_unmap_lowcore(env, lowcore); 142 env->pending_int &= ~INTERRUPT_RESTART; 143 144 s390_cpu_set_psw(env, mask, addr); 145 } 146 147 void s390_cpu_recompute_watchpoints(CPUState *cs) 148 { 149 const int wp_flags = BP_CPU | BP_MEM_WRITE | BP_STOP_BEFORE_ACCESS; 150 CPUS390XState *env = cpu_env(cs); 151 152 /* We are called when the watchpoints have changed. First 153 remove them all. */ 154 cpu_watchpoint_remove_all(cs, BP_CPU); 155 156 /* Return if PER is not enabled */ 157 if (!(env->psw.mask & PSW_MASK_PER)) { 158 return; 159 } 160 161 /* Return if storage-alteration event is not enabled. */ 162 if (!(env->cregs[9] & PER_CR9_EVENT_STORE)) { 163 return; 164 } 165 166 if (env->cregs[10] == 0 && env->cregs[11] == -1LL) { 167 /* We can't create a watchoint spanning the whole memory range, so 168 split it in two parts. */ 169 cpu_watchpoint_insert(cs, 0, 1ULL << 63, wp_flags, NULL); 170 cpu_watchpoint_insert(cs, 1ULL << 63, 1ULL << 63, wp_flags, NULL); 171 } else if (env->cregs[10] > env->cregs[11]) { 172 /* The address range loops, create two watchpoints. */ 173 cpu_watchpoint_insert(cs, env->cregs[10], -env->cregs[10], 174 wp_flags, NULL); 175 cpu_watchpoint_insert(cs, 0, env->cregs[11] + 1, wp_flags, NULL); 176 177 } else { 178 /* Default case, create a single watchpoint. */ 179 cpu_watchpoint_insert(cs, env->cregs[10], 180 env->cregs[11] - env->cregs[10] + 1, 181 wp_flags, NULL); 182 } 183 } 184