xref: /openbmc/linux/drivers/i2c/busses/i2c-imx-lpi2c.c (revision ecc23d0a422a3118fcf6e4f0a46e17a6c2047b02)
1  // SPDX-License-Identifier: GPL-2.0+
2  /*
3   * This is i.MX low power i2c controller driver.
4   *
5   * Copyright 2016 Freescale Semiconductor, Inc.
6   */
7  
8  #include <linux/clk.h>
9  #include <linux/completion.h>
10  #include <linux/delay.h>
11  #include <linux/err.h>
12  #include <linux/errno.h>
13  #include <linux/i2c.h>
14  #include <linux/init.h>
15  #include <linux/interrupt.h>
16  #include <linux/io.h>
17  #include <linux/kernel.h>
18  #include <linux/module.h>
19  #include <linux/of.h>
20  #include <linux/pinctrl/consumer.h>
21  #include <linux/platform_device.h>
22  #include <linux/pm_runtime.h>
23  #include <linux/sched.h>
24  #include <linux/slab.h>
25  
26  #define DRIVER_NAME "imx-lpi2c"
27  
28  #define LPI2C_PARAM	0x04	/* i2c RX/TX FIFO size */
29  #define LPI2C_MCR	0x10	/* i2c contrl register */
30  #define LPI2C_MSR	0x14	/* i2c status register */
31  #define LPI2C_MIER	0x18	/* i2c interrupt enable */
32  #define LPI2C_MCFGR0	0x20	/* i2c master configuration */
33  #define LPI2C_MCFGR1	0x24	/* i2c master configuration */
34  #define LPI2C_MCFGR2	0x28	/* i2c master configuration */
35  #define LPI2C_MCFGR3	0x2C	/* i2c master configuration */
36  #define LPI2C_MCCR0	0x48	/* i2c master clk configuration */
37  #define LPI2C_MCCR1	0x50	/* i2c master clk configuration */
38  #define LPI2C_MFCR	0x58	/* i2c master FIFO control */
39  #define LPI2C_MFSR	0x5C	/* i2c master FIFO status */
40  #define LPI2C_MTDR	0x60	/* i2c master TX data register */
41  #define LPI2C_MRDR	0x70	/* i2c master RX data register */
42  
43  /* i2c command */
44  #define TRAN_DATA	0X00
45  #define RECV_DATA	0X01
46  #define GEN_STOP	0X02
47  #define RECV_DISCARD	0X03
48  #define GEN_START	0X04
49  #define START_NACK	0X05
50  #define START_HIGH	0X06
51  #define START_HIGH_NACK	0X07
52  
53  #define MCR_MEN		BIT(0)
54  #define MCR_RST		BIT(1)
55  #define MCR_DOZEN	BIT(2)
56  #define MCR_DBGEN	BIT(3)
57  #define MCR_RTF		BIT(8)
58  #define MCR_RRF		BIT(9)
59  #define MSR_TDF		BIT(0)
60  #define MSR_RDF		BIT(1)
61  #define MSR_SDF		BIT(9)
62  #define MSR_NDF		BIT(10)
63  #define MSR_ALF		BIT(11)
64  #define MSR_MBF		BIT(24)
65  #define MSR_BBF		BIT(25)
66  #define MIER_TDIE	BIT(0)
67  #define MIER_RDIE	BIT(1)
68  #define MIER_SDIE	BIT(9)
69  #define MIER_NDIE	BIT(10)
70  #define MCFGR1_AUTOSTOP	BIT(8)
71  #define MCFGR1_IGNACK	BIT(9)
72  #define MRDR_RXEMPTY	BIT(14)
73  
74  #define I2C_CLK_RATIO	2
75  #define CHUNK_DATA	256
76  
77  #define I2C_PM_TIMEOUT		10 /* ms */
78  
79  enum lpi2c_imx_mode {
80  	STANDARD,	/* 100+Kbps */
81  	FAST,		/* 400+Kbps */
82  	FAST_PLUS,	/* 1.0+Mbps */
83  	HS,		/* 3.4+Mbps */
84  	ULTRA_FAST,	/* 5.0+Mbps */
85  };
86  
87  enum lpi2c_imx_pincfg {
88  	TWO_PIN_OD,
89  	TWO_PIN_OO,
90  	TWO_PIN_PP,
91  	FOUR_PIN_PP,
92  };
93  
94  struct lpi2c_imx_struct {
95  	struct i2c_adapter	adapter;
96  	int			num_clks;
97  	struct clk_bulk_data	*clks;
98  	void __iomem		*base;
99  	__u8			*rx_buf;
100  	__u8			*tx_buf;
101  	struct completion	complete;
102  	unsigned long		rate_per;
103  	unsigned int		msglen;
104  	unsigned int		delivered;
105  	unsigned int		block_data;
106  	unsigned int		bitrate;
107  	unsigned int		txfifosize;
108  	unsigned int		rxfifosize;
109  	enum lpi2c_imx_mode	mode;
110  };
111  
lpi2c_imx_intctrl(struct lpi2c_imx_struct * lpi2c_imx,unsigned int enable)112  static void lpi2c_imx_intctrl(struct lpi2c_imx_struct *lpi2c_imx,
113  			      unsigned int enable)
114  {
115  	writel(enable, lpi2c_imx->base + LPI2C_MIER);
116  }
117  
lpi2c_imx_bus_busy(struct lpi2c_imx_struct * lpi2c_imx)118  static int lpi2c_imx_bus_busy(struct lpi2c_imx_struct *lpi2c_imx)
119  {
120  	unsigned long orig_jiffies = jiffies;
121  	unsigned int temp;
122  
123  	while (1) {
124  		temp = readl(lpi2c_imx->base + LPI2C_MSR);
125  
126  		/* check for arbitration lost, clear if set */
127  		if (temp & MSR_ALF) {
128  			writel(temp, lpi2c_imx->base + LPI2C_MSR);
129  			return -EAGAIN;
130  		}
131  
132  		if (temp & (MSR_BBF | MSR_MBF))
133  			break;
134  
135  		if (time_after(jiffies, orig_jiffies + msecs_to_jiffies(500))) {
136  			dev_dbg(&lpi2c_imx->adapter.dev, "bus not work\n");
137  			return -ETIMEDOUT;
138  		}
139  		schedule();
140  	}
141  
142  	return 0;
143  }
144  
lpi2c_imx_set_mode(struct lpi2c_imx_struct * lpi2c_imx)145  static void lpi2c_imx_set_mode(struct lpi2c_imx_struct *lpi2c_imx)
146  {
147  	unsigned int bitrate = lpi2c_imx->bitrate;
148  	enum lpi2c_imx_mode mode;
149  
150  	if (bitrate < I2C_MAX_FAST_MODE_FREQ)
151  		mode = STANDARD;
152  	else if (bitrate < I2C_MAX_FAST_MODE_PLUS_FREQ)
153  		mode = FAST;
154  	else if (bitrate < I2C_MAX_HIGH_SPEED_MODE_FREQ)
155  		mode = FAST_PLUS;
156  	else if (bitrate < I2C_MAX_ULTRA_FAST_MODE_FREQ)
157  		mode = HS;
158  	else
159  		mode = ULTRA_FAST;
160  
161  	lpi2c_imx->mode = mode;
162  }
163  
lpi2c_imx_start(struct lpi2c_imx_struct * lpi2c_imx,struct i2c_msg * msgs)164  static int lpi2c_imx_start(struct lpi2c_imx_struct *lpi2c_imx,
165  			   struct i2c_msg *msgs)
166  {
167  	unsigned int temp;
168  
169  	temp = readl(lpi2c_imx->base + LPI2C_MCR);
170  	temp |= MCR_RRF | MCR_RTF;
171  	writel(temp, lpi2c_imx->base + LPI2C_MCR);
172  	writel(0x7f00, lpi2c_imx->base + LPI2C_MSR);
173  
174  	temp = i2c_8bit_addr_from_msg(msgs) | (GEN_START << 8);
175  	writel(temp, lpi2c_imx->base + LPI2C_MTDR);
176  
177  	return lpi2c_imx_bus_busy(lpi2c_imx);
178  }
179  
lpi2c_imx_stop(struct lpi2c_imx_struct * lpi2c_imx)180  static void lpi2c_imx_stop(struct lpi2c_imx_struct *lpi2c_imx)
181  {
182  	unsigned long orig_jiffies = jiffies;
183  	unsigned int temp;
184  
185  	writel(GEN_STOP << 8, lpi2c_imx->base + LPI2C_MTDR);
186  
187  	do {
188  		temp = readl(lpi2c_imx->base + LPI2C_MSR);
189  		if (temp & MSR_SDF)
190  			break;
191  
192  		if (time_after(jiffies, orig_jiffies + msecs_to_jiffies(500))) {
193  			dev_dbg(&lpi2c_imx->adapter.dev, "stop timeout\n");
194  			break;
195  		}
196  		schedule();
197  
198  	} while (1);
199  }
200  
201  /* CLKLO = I2C_CLK_RATIO * CLKHI, SETHOLD = CLKHI, DATAVD = CLKHI/2 */
lpi2c_imx_config(struct lpi2c_imx_struct * lpi2c_imx)202  static int lpi2c_imx_config(struct lpi2c_imx_struct *lpi2c_imx)
203  {
204  	u8 prescale, filt, sethold, datavd;
205  	unsigned int clk_rate, clk_cycle, clkhi, clklo;
206  	enum lpi2c_imx_pincfg pincfg;
207  	unsigned int temp;
208  
209  	lpi2c_imx_set_mode(lpi2c_imx);
210  
211  	clk_rate = lpi2c_imx->rate_per;
212  
213  	if (lpi2c_imx->mode == HS || lpi2c_imx->mode == ULTRA_FAST)
214  		filt = 0;
215  	else
216  		filt = 2;
217  
218  	for (prescale = 0; prescale <= 7; prescale++) {
219  		clk_cycle = clk_rate / ((1 << prescale) * lpi2c_imx->bitrate)
220  			    - 3 - (filt >> 1);
221  		clkhi = DIV_ROUND_UP(clk_cycle, I2C_CLK_RATIO + 1);
222  		clklo = clk_cycle - clkhi;
223  		if (clklo < 64)
224  			break;
225  	}
226  
227  	if (prescale > 7)
228  		return -EINVAL;
229  
230  	/* set MCFGR1: PINCFG, PRESCALE, IGNACK */
231  	if (lpi2c_imx->mode == ULTRA_FAST)
232  		pincfg = TWO_PIN_OO;
233  	else
234  		pincfg = TWO_PIN_OD;
235  	temp = prescale | pincfg << 24;
236  
237  	if (lpi2c_imx->mode == ULTRA_FAST)
238  		temp |= MCFGR1_IGNACK;
239  
240  	writel(temp, lpi2c_imx->base + LPI2C_MCFGR1);
241  
242  	/* set MCFGR2: FILTSDA, FILTSCL */
243  	temp = (filt << 16) | (filt << 24);
244  	writel(temp, lpi2c_imx->base + LPI2C_MCFGR2);
245  
246  	/* set MCCR: DATAVD, SETHOLD, CLKHI, CLKLO */
247  	sethold = clkhi;
248  	datavd = clkhi >> 1;
249  	temp = datavd << 24 | sethold << 16 | clkhi << 8 | clklo;
250  
251  	if (lpi2c_imx->mode == HS)
252  		writel(temp, lpi2c_imx->base + LPI2C_MCCR1);
253  	else
254  		writel(temp, lpi2c_imx->base + LPI2C_MCCR0);
255  
256  	return 0;
257  }
258  
lpi2c_imx_master_enable(struct lpi2c_imx_struct * lpi2c_imx)259  static int lpi2c_imx_master_enable(struct lpi2c_imx_struct *lpi2c_imx)
260  {
261  	unsigned int temp;
262  	int ret;
263  
264  	ret = pm_runtime_resume_and_get(lpi2c_imx->adapter.dev.parent);
265  	if (ret < 0)
266  		return ret;
267  
268  	temp = MCR_RST;
269  	writel(temp, lpi2c_imx->base + LPI2C_MCR);
270  	writel(0, lpi2c_imx->base + LPI2C_MCR);
271  
272  	ret = lpi2c_imx_config(lpi2c_imx);
273  	if (ret)
274  		goto rpm_put;
275  
276  	temp = readl(lpi2c_imx->base + LPI2C_MCR);
277  	temp |= MCR_MEN;
278  	writel(temp, lpi2c_imx->base + LPI2C_MCR);
279  
280  	return 0;
281  
282  rpm_put:
283  	pm_runtime_mark_last_busy(lpi2c_imx->adapter.dev.parent);
284  	pm_runtime_put_autosuspend(lpi2c_imx->adapter.dev.parent);
285  
286  	return ret;
287  }
288  
lpi2c_imx_master_disable(struct lpi2c_imx_struct * lpi2c_imx)289  static int lpi2c_imx_master_disable(struct lpi2c_imx_struct *lpi2c_imx)
290  {
291  	u32 temp;
292  
293  	temp = readl(lpi2c_imx->base + LPI2C_MCR);
294  	temp &= ~MCR_MEN;
295  	writel(temp, lpi2c_imx->base + LPI2C_MCR);
296  
297  	pm_runtime_mark_last_busy(lpi2c_imx->adapter.dev.parent);
298  	pm_runtime_put_autosuspend(lpi2c_imx->adapter.dev.parent);
299  
300  	return 0;
301  }
302  
lpi2c_imx_msg_complete(struct lpi2c_imx_struct * lpi2c_imx)303  static int lpi2c_imx_msg_complete(struct lpi2c_imx_struct *lpi2c_imx)
304  {
305  	unsigned long timeout;
306  
307  	timeout = wait_for_completion_timeout(&lpi2c_imx->complete, HZ);
308  
309  	return timeout ? 0 : -ETIMEDOUT;
310  }
311  
lpi2c_imx_txfifo_empty(struct lpi2c_imx_struct * lpi2c_imx)312  static int lpi2c_imx_txfifo_empty(struct lpi2c_imx_struct *lpi2c_imx)
313  {
314  	unsigned long orig_jiffies = jiffies;
315  	u32 txcnt;
316  
317  	do {
318  		txcnt = readl(lpi2c_imx->base + LPI2C_MFSR) & 0xff;
319  
320  		if (readl(lpi2c_imx->base + LPI2C_MSR) & MSR_NDF) {
321  			dev_dbg(&lpi2c_imx->adapter.dev, "NDF detected\n");
322  			return -EIO;
323  		}
324  
325  		if (time_after(jiffies, orig_jiffies + msecs_to_jiffies(500))) {
326  			dev_dbg(&lpi2c_imx->adapter.dev, "txfifo empty timeout\n");
327  			return -ETIMEDOUT;
328  		}
329  		schedule();
330  
331  	} while (txcnt);
332  
333  	return 0;
334  }
335  
lpi2c_imx_set_tx_watermark(struct lpi2c_imx_struct * lpi2c_imx)336  static void lpi2c_imx_set_tx_watermark(struct lpi2c_imx_struct *lpi2c_imx)
337  {
338  	writel(lpi2c_imx->txfifosize >> 1, lpi2c_imx->base + LPI2C_MFCR);
339  }
340  
lpi2c_imx_set_rx_watermark(struct lpi2c_imx_struct * lpi2c_imx)341  static void lpi2c_imx_set_rx_watermark(struct lpi2c_imx_struct *lpi2c_imx)
342  {
343  	unsigned int temp, remaining;
344  
345  	remaining = lpi2c_imx->msglen - lpi2c_imx->delivered;
346  
347  	if (remaining > (lpi2c_imx->rxfifosize >> 1))
348  		temp = lpi2c_imx->rxfifosize >> 1;
349  	else
350  		temp = 0;
351  
352  	writel(temp << 16, lpi2c_imx->base + LPI2C_MFCR);
353  }
354  
lpi2c_imx_write_txfifo(struct lpi2c_imx_struct * lpi2c_imx)355  static void lpi2c_imx_write_txfifo(struct lpi2c_imx_struct *lpi2c_imx)
356  {
357  	unsigned int data, txcnt;
358  
359  	txcnt = readl(lpi2c_imx->base + LPI2C_MFSR) & 0xff;
360  
361  	while (txcnt < lpi2c_imx->txfifosize) {
362  		if (lpi2c_imx->delivered == lpi2c_imx->msglen)
363  			break;
364  
365  		data = lpi2c_imx->tx_buf[lpi2c_imx->delivered++];
366  		writel(data, lpi2c_imx->base + LPI2C_MTDR);
367  		txcnt++;
368  	}
369  
370  	if (lpi2c_imx->delivered < lpi2c_imx->msglen)
371  		lpi2c_imx_intctrl(lpi2c_imx, MIER_TDIE | MIER_NDIE);
372  	else
373  		complete(&lpi2c_imx->complete);
374  }
375  
lpi2c_imx_read_rxfifo(struct lpi2c_imx_struct * lpi2c_imx)376  static void lpi2c_imx_read_rxfifo(struct lpi2c_imx_struct *lpi2c_imx)
377  {
378  	unsigned int blocklen, remaining;
379  	unsigned int temp, data;
380  
381  	do {
382  		data = readl(lpi2c_imx->base + LPI2C_MRDR);
383  		if (data & MRDR_RXEMPTY)
384  			break;
385  
386  		lpi2c_imx->rx_buf[lpi2c_imx->delivered++] = data & 0xff;
387  	} while (1);
388  
389  	/*
390  	 * First byte is the length of remaining packet in the SMBus block
391  	 * data read. Add it to msgs->len.
392  	 */
393  	if (lpi2c_imx->block_data) {
394  		blocklen = lpi2c_imx->rx_buf[0];
395  		lpi2c_imx->msglen += blocklen;
396  	}
397  
398  	remaining = lpi2c_imx->msglen - lpi2c_imx->delivered;
399  
400  	if (!remaining) {
401  		complete(&lpi2c_imx->complete);
402  		return;
403  	}
404  
405  	/* not finished, still waiting for rx data */
406  	lpi2c_imx_set_rx_watermark(lpi2c_imx);
407  
408  	/* multiple receive commands */
409  	if (lpi2c_imx->block_data) {
410  		lpi2c_imx->block_data = 0;
411  		temp = remaining;
412  		temp |= (RECV_DATA << 8);
413  		writel(temp, lpi2c_imx->base + LPI2C_MTDR);
414  	} else if (!(lpi2c_imx->delivered & 0xff)) {
415  		temp = (remaining > CHUNK_DATA ? CHUNK_DATA : remaining) - 1;
416  		temp |= (RECV_DATA << 8);
417  		writel(temp, lpi2c_imx->base + LPI2C_MTDR);
418  	}
419  
420  	lpi2c_imx_intctrl(lpi2c_imx, MIER_RDIE);
421  }
422  
lpi2c_imx_write(struct lpi2c_imx_struct * lpi2c_imx,struct i2c_msg * msgs)423  static void lpi2c_imx_write(struct lpi2c_imx_struct *lpi2c_imx,
424  			    struct i2c_msg *msgs)
425  {
426  	lpi2c_imx->tx_buf = msgs->buf;
427  	lpi2c_imx_set_tx_watermark(lpi2c_imx);
428  	lpi2c_imx_write_txfifo(lpi2c_imx);
429  }
430  
lpi2c_imx_read(struct lpi2c_imx_struct * lpi2c_imx,struct i2c_msg * msgs)431  static void lpi2c_imx_read(struct lpi2c_imx_struct *lpi2c_imx,
432  			   struct i2c_msg *msgs)
433  {
434  	unsigned int temp;
435  
436  	lpi2c_imx->rx_buf = msgs->buf;
437  	lpi2c_imx->block_data = msgs->flags & I2C_M_RECV_LEN;
438  
439  	lpi2c_imx_set_rx_watermark(lpi2c_imx);
440  	temp = msgs->len > CHUNK_DATA ? CHUNK_DATA - 1 : msgs->len - 1;
441  	temp |= (RECV_DATA << 8);
442  	writel(temp, lpi2c_imx->base + LPI2C_MTDR);
443  
444  	lpi2c_imx_intctrl(lpi2c_imx, MIER_RDIE | MIER_NDIE);
445  }
446  
lpi2c_imx_xfer(struct i2c_adapter * adapter,struct i2c_msg * msgs,int num)447  static int lpi2c_imx_xfer(struct i2c_adapter *adapter,
448  			  struct i2c_msg *msgs, int num)
449  {
450  	struct lpi2c_imx_struct *lpi2c_imx = i2c_get_adapdata(adapter);
451  	unsigned int temp;
452  	int i, result;
453  
454  	result = lpi2c_imx_master_enable(lpi2c_imx);
455  	if (result)
456  		return result;
457  
458  	for (i = 0; i < num; i++) {
459  		result = lpi2c_imx_start(lpi2c_imx, &msgs[i]);
460  		if (result)
461  			goto disable;
462  
463  		/* quick smbus */
464  		if (num == 1 && msgs[0].len == 0)
465  			goto stop;
466  
467  		lpi2c_imx->rx_buf = NULL;
468  		lpi2c_imx->tx_buf = NULL;
469  		lpi2c_imx->delivered = 0;
470  		lpi2c_imx->msglen = msgs[i].len;
471  		init_completion(&lpi2c_imx->complete);
472  
473  		if (msgs[i].flags & I2C_M_RD)
474  			lpi2c_imx_read(lpi2c_imx, &msgs[i]);
475  		else
476  			lpi2c_imx_write(lpi2c_imx, &msgs[i]);
477  
478  		result = lpi2c_imx_msg_complete(lpi2c_imx);
479  		if (result)
480  			goto stop;
481  
482  		if (!(msgs[i].flags & I2C_M_RD)) {
483  			result = lpi2c_imx_txfifo_empty(lpi2c_imx);
484  			if (result)
485  				goto stop;
486  		}
487  	}
488  
489  stop:
490  	lpi2c_imx_stop(lpi2c_imx);
491  
492  	temp = readl(lpi2c_imx->base + LPI2C_MSR);
493  	if ((temp & MSR_NDF) && !result)
494  		result = -EIO;
495  
496  disable:
497  	lpi2c_imx_master_disable(lpi2c_imx);
498  
499  	dev_dbg(&lpi2c_imx->adapter.dev, "<%s> exit with: %s: %d\n", __func__,
500  		(result < 0) ? "error" : "success msg",
501  		(result < 0) ? result : num);
502  
503  	return (result < 0) ? result : num;
504  }
505  
lpi2c_imx_isr(int irq,void * dev_id)506  static irqreturn_t lpi2c_imx_isr(int irq, void *dev_id)
507  {
508  	struct lpi2c_imx_struct *lpi2c_imx = dev_id;
509  	unsigned int enabled;
510  	unsigned int temp;
511  
512  	enabled = readl(lpi2c_imx->base + LPI2C_MIER);
513  
514  	lpi2c_imx_intctrl(lpi2c_imx, 0);
515  	temp = readl(lpi2c_imx->base + LPI2C_MSR);
516  	temp &= enabled;
517  
518  	if (temp & MSR_NDF)
519  		complete(&lpi2c_imx->complete);
520  	else if (temp & MSR_RDF)
521  		lpi2c_imx_read_rxfifo(lpi2c_imx);
522  	else if (temp & MSR_TDF)
523  		lpi2c_imx_write_txfifo(lpi2c_imx);
524  
525  	return IRQ_HANDLED;
526  }
527  
lpi2c_imx_func(struct i2c_adapter * adapter)528  static u32 lpi2c_imx_func(struct i2c_adapter *adapter)
529  {
530  	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL |
531  		I2C_FUNC_SMBUS_READ_BLOCK_DATA;
532  }
533  
534  static const struct i2c_algorithm lpi2c_imx_algo = {
535  	.master_xfer	= lpi2c_imx_xfer,
536  	.functionality	= lpi2c_imx_func,
537  };
538  
539  static const struct of_device_id lpi2c_imx_of_match[] = {
540  	{ .compatible = "fsl,imx7ulp-lpi2c" },
541  	{ },
542  };
543  MODULE_DEVICE_TABLE(of, lpi2c_imx_of_match);
544  
lpi2c_imx_probe(struct platform_device * pdev)545  static int lpi2c_imx_probe(struct platform_device *pdev)
546  {
547  	struct lpi2c_imx_struct *lpi2c_imx;
548  	unsigned int temp;
549  	int irq, ret;
550  
551  	lpi2c_imx = devm_kzalloc(&pdev->dev, sizeof(*lpi2c_imx), GFP_KERNEL);
552  	if (!lpi2c_imx)
553  		return -ENOMEM;
554  
555  	lpi2c_imx->base = devm_platform_ioremap_resource(pdev, 0);
556  	if (IS_ERR(lpi2c_imx->base))
557  		return PTR_ERR(lpi2c_imx->base);
558  
559  	irq = platform_get_irq(pdev, 0);
560  	if (irq < 0)
561  		return irq;
562  
563  	lpi2c_imx->adapter.owner	= THIS_MODULE;
564  	lpi2c_imx->adapter.algo		= &lpi2c_imx_algo;
565  	lpi2c_imx->adapter.dev.parent	= &pdev->dev;
566  	lpi2c_imx->adapter.dev.of_node	= pdev->dev.of_node;
567  	strscpy(lpi2c_imx->adapter.name, pdev->name,
568  		sizeof(lpi2c_imx->adapter.name));
569  
570  	ret = devm_clk_bulk_get_all(&pdev->dev, &lpi2c_imx->clks);
571  	if (ret < 0)
572  		return dev_err_probe(&pdev->dev, ret, "can't get I2C peripheral clock\n");
573  	lpi2c_imx->num_clks = ret;
574  
575  	ret = of_property_read_u32(pdev->dev.of_node,
576  				   "clock-frequency", &lpi2c_imx->bitrate);
577  	if (ret)
578  		lpi2c_imx->bitrate = I2C_MAX_STANDARD_MODE_FREQ;
579  
580  	ret = devm_request_irq(&pdev->dev, irq, lpi2c_imx_isr, 0,
581  			       pdev->name, lpi2c_imx);
582  	if (ret)
583  		return dev_err_probe(&pdev->dev, ret, "can't claim irq %d\n", irq);
584  
585  	i2c_set_adapdata(&lpi2c_imx->adapter, lpi2c_imx);
586  	platform_set_drvdata(pdev, lpi2c_imx);
587  
588  	ret = clk_bulk_prepare_enable(lpi2c_imx->num_clks, lpi2c_imx->clks);
589  	if (ret)
590  		return ret;
591  
592  	lpi2c_imx->rate_per = clk_get_rate(lpi2c_imx->clks[0].clk);
593  	if (!lpi2c_imx->rate_per)
594  		return dev_err_probe(&pdev->dev, -EINVAL,
595  				     "can't get I2C peripheral clock rate\n");
596  
597  	pm_runtime_set_autosuspend_delay(&pdev->dev, I2C_PM_TIMEOUT);
598  	pm_runtime_use_autosuspend(&pdev->dev);
599  	pm_runtime_get_noresume(&pdev->dev);
600  	pm_runtime_set_active(&pdev->dev);
601  	pm_runtime_enable(&pdev->dev);
602  
603  	temp = readl(lpi2c_imx->base + LPI2C_PARAM);
604  	lpi2c_imx->txfifosize = 1 << (temp & 0x0f);
605  	lpi2c_imx->rxfifosize = 1 << ((temp >> 8) & 0x0f);
606  
607  	ret = i2c_add_adapter(&lpi2c_imx->adapter);
608  	if (ret)
609  		goto rpm_disable;
610  
611  	pm_runtime_mark_last_busy(&pdev->dev);
612  	pm_runtime_put_autosuspend(&pdev->dev);
613  
614  	dev_info(&lpi2c_imx->adapter.dev, "LPI2C adapter registered\n");
615  
616  	return 0;
617  
618  rpm_disable:
619  	pm_runtime_put(&pdev->dev);
620  	pm_runtime_disable(&pdev->dev);
621  	pm_runtime_dont_use_autosuspend(&pdev->dev);
622  
623  	return ret;
624  }
625  
lpi2c_imx_remove(struct platform_device * pdev)626  static void lpi2c_imx_remove(struct platform_device *pdev)
627  {
628  	struct lpi2c_imx_struct *lpi2c_imx = platform_get_drvdata(pdev);
629  
630  	i2c_del_adapter(&lpi2c_imx->adapter);
631  
632  	pm_runtime_disable(&pdev->dev);
633  	pm_runtime_dont_use_autosuspend(&pdev->dev);
634  }
635  
lpi2c_runtime_suspend(struct device * dev)636  static int __maybe_unused lpi2c_runtime_suspend(struct device *dev)
637  {
638  	struct lpi2c_imx_struct *lpi2c_imx = dev_get_drvdata(dev);
639  
640  	clk_bulk_disable(lpi2c_imx->num_clks, lpi2c_imx->clks);
641  	pinctrl_pm_select_sleep_state(dev);
642  
643  	return 0;
644  }
645  
lpi2c_runtime_resume(struct device * dev)646  static int __maybe_unused lpi2c_runtime_resume(struct device *dev)
647  {
648  	struct lpi2c_imx_struct *lpi2c_imx = dev_get_drvdata(dev);
649  	int ret;
650  
651  	pinctrl_pm_select_default_state(dev);
652  	ret = clk_bulk_enable(lpi2c_imx->num_clks, lpi2c_imx->clks);
653  	if (ret) {
654  		dev_err(dev, "failed to enable I2C clock, ret=%d\n", ret);
655  		return ret;
656  	}
657  
658  	return 0;
659  }
660  
661  static const struct dev_pm_ops lpi2c_pm_ops = {
662  	SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
663  				      pm_runtime_force_resume)
664  	SET_RUNTIME_PM_OPS(lpi2c_runtime_suspend,
665  			   lpi2c_runtime_resume, NULL)
666  };
667  
668  static struct platform_driver lpi2c_imx_driver = {
669  	.probe = lpi2c_imx_probe,
670  	.remove_new = lpi2c_imx_remove,
671  	.driver = {
672  		.name = DRIVER_NAME,
673  		.of_match_table = lpi2c_imx_of_match,
674  		.pm = &lpi2c_pm_ops,
675  	},
676  };
677  
678  module_platform_driver(lpi2c_imx_driver);
679  
680  MODULE_AUTHOR("Gao Pan <pandy.gao@nxp.com>");
681  MODULE_DESCRIPTION("I2C adapter driver for LPI2C bus");
682  MODULE_LICENSE("GPL");
683