1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (c) 2020 MediaTek Inc.
4  * Copyright (c) 2020 BayLibre, SAS
5  * Author: James Liao <jamesjj.liao@mediatek.com>
6  *         Fabien Parent <fparent@baylibre.com>
7  */
8 
9 #include <linux/clk-provider.h>
10 #include <linux/mod_devicetable.h>
11 #include <linux/platform_device.h>
12 
13 #include "clk-mtk.h"
14 #include "clk-gate.h"
15 
16 #include <dt-bindings/clock/mt8167-clk.h>
17 
18 static const struct mtk_gate_regs mfg_cg_regs = {
19 	.set_ofs = 0x4,
20 	.clr_ofs = 0x8,
21 	.sta_ofs = 0x0,
22 };
23 
24 #define GATE_MFG(_id, _name, _parent, _shift)			\
25 	GATE_MTK(_id, _name, _parent, &mfg_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
26 
27 static const struct mtk_gate mfg_clks[] = {
28 	GATE_MFG(CLK_MFG_BAXI, "mfg_baxi", "ahb_infra_sel", 0),
29 	GATE_MFG(CLK_MFG_BMEM, "mfg_bmem", "gfmux_emi1x_sel", 1),
30 	GATE_MFG(CLK_MFG_BG3D, "mfg_bg3d", "mfg_mm", 2),
31 	GATE_MFG(CLK_MFG_B26M, "mfg_b26m", "clk26m_ck", 3),
32 };
33 
34 static const struct mtk_clk_desc mfg_desc = {
35 	.clks = mfg_clks,
36 	.num_clks = ARRAY_SIZE(mfg_clks),
37 };
38 
39 static const struct of_device_id of_match_clk_mt8167_mfgcfg[] = {
40 	{ .compatible = "mediatek,mt8167-mfgcfg", .data = &mfg_desc },
41 	{ /* sentinel */ }
42 };
43 MODULE_DEVICE_TABLE(of, of_match_clk_mt8167_mfgcfg);
44 
45 static struct platform_driver clk_mt8167_mfgcfg_drv = {
46 	.probe = mtk_clk_simple_probe,
47 	.remove_new = mtk_clk_simple_remove,
48 	.driver = {
49 		.name = "clk-mt8167-mfgcfg",
50 		.of_match_table = of_match_clk_mt8167_mfgcfg,
51 	},
52 };
53 module_platform_driver(clk_mt8167_mfgcfg_drv);
54 MODULE_LICENSE("GPL");
55