1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (C) 2014 Intel Corporation
4  *
5  * Adjustable fractional divider clock implementation.
6  * Uses rational best approximation algorithm.
7  *
8  * Output is calculated as
9  *
10  *	rate = (m / n) * parent_rate				(1)
11  *
12  * This is useful when we have a prescaler block which asks for
13  * m (numerator) and n (denominator) values to be provided to satisfy
14  * the (1) as much as possible.
15  *
16  * Since m and n have the limitation by a range, e.g.
17  *
18  *	n >= 1, n < N_width, where N_width = 2^nwidth		(2)
19  *
20  * for some cases the output may be saturated. Hence, from (1) and (2),
21  * assuming the worst case when m = 1, the inequality
22  *
23  *	floor(log2(parent_rate / rate)) <= nwidth		(3)
24  *
25  * may be derived. Thus, in cases when
26  *
27  *	(parent_rate / rate) >> N_width				(4)
28  *
29  * we might scale up the rate by 2^scale (see the description of
30  * CLK_FRAC_DIVIDER_POWER_OF_TWO_PS for additional information), where
31  *
32  *	scale = floor(log2(parent_rate / rate)) - nwidth	(5)
33  *
34  * and assume that the IP, that needs m and n, has also its own
35  * prescaler, which is capable to divide by 2^scale. In this way
36  * we get the denominator to satisfy the desired range (2) and
37  * at the same time a much better result of m and n than simple
38  * saturated values.
39  */
40 
41 #include <linux/debugfs.h>
42 #include <linux/device.h>
43 #include <linux/io.h>
44 #include <linux/math.h>
45 #include <linux/module.h>
46 #include <linux/rational.h>
47 #include <linux/slab.h>
48 
49 #include <linux/clk-provider.h>
50 
51 #include "clk-fractional-divider.h"
52 
clk_fd_readl(struct clk_fractional_divider * fd)53 static inline u32 clk_fd_readl(struct clk_fractional_divider *fd)
54 {
55 	if (fd->flags & CLK_FRAC_DIVIDER_BIG_ENDIAN)
56 		return ioread32be(fd->reg);
57 
58 	return readl(fd->reg);
59 }
60 
clk_fd_writel(struct clk_fractional_divider * fd,u32 val)61 static inline void clk_fd_writel(struct clk_fractional_divider *fd, u32 val)
62 {
63 	if (fd->flags & CLK_FRAC_DIVIDER_BIG_ENDIAN)
64 		iowrite32be(val, fd->reg);
65 	else
66 		writel(val, fd->reg);
67 }
68 
clk_fd_get_div(struct clk_hw * hw,struct u32_fract * fract)69 static void clk_fd_get_div(struct clk_hw *hw, struct u32_fract *fract)
70 {
71 	struct clk_fractional_divider *fd = to_clk_fd(hw);
72 	unsigned long flags = 0;
73 	unsigned long m, n;
74 	u32 mmask, nmask;
75 	u32 val;
76 
77 	if (fd->lock)
78 		spin_lock_irqsave(fd->lock, flags);
79 	else
80 		__acquire(fd->lock);
81 
82 	val = clk_fd_readl(fd);
83 
84 	if (fd->lock)
85 		spin_unlock_irqrestore(fd->lock, flags);
86 	else
87 		__release(fd->lock);
88 
89 	mmask = GENMASK(fd->mwidth - 1, 0) << fd->mshift;
90 	nmask = GENMASK(fd->nwidth - 1, 0) << fd->nshift;
91 
92 	m = (val & mmask) >> fd->mshift;
93 	n = (val & nmask) >> fd->nshift;
94 
95 	if (fd->flags & CLK_FRAC_DIVIDER_ZERO_BASED) {
96 		m++;
97 		n++;
98 	}
99 
100 	fract->numerator = m;
101 	fract->denominator = n;
102 }
103 
clk_fd_recalc_rate(struct clk_hw * hw,unsigned long parent_rate)104 static unsigned long clk_fd_recalc_rate(struct clk_hw *hw, unsigned long parent_rate)
105 {
106 	struct u32_fract fract;
107 	u64 ret;
108 
109 	clk_fd_get_div(hw, &fract);
110 
111 	if (!fract.numerator || !fract.denominator)
112 		return parent_rate;
113 
114 	ret = (u64)parent_rate * fract.numerator;
115 	do_div(ret, fract.denominator);
116 
117 	return ret;
118 }
119 
clk_fractional_divider_general_approximation(struct clk_hw * hw,unsigned long rate,unsigned long * parent_rate,unsigned long * m,unsigned long * n)120 void clk_fractional_divider_general_approximation(struct clk_hw *hw,
121 						  unsigned long rate,
122 						  unsigned long *parent_rate,
123 						  unsigned long *m, unsigned long *n)
124 {
125 	struct clk_fractional_divider *fd = to_clk_fd(hw);
126 
127 	/*
128 	 * Get rate closer to *parent_rate to guarantee there is no overflow
129 	 * for m and n. In the result it will be the nearest rate left shifted
130 	 * by (scale - fd->nwidth) bits.
131 	 *
132 	 * For the detailed explanation see the top comment in this file.
133 	 */
134 	if (fd->flags & CLK_FRAC_DIVIDER_POWER_OF_TWO_PS) {
135 		unsigned long scale = fls_long(*parent_rate / rate - 1);
136 
137 		if (scale > fd->nwidth)
138 			rate <<= scale - fd->nwidth;
139 	}
140 
141 	rational_best_approximation(rate, *parent_rate,
142 			GENMASK(fd->mwidth - 1, 0), GENMASK(fd->nwidth - 1, 0),
143 			m, n);
144 }
145 
clk_fd_round_rate(struct clk_hw * hw,unsigned long rate,unsigned long * parent_rate)146 static long clk_fd_round_rate(struct clk_hw *hw, unsigned long rate,
147 			      unsigned long *parent_rate)
148 {
149 	struct clk_fractional_divider *fd = to_clk_fd(hw);
150 	unsigned long m, n;
151 	u64 ret;
152 
153 	if (!rate || (!clk_hw_can_set_rate_parent(hw) && rate >= *parent_rate))
154 		return *parent_rate;
155 
156 	if (fd->approximation)
157 		fd->approximation(hw, rate, parent_rate, &m, &n);
158 	else
159 		clk_fractional_divider_general_approximation(hw, rate, parent_rate, &m, &n);
160 
161 	ret = (u64)*parent_rate * m;
162 	do_div(ret, n);
163 
164 	return ret;
165 }
166 
clk_fd_set_rate(struct clk_hw * hw,unsigned long rate,unsigned long parent_rate)167 static int clk_fd_set_rate(struct clk_hw *hw, unsigned long rate,
168 			   unsigned long parent_rate)
169 {
170 	struct clk_fractional_divider *fd = to_clk_fd(hw);
171 	unsigned long flags = 0;
172 	unsigned long m, n;
173 	u32 mmask, nmask;
174 	u32 val;
175 
176 	rational_best_approximation(rate, parent_rate,
177 			GENMASK(fd->mwidth - 1, 0), GENMASK(fd->nwidth - 1, 0),
178 			&m, &n);
179 
180 	if (fd->flags & CLK_FRAC_DIVIDER_ZERO_BASED) {
181 		m--;
182 		n--;
183 	}
184 
185 	if (fd->lock)
186 		spin_lock_irqsave(fd->lock, flags);
187 	else
188 		__acquire(fd->lock);
189 
190 	mmask = GENMASK(fd->mwidth - 1, 0) << fd->mshift;
191 	nmask = GENMASK(fd->nwidth - 1, 0) << fd->nshift;
192 
193 	val = clk_fd_readl(fd);
194 	val &= ~(mmask | nmask);
195 	val |= (m << fd->mshift) | (n << fd->nshift);
196 	clk_fd_writel(fd, val);
197 
198 	if (fd->lock)
199 		spin_unlock_irqrestore(fd->lock, flags);
200 	else
201 		__release(fd->lock);
202 
203 	return 0;
204 }
205 
206 #ifdef CONFIG_DEBUG_FS
clk_fd_numerator_get(void * hw,u64 * val)207 static int clk_fd_numerator_get(void *hw, u64 *val)
208 {
209 	struct u32_fract fract;
210 
211 	clk_fd_get_div(hw, &fract);
212 
213 	*val = fract.numerator;
214 
215 	return 0;
216 }
217 DEFINE_DEBUGFS_ATTRIBUTE(clk_fd_numerator_fops, clk_fd_numerator_get, NULL, "%llu\n");
218 
clk_fd_denominator_get(void * hw,u64 * val)219 static int clk_fd_denominator_get(void *hw, u64 *val)
220 {
221 	struct u32_fract fract;
222 
223 	clk_fd_get_div(hw, &fract);
224 
225 	*val = fract.denominator;
226 
227 	return 0;
228 }
229 DEFINE_DEBUGFS_ATTRIBUTE(clk_fd_denominator_fops, clk_fd_denominator_get, NULL, "%llu\n");
230 
clk_fd_debug_init(struct clk_hw * hw,struct dentry * dentry)231 static void clk_fd_debug_init(struct clk_hw *hw, struct dentry *dentry)
232 {
233 	debugfs_create_file("numerator", 0444, dentry, hw, &clk_fd_numerator_fops);
234 	debugfs_create_file("denominator", 0444, dentry, hw, &clk_fd_denominator_fops);
235 }
236 #endif
237 
238 const struct clk_ops clk_fractional_divider_ops = {
239 	.recalc_rate = clk_fd_recalc_rate,
240 	.round_rate = clk_fd_round_rate,
241 	.set_rate = clk_fd_set_rate,
242 #ifdef CONFIG_DEBUG_FS
243 	.debug_init = clk_fd_debug_init,
244 #endif
245 };
246 EXPORT_SYMBOL_GPL(clk_fractional_divider_ops);
247 
clk_hw_register_fractional_divider(struct device * dev,const char * name,const char * parent_name,unsigned long flags,void __iomem * reg,u8 mshift,u8 mwidth,u8 nshift,u8 nwidth,u8 clk_divider_flags,spinlock_t * lock)248 struct clk_hw *clk_hw_register_fractional_divider(struct device *dev,
249 		const char *name, const char *parent_name, unsigned long flags,
250 		void __iomem *reg, u8 mshift, u8 mwidth, u8 nshift, u8 nwidth,
251 		u8 clk_divider_flags, spinlock_t *lock)
252 {
253 	struct clk_fractional_divider *fd;
254 	struct clk_init_data init;
255 	struct clk_hw *hw;
256 	int ret;
257 
258 	fd = kzalloc(sizeof(*fd), GFP_KERNEL);
259 	if (!fd)
260 		return ERR_PTR(-ENOMEM);
261 
262 	init.name = name;
263 	init.ops = &clk_fractional_divider_ops;
264 	init.flags = flags;
265 	init.parent_names = parent_name ? &parent_name : NULL;
266 	init.num_parents = parent_name ? 1 : 0;
267 
268 	fd->reg = reg;
269 	fd->mshift = mshift;
270 	fd->mwidth = mwidth;
271 	fd->nshift = nshift;
272 	fd->nwidth = nwidth;
273 	fd->flags = clk_divider_flags;
274 	fd->lock = lock;
275 	fd->hw.init = &init;
276 
277 	hw = &fd->hw;
278 	ret = clk_hw_register(dev, hw);
279 	if (ret) {
280 		kfree(fd);
281 		hw = ERR_PTR(ret);
282 	}
283 
284 	return hw;
285 }
286 EXPORT_SYMBOL_GPL(clk_hw_register_fractional_divider);
287 
clk_register_fractional_divider(struct device * dev,const char * name,const char * parent_name,unsigned long flags,void __iomem * reg,u8 mshift,u8 mwidth,u8 nshift,u8 nwidth,u8 clk_divider_flags,spinlock_t * lock)288 struct clk *clk_register_fractional_divider(struct device *dev,
289 		const char *name, const char *parent_name, unsigned long flags,
290 		void __iomem *reg, u8 mshift, u8 mwidth, u8 nshift, u8 nwidth,
291 		u8 clk_divider_flags, spinlock_t *lock)
292 {
293 	struct clk_hw *hw;
294 
295 	hw = clk_hw_register_fractional_divider(dev, name, parent_name, flags,
296 			reg, mshift, mwidth, nshift, nwidth, clk_divider_flags,
297 			lock);
298 	if (IS_ERR(hw))
299 		return ERR_CAST(hw);
300 	return hw->clk;
301 }
302 EXPORT_SYMBOL_GPL(clk_register_fractional_divider);
303 
clk_hw_unregister_fractional_divider(struct clk_hw * hw)304 void clk_hw_unregister_fractional_divider(struct clk_hw *hw)
305 {
306 	struct clk_fractional_divider *fd;
307 
308 	fd = to_clk_fd(hw);
309 
310 	clk_hw_unregister(hw);
311 	kfree(fd);
312 }
313